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PT5810 Series
20-A 3.3-V Input Adjustable
Integrated Switching Regulator
Features
• 3.3 V Input
• 20 A Output Current
• DSP Compatible
• Low-Profile (8 mm)
• >90 % Efficiency
• Output Margin Control (±5 %)
• Adjustable Output Voltage
• Pre-Bias Startup Capability
Description
The PT5810 Excalibur™ series of integrated
switching regulators (ISRs) combines outstanding power density with a comprehensive list of
features. They are an ideal choice for applications
where board space is a premium and performance
cannot be compromised. These modules provide
a full 20 A of output current, yet are housed in a
low-profile, 18-pin, package that is almost half
the size of the previous product generation. The
integral copper case construction requires no
heatsink, and offers the advantages of solderability and a small footprint (0.736 in² for suffix ‘N’).
Both through-hole and surface mount pin configurations are available.
The PT5810 series operates from a 3.3-V input
bus to provide a convenient point-of-load power
source for the industry’s latest high-performance
DSPs and microprocessors. The series includes
output voltage options as low as 1.0 VDC.
Other features include external output voltage
adjustment, a ±5 % margin control, on/off inhibit,
short circuit protection, thermal shutdown, and a
differential remote sense.
SLTS174A - JANUARY 2003 - REVISED APRIL 2003
• On/Off Inhibit Function
• Over-Current Protection
• Thermal Shutdown
• Small Footprint
• Surface Mount Compatible
• IPC Lead Free 2
Ordering Information
PT5812H = 2.5 Volts
PT5813H = 1.8 Volts
PT5814H = 1.5 Volts
PT5815H = 1.2 Volts
PT5816H = 1.0 Volts
PT Series Suffix
Case/Pin Order Package
Configuration Suffix Code
Vertical N (EPP)
Horizontal A (EPQ)
SMD C (EPS)
(Reference the applicable package code drawing for the dimensions and PC board layout)
(PT1234x)
(0.736 in², Suffix ‘N’)
Pin-Out Information
Pin Function
1Vo Adjust
2 Inhibit*
3 Margin Dn*
4 Margin Up*
5V
in
6V
in
7V
in
8 Sense(–)
9 GND
10 GND
11 GND
12 GND
13 GND
14 V
out
15 V
out
16 V
out
17 V
out
18 Sense(+)
* Denotes negative logic:
Open = Normal operation
Ground = Function active
Standard Application
Margin Dn
Margin Up
Vo Adjust
V
IN
C
IN
1,000 µF
(Required)
Inhibit
GND
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+
4118
PT5800
9–13
Sense(+)
3
V
OUT
+
GND
L
O
A
D
Cin= Required 1,000 µF
C
= Required 330 µF
out
82
14–175, 6, 7
C
OUT
330 µF
(Required)
Sense(–)
PT5810 Series
20-A 3.3-V Input Adjustable
Integrated Switching Regulator
Specifications (Unless otherwise stated, T
=25 °C, Vin =3.3 V, V
a
=1.8 V, Cin =1,000 µF, C
out
out
SLTS174A - JANUARY 2003 - REVISED APRIL 2003
=330 µF, and Io =Iomax)
PT5810 SERIES
Characteristics Symbols Conditions Min Typ Max Units
Output Current I
Input Voltage Range V
o
in
Over Io range 2.95
0—20A
(1)
— 3.65 V
Set-Point Voltage Tolerance Vo tol — — ±2 %V
Temperature Variation ∆Reg
Line Regulation ∆Reg
Load Regulation ∆Reg
Total Output Variation ∆Reg
temp
line
load
tot
Efficiency η I
Vo Ripple (pk-pk) V
r
–40°C <Ta < +85 °C — ±0.5 — %V
Over Vin range — ±4 — mV
Over Io range — ±2 — mV
Includes set-point, line, load,
–40°C ≤ Ta ≤ +85 °C
=12 A PT5812 (2.5 V) — 93 —
o
PT5813 (1.8 V) — 90 —
PT5814 (1.5 V) — 89 —
PT5815 (1.2 V) — 87 —
PT5816 (1.0 V) — 84 —
——±3%V
20 MHz bandwidth — 20 — mVpp
Transient Response 1 A/µs load step, 50 to 100 % Iomax,
t
tr
∆V
Over-Current Threshold I
Output Voltage Adjust V
Switching Frequency ƒ
Inhibit Control (pin 2) Referenced to GND (pins 9–13)
Input High Voltage V
Input Low Voltage
Input Low Current
tr
TRIP
adj With Vo Adjust — ±15
o
s
IH
V
IL
I
IL
Reset, followed by auto-recovery — 30 — A
With Margin Up/Dn — ±5 —
Over Vin and Io ranges 250 300 350 kHz
Pin 2 to GND — –0.2 — mA
Recovery Time — 50 — µSec
Vo over/undershoot — 120 — mV
(2)
—
Vin –0.5 — Open
–0.2 — 0.6
(3)
Standby Input Current Iin standby Pin 2 to GND — 5 — mA
External Input Capacitance C
External Output Capacitance C
Operating Temperature Range T
in
out
a
Over Vin range –40
1,000
330
(4)
——µF
(5)
— 5,000 µF
(5)
— +85
(6)
Over-Temperature Protection OTP Measured at center of case, auto-reset — 110 — °C
Solder Reflow Temperature T
Storage Temperature T
reflow
s
Reliability MTBF Per Bellcore TR-332
Mechanical Shock Mil-STD-883D, Method 2002.3
Mechanical Vibration Mil-STD-883D, Method 2007.2,
Surface temprature of module pins or case — — 215
— -40 — +125 °C
50% stress, Ta =40°C, ground benign
Half Sine, mounted to a fixture
20-2000 Hz, PCB mounted
5.8 — — 10
— 500 — G’s
— 20
(8)
(7)
—G’s
Weight — — — 20 — grams
Flammability — Materials meet UL 94V-0
Notes:
(1) The minimum input voltage is equal to 2.95 V or Vout + 0.75 V, whichever is greater.
(2) This is a typical value. For the adjustment limits of a specific model consult the related application note on output voltage adjustment.
(3) The Inhibit control (pin 2) has an internal pull-upto V
leakage (<100nA) MOSFET is recommended to control this input. See application notes for more information.
(4) A 1,000 µF electrolytic input capacitor is required for proper operation. This capacitor must be rated for a minimumm of 0.7 Arms of ripple current.
(5) For operation below 0 °C, C
(6) See SOA curves or consult factory for the appropriate derating.
(7) During solder reflow of SMD package version do not elevate the module case, pins, or internal component temperatures above a peak of 215 °C. For
further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA051)
(8) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.
must have stable characteristics. Use either low-ESR tantalum or Oscon® type capacitors.
OUT
, and if left open-circuit the module will operate when input power is applied. A small low-
in
o
o
o
%
%
V
°C
°C
6
Hrs
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PT5810 Series
)
20-A 3.3-V Input Adjustable
Integrated Switching Regulator
Pin Descriptions
Vin: The positive supply voltage input for the module
with respect to the common ground (GND).
Vout: This is the regulated output voltage from the module with respect to the common ground (GND).
GND: The common node to which the input, output, and
external control signals are referenced.
Sense(–): Provides the regulator with the ability to sense
the set-point voltage directly across the load. For optimum
output voltage accuracy this pin should
nected to GND, even for applications that demand a
relatively light load.
Sense(+): When used with Sense(–), the regulation circuitry
will compensate for voltage drop between the converter
and the load. The pin may be left open circuit, but connecting it to V
will optimize load regulation.
out
always be con-
SLTS174A - JANUARY 2003 - REVISED APRIL 2003
Inhibit*: This is an open-collector (open-drain) negative
logic input that is referenced to GND. Pulling this pin to
GND disables the module’s output voltage. If Inhibit* is
left open-circuit, the output will be active whenever a
valid input source is applied.
V
Adjust: This pin is used to trim the output voltage to a
o
value within the range of ±10 % of nominal. The adjustment method uses an external resistor. The resistor is
connected from V
Adjust to either the (-)Sense or (+)Sense,
o
in order to adjust the output up or down, respectively.
Margin Dn*: When this open-collector (open-drain) input
is asserted to GND, the output voltage is automatically
decreased by 5 % from the nominal. This feature is used
in applications where the load circuit must be tested for
operation at the extreme values of its supply voltage
tolerance.
Margin Up*: This is an open-collector (open-drain) input.
When this is asserted to GND, the output voltage is
automatically increased by 5 % from the nominal.
Typical Characteristics
Performance Data; Vin =3.3 V (See Note A)
Efficiency vs Output Current
100
90
80
70
Efficiency - %
60
50
0 4 8 121620
Output Ripple vs Output Current
60
50
40
30
Ripple - mV
20
10
0
0 5 10 15 20
Iout - Amps
Iout - Amps
PT5812
PT5813
PT5814
PT5815
PT5816
PT5814
PT5812
PT5813
PT5816
PT5815
Power Dissipation vs Output Current
6
5
4
3
Pd - Watts
2
1
0
048121620
Iout - Amps
Safe Operating Curves; Vin =3.3 V (See Note B)
90
80
70
60
50
40
Ambient Temperature (°C)
30
20
0 4 8 12 16 20
Iout (A
Airflow
200LFM
120LFM
60LFM
Nat Conv
Note A: Characteristic data has been developed from actual products tested at 25 °C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.
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Application Notes
PT5800 & PT5810 Series
Operating Features and System Considerations
for the PT5800 & PT5810 Regulator Series
The PT5800 (5-V input) and the PT5810 (3.3-V input)
series of integrated switching regulators (ISRs) provide
step-down voltage conversion for output loads of up to
20 A.
Power up & Soft-Start Timing
Following either the application of a valid input source
voltage, or the removal of a ground signal to the Inhihit*
control pin (with input power applied), the regulator will
initiate a soft-start power up. The soft start slows the
rate at which the output voltage rises, and also introduces a
short time delay, td (approx. 2 ms). Figure 1-1 shows the
power-up characteristic of a PT5801 (3.3 V) with a 10-A
load.
Figure 1-1
Vo (2V/Div)
Vin (2V/Div)
With the sense leads connected, the difference between
the voltage measured at V
and GND pins, and that
out
measured from Sense(+) to Sense(–), is the amount of IR
drop being compensated by the regulator. This should
be limited to 0.6 V. (0.3 V maximum between pins 17 &
18, and also between pins 8 & 9).
Note: The remote sense feature is not designed to compensate
for the forward drop of non-linear or frequency dependent
components that may be placed in series with the converter
output. Examples include OR-ing diodes, filter inductors,
ferrite beads, and fuses. When these components are enclosed
by the remote sense connections they are effectively placed
inside the regulation control loop, which can adversely affect
the stability of the regulator.
Over-Current Protection
To protect against load faults, the regulators incorporate
output over-current protection. Applying a load that
exceeds the regulator’s over-current threshold (see data
sheet specifications) will cause the regulated output to
shut down. Following shutdown the ISR will periodically
attempt to recover by initiating a soft-start power-up.
This is often described as a “hiccup” mode of operation,
whereby the module continues in the cycle of successive
shutdown and power up until the load fault is removed.
During this period, the average current flowing into the
fault is significantly reduced. Once the fault is removed,
the converter automatically recovers and returns to normal operation.
t
d
HORIZ SCALE: 5ms/Div
Differential Remote Sense
Connecting the Sense(+) and Sense(-) pins to the load
circuit allows the regulator to compensate for limited
amounts of ‘IR’ voltage drop. This voltage drop is caused
by current flowing through the connection resistance
between the regulator and the ‘point of regulation’ some
distance away. Leaving the sense pins disconnected will
not damage the regulator or load circuitry. An internal
15 Ω resistor, connected between each sense pin and its
corresponding output node, keeps the output voltage in
regulation. However, it is important to connect Sense(–)
to GND locally, as this provides a return path for the
regulator’s internal bias currents.
Over-Temperature Protection
An on-board temperature sensor protects the module’s
internal circuitry against excessively high temperatures.
A rise in the internal temperature may be the result of a
drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold (see
data sheet specifications), the regulator’s Inhibit* control
is automatically pulled low. This disables the regulator,
allowing the output voltage to drop to zero as the external output capacitors are discharged by the load circuit.
The recovery is automatic, and begins with a soft-start
power up. It occurs when the the sensed temperature
decreases by about 10 °C below the trip point.
Note: The over-temperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at
or close to the thermal shutdown temperature is not recommended and will reduce the long-term reliability of the module.
Always operate the regulator within the specified Safe Operating
Area (SOA) limits for the worst-case conditions of ambient
temperature and airflow.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Startup of the PT5800 & PT5810 Series ISRs
with Back-Feeding Source (Pre-Bias Capability)
In complex digital systems an external voltage can
sometimes be present at the output of the regulator
during power up. For example, this voltage may be
backfed through a dual-supply logic component such as
an FPGA or ASIC. Another path might be via a clamp
diode (to a lower supply voltage) as part of a power-up
sequencing implementation.
Although the PT5800 (5-V input) and PT5810 (3.3-V
input) series of regulators will sink current under steadystate operating conditions, they will not do so during
1
startup
as long as certain conditions are maintained 2.
This feature allows these regulators to start up while an
external voltage is simultaneously applied to the output.
Figure 2-1 is an application schematic that demonstrates
this capability. The waveforms in Figure 2-2 show the
behavior of the circuit as input power is applied. Note
that the plot of the regulator output current (Io) is approximately zero up to the timestamp ‘A’, even though a voltage
is initially backfed to the output via the 3.3-V input supply
and diodes D1 & D2. The regulator sources current 3 when
it begins raising the output above the back-fed voltage to
its nominal regulation value.
Notes
1. Startup includes both the application of a valid input
source voltage, or the removal of a ground signal from
the Inhibit* control (pin 2) with a valid input source
applied. The output of the regulator is effectively off
(tri-state), during the period that the Inhibit* control is
held low.
2. To ensure that the regulator does not sink current, the
input voltage
output voltage
must always be greater or equal to the
throughout the power-up and power-down
sequence.
3. If an external source backfeeding the regulator’s output
is greater than the nominal regulation voltage, the output
will begin sinking current at the end of its soft-start
power-up sequence. If this current exceeds the rated
output, the module could be overstressed.
Figure 2-2; Power-up Waveforms with Back-Feeding Source
Vin (1V/Div)
Vo (1V/Div)
Io (5A/Div)
HORIZ SCALE 5ms/Div
A
Figure 2-1; Schematic Demonstrating Startup into Pre-Bias Capability
V
IN
5–7
V
PT5812
IN
+
C
IN
GND
9–13
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18
Sense(+)
Sense(–)
8
(3.3 VDC)
D
1
D
2
14–17
V
OUT
+
C
out
VO (2.5 V)
I
o
COMCOM
Application Notes
PT5800/5810 Series
Capacitor Recommendations for the PT5800 &
PT5810 Step-Down Regulator Series
Input Capacitor:
The recommended input capacitance is determined by a
700-mA ripple current rating and the following minimum
capacitance requirements.
• PT5800 = 820 µF minimum capacitance
• PT5810 = 1000 µF minimum capacitance
Ripple current and <100 mΩ equivalent series resistance
(ESR) values are the major considerations, along with
temperature, when designing with different types of
capacitors. Tantalum capacitors have a recommended
minimum voltage rating of twice the maximum DC
voltage + AC ripple. This is necessary to ensure reliability for input voltage bus applications
Output Capacitors
The ESR of the capacitors is less than 100mΩ. Electrolytic
capacitors have marginal ripple performance at frequencies greater than 400 kHz, but excellent low frequency
transient response. Above the ripple frequency ceramic
capacitors are necessary. Ceramic capacitors improve the
transient response and reduce any high frequency noise
components apparent during high current excursions.
Preferred low-ESR electrolytic capacitor part numbers
are identified in Table 3-1.
Tantalum Capacitors (Optional Output Capacitors)
Tantalum type capacitors can be used for the output but
only the AVX TPS series, Sprague 593D/594/595 series,
or Kemet T495/T510 series. These capacitors are recommended over many other tantalum types due to their
higher rated surge, power dissipation, and ripple current
capability. As a caution the TAJ series by AVX is not
recommended. This series has considerably higher ESR,
reduced power dissipation, and lower ripple current
capability. The TAJ series is less reliable than the AVX
TPS series when determining power dissipation capability. Tantalum or Oscon® types are recommended for
applications where ambient temperatures fall below 0°C.
Capacitor Table
Table 2-1 identifies the characteristics of capacitors from a
number of vendors with acceptable ESR and ripple current
(rms) ratings. The number of capacitors required at both
the input and output buses is identified for each capacitor
type.
This is not an extensive capacitor list. Capacitors from other
vendors are available with comparable specifications. Those listed
are for guidance. The RMS ripple current rating and ESR
(Equivalent Series Resistance) at 100 kHz are critical parameters necessary to insure both optimum regulator performance
and long capacitor life.
Table 3-1; Input/Output Capacitors
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For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Using the Inhibit Control of the PT5800 & PT5810
Series of Step-Down ISRs
For applications requiring output voltage On/Off control,
the PT5800 & PT5810 series of ISRs incorporate an
inhibit function. This function can be used wherever there
is a requirement for the output voltage from the ISR to be
turned off. The On/Off function is provided by the Inhibit*
control (pin 2).
The ISR functions normally with pin 2 open-circuit,
providing a regulated output whenever a valid source
voltage is applied between V
(pins 5–7) and GND (pins
in
9–13). When a low-level ground signal is applied to
pin 2, the regulator output is turned off 2.
Figure 4-1 shows the typical application of the Inhibit*
function. Note the discrete transistor (Q
). The Inhibit*
1
control has its own internal pull-up to +Vin potential. An
open-collector or open-drain device is recommended to
control this input 1. The voltage thresholds are given in
Table 4-1.
Table 4-1; Inhibit Control Requirements
Parameter Min Typ Max
Enable (VIH)V
Disable (VIL) –0.2 V — +0.6 V
I
IL
– 0.5 V — Open
in
— –0.2 mA —
Turn-On Time: In the circuit of Figure 4-1, turning Q1 on
applies a low-voltage to the Inhibit* control (pin 2) and
2
disables the output of the regulator
. If Q1 is then turned
off, the ISR executes a soft-start power up. Power up
consists of a short delay (approx. 2msec), followed by a
period in which the output voltage rises to its full regulation voltage. The module produces a regulated output
voltage within 10msec. Figure 4-2 shows the typical rise
in both the output voltage and input current for a PT5812
(2.5 V), following the turn-off of Q
. The turn off of Q
1
corresponds to the rise in the waveform, Q1 Vds. The
waveforms were measured with a 3.3 VDC input voltage,
and 10-A load.
Figure 4-2
Vo (1V/Div)
Iin (5A/Div)
Q1 Vds (2V/Div)
1
Figure 4-1
V
IN
1 =Inhibit
GND
C
IN
1,000 µF
+
Q
1
BSS138
Output Sense (+)
4118
3
PT5812
9–13
14–175, 6, 7
82
Output Sense (–)
C
OUT
330 µF
HORIZ SCALE: 2ms/Div
V
OUT
Notes:
1. Use an open-collector device with a breakdown voltage
of at least 10 V (preferably a discrete transistor) for the
+
Inhibit* input. A pull-up resistor is not necessary. To
disable the output voltage the control pin should be
pulled low to less than +0.8 VDC.
2. When a ground signal is applied to the Inhibit* control
GND
(pin 2) the module output is turned off (tri-state). The
output voltage decays to zero as the load impedance
discharges the output capacitors.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Adjusting the Output Voltage of the PT5800 &
PT5810 Step-Down Series of Regulators
Using Margin Up/ Margin Down
The Margin Up* (pin 4) and Margin Dn* (pin 3) control
inputs allow the output voltage to be easily adjusted by
up to ±5 % of the nominal set-point voltage. To activate,
simply connect the appropriate control input to the Sense(–)
(pin 8), or the local starpoint ground. Either a logic level
MOSFET or a p-channel JFET is recommended for this
purpose. For further information see the related application note on this feature.
Using the ‘Vo Adjust’ Control
For a more permanent and precise adjustment, use the
Vo Adjust control (pin 1). The Vo Adjust control allows
adjustment in any increment by up to ±10% of the setpoint. The adjustment method requires the addition of a
single external resistor. Table 5-1 gives the allowable
adjustment range for each model of the series as Va (min)
and Va (max). The value of the external resistor can either
be calculated using the formulas given below, or simply
selected from the range of values provided in Table 5-2.
Refer to Figure 5-1 for the placement of the required
resistor. Use the resistor R1 to adjust up, and the resistor
(R2) to adjust down.
Adjust Up: An increase in the output voltage is obtained
by adding a resistor R
Sense(–) (pin 8). See Figure 5-1.
Adjust Down: Add a resistor (R2), between Vo Adjust (pin 1)
and Sense(+) (pin 18). See Figure 5-1.
Notes:
1. Use a 1% (or better) tolerance resistor in either the R1 or
) location. Place the resistor as close to the ISR as
(R
2
possible.
2. Never connect capacitors from Vo Adjust to either GND or
. Any capacitance added to the Vo Adjust pin will affect
V
out
the stability of the ISR.
3. If the remote sense feature is not being used, the adjust
resistor (R2) can be connected to V
of Sense (+).
, between Vo Adjust (pin 1) and
1
, (pins 14-17) instead
out
4. The PT5812 may not be adjusted higher than the
nominal output voltage of 2.5 V. There is insufficient
input voltage between V
and V
in
to accommodate
out
an increase in the output voltage.
Vo Adjust Resistor Calculations
The values of R1 [adjust up] and (R2) [adjust down] can
also be calculated using the following formulas. Again, use
Figure 5-1for the placement of the required resistor;
either R1 or (R2) as appropriate.
V
· R
r
V
a
R
o
V
o
– V
o
(Va – Vr)
– V
o
a
– 24.9 kΩ
– 24.9 kΩ
R
1
(R2) =
=
Where: Vo= Original output voltage
Va= Adjusted output voltage
Vr= The reference voltage in Table 5-1
Ro= The resistance constant in Table 5-1
Figure 5-1; Vo Adjust Resistor Placement
Sense (+) [Note 3]
V
1
OUT
(R2)
Adj Down
14–17
R
1
Adjust Up
Sense (–)
C
OUT
330 µF
V
+
GND
18
Sense(+)
PT5800/5810
Sense(–)
9–13
8
VO AdjGND
OUT
Table 5-1
ISR OUTPUT VOLTAGE ADJUSTMENT RANGE AND FORMULA PARAMETERS
Series Pt. No.
5.0V Bus PT5801 PT5802 PT5803 PT5804 PT5805 PT5806
3.3V Bus N/A PT5812
Vo (nom) 3.3 V 2.5 V 1.8 V 1.5 V 1.2 V 1.0 V
Va (min) 2.6 V 2.0 V 1.52 V 1.31 V 1.1 V 0.94 V
Va (max) 3.63 V 2.8 V
V
r
ΩΩ
Ro (k
Ω) 10.2 10.7 10.2 9.76 10.0 10.2
ΩΩ
# The PT5812 should not be adjusted higher than its nominal output voltage of 2.5 V. See note 4.
0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
For technical support and more information, see inside back cover or visit www.ti.com
4
PT5813 PT5814 PT5815 PT5816
#
2.1 V 1.82 V 1.52 V 1.32 V
Application Notes
continued
PT5800 & PT5810 Series
Table 5-2
ISR ADJUSTMENT RESISTOR VALUES
Series Pt. No.
5.0V Bus PT5801 PT5802 PT5803 PT5804 PT5805 PT5806
3.3V Bus N/A PT5812 PT5813 PT5814 PT5815 PT5816
Vo (nom) 3.3 V 2.5 V 1.8 V 1.5 V 1.2 V 1.0V
Va (req.d)
3.60 2.3 kΩ
3.55 7.7 kΩ
3.50 15.9 kΩ
3.45 29.5 kΩ
3.40 56.7 kΩ
3.35 138.0 kΩ
3.30
3.25 (475.0) kΩ
3.20 (220.0) kΩ
3.15 (135.0) kΩ
3.10 (92.4) kΩ
3.05 (66.9) kΩ
3.00 (49.9) kΩ
2.95 (37.5) kΩ
2.90 (28.6) kΩ
2.85 (21.6) kΩ
2.80 (15.9) kΩ 3.6 kΩ
2.75 (11.3) kΩ 9.3 kΩ
2.70 (7.4) kΩ 17.9 kΩ
2.65 (4.1) kΩ 32.2 kΩ
2.60 (1.3) kΩ 60.7 kΩ
2.550 [Note 4] 146.0 kΩ
2.500
2.450 (321.0) kΩ
2.400 (146.0) kΩ
2.350 (85.7) kΩ
2.300 (55.3) kΩ
2.250 (37.2) kΩ
2.200 (25.0) kΩ
2.150 (16.4) kΩ
2.100 (9.9) kΩ
2.050 (4.8) kΩ
2.000 (0.8) kΩ
R1 = Black R2 = (Blue)
Va (req.d)
2.100 2.3 kΩ
2.050 7.7 kΩ
2.000 15.9 kΩ
1.950 29.5 kΩ
1.900 56.7 kΩ
1.850 138.0 kΩ
1.800 1.1 kΩ
1.750 (169.0) kΩ 6.3 kΩ
1.700 (66.9) kΩ 14.1 kΩ
1.650 (32.9) kΩ 27.2 kΩ
1.600 (15.9) kΩ 53.2 kΩ
1.550 (5.7) kΩ 131.0 kΩ
1.500 1.8 kΩ
1.475 (239.0) kΩ 4.2 kΩ
1.450 (102.0) kΩ 7.1 kΩ
1.425 (56.4) kΩ 10.7 kΩ
1.400 (33.7) kΩ 15.1 kΩ
1.375 (20.0) kΩ 20.8 kΩ
1.350 (10.9) kΩ 28.4 kΩ
1.325 (4.4) kΩ 39.1 kΩ
1.300 55.1 kΩ 2.3 kΩ
1.275 81.8 kΩ 4.8 kΩ
1.250 135.0 kΩ 7.7 kΩ
1.225 295.0 kΩ 11.4 kΩ
1.200 15.9 kΩ
1.175 (125.0) kΩ 21.7 kΩ
1.150 (45.1) kΩ 29.5 kΩ
1.125 (18.4) kΩ 40.4 kΩ
1.100 (5.1) kΩ 56.7 kΩ
1.075 83.9 kΩ
1.050 138.0 kΩ
1.025 302.0 kΩ
1.000
0.975 (46.5) kΩ
0.950 (5.7) kΩ
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Using the Margin Up/Down Controls on the
PT5800 & PT5810 Regulator Series
The PT5800 & PT5810 series of integrated switching
regulator modules incorporate Margin Up* (pin 4) and
Margin Dn* (pin 3) control inputs. These controls allow the
output voltage set point to be momentarily adjusted
1
either up or down, by a nominal 5 %. This provides a
convenient method for dynamically testing the load
circuit’s power supply voltage over its operating margin
or range. Note that the ±5 % change is also applied to any
adjustment of the output voltage, if made, using the V
o
Adjust (pin 1).
The 5 % adjustment is made by driving the appropriate
margin control input directly to the ground reference at
2
Sense(-) (pin 8)
. An low-leakage open-drain device, such as
a MOSFET or a p-channel JFET is recommended for this
purpose. Adjustments of less than 5 % can also be accommodated by adding series resistors to the control inputs
(See Figure 6-1). The value of the resistor can be selected
from Table 6-1, or calculated using the following formula.
Resistor Value Calculation
To reduce the margin adjustment to something less than
5 %, series padding resistors are required (See RD and
RU in Figure 6-1). For the same amount of adjustment,
the resistor value calculated for RU and RD will be the
same. The formulas is as follows.
RU/RD=
499
– 99.8 kΩ
∆%
Notes:
1. The Margin Up* and Margin Dn* controls were not
intended to be activated simultaneously. If they are
,
their affects on the output voltage may not completely
cancel, resulting in a slight shift in the output voltage
set point.
2. When possible use the Sense(-) (pin 8) as the ground
reference. This will produce a more accurate adjustment
of the output voltage at the load circuit terminals. GND
(pins 9-13) can be used if the Sense(-) pin is connected
to GND near the regulator.
Table 6-1; Margin Up/Down Resistor Values
PADDING RESISTOR VALUES
% Adjust RU / R
5 0.0 kΩ
4 24.9 kΩ
3 66.5 kΩ
2 150.0 kΩ
1 397.0 kΩ
D
Where ∆% = The desired amount of margin adjust in
percent.
Figure 6-1; Margin Up/Down Application Schematic
+5 V
RDR
+
C
in
Q
MargDn
MargUp
GND
1
5, 6, 7
Q
+V
o
0V
4 3
MARG
MARG
DN*
UP*
V
PT5800
IN
GND
U
2
SNS(+)
SNS(–)INHIBIT*
18
V
OUT
829–13
Sense(–)
GND
14–17
+V
OUT
+
C
out
L
O
A
D
0 V
For technical support and more information, see inside back cover or visit www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jun-2005
PACKAGING INFORMATION
Orderable Device Status
PT5812A ACTIVE SIP MOD
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
EPQ 18 15 TBD Call TI Level-1-215C-UNLIM
ULE
PT5813A ACTIVE SIP MOD
EPQ 18 15 TBD Call TI Level-1-215C-UNLIM
ULE
PT5813C ACTIVE SIP MOD
EPS 18 15 TBD Call TI Level-3-215C-168HRS
ULE
PT5814A ACTIVE SIP MOD
EPQ 18 15 TBD Call TI Level-1-215C-UNLIM
ULE
PT5814C ACTIVE SIP MOD
EPS 18 15 TBD Call TI Level-3-215C-168HRS
ULE
PT5814N ACTIVE SIP MOD
EPP 18 15 TBD Call TI Level-1-215C-UNLIM
ULE
PT5815C ACTIVE SIP MOD
EPS 18 15 TBD Call TI Level-3-215C-168HRS
ULE
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and alifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples mayor may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specifiedlead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneousmaterial)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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