Texas Instruments PCM4222EVM User Manual

User's Guide

SBAU124 – December 2006

PCM4222EVM User's Guide

This document serves as a reference for the PCM4222EVM evaluation module. When
used in conjunction with commonly available audio test equipment, the PCM4222EVM
provides a complete environment for evaluating the functionality and performance of
the PCM4222 integrated circuit. Indirectly, the PCM4222EVM serves as an evaluation
platform for the PCM4220 integrated circuit; the PCM4220 is a subset derivative of the
PCM4222 device.

This document includes information regarding absolute operating conditions,
power-supply requirements, and hardware configuration for the evaluation module. The
electrical schematics and bill of materials are also included for reference purposes.
Throughout this document, the acronym EVM and the phrase evaluation module are
synonymous with the PCM4222EVM.

Contents

1 Introduction .......................................................................................... 3

2 Hardware Configuration ............................................................................ 6

3 Hardware Reference .............................................................................. 16

List of Figures

1 PCM4222 Functional Block Diagram ............................................................ 3

2 Simplified Block Diagram for the PCM4222EVM Evaluation Module ........................ 5

3 Power Supply Jumper Configuration ............................................................. 7

4 PCM4222EVM Schematics, Page 1 of 2 ...................................................... 17

5 PCM4222EVM Schematics, Page 2 of 2 ...................................................... 18

List of Tables

1 Absolute Operating Conditions ................................................................... 6

2 Recommended Power Supply Range............................................................ 7

3 Master Clock Source Selection ................................................................... 9

4 Master Clock Frequencies for Common Output Sampling and Data Rates ................ 9

5 PCM Output Mode Configuration ............................................................... 10

6 PCM Sampling Mode Selection ................................................................. 10

7 Audio Serial Port Header Configuration ........................................................ 11

8 Audio Serial Port Slave/Master Mode Selection .............................................. 11

9 Audio Serial Port Data Format Selection ...................................................... 11

10 TDM Sub-frame Assignment .................................................................... 12

11 PCM Output Word Length Selection ........................................................... 12

12 Digital Decimation Filter Configuration ......................................................... 12

13 Digital High-Pass Filter Switch Operation ...................................................... 13

14 DIT4192 Serial Data and Clock Enable Operation ........................................... 13

15 DIT4192 Master Clock Divider Configuration .................................................. 13

16 DIT4192 Data Format Selection ................................................................ 14

17 DIT4192 Transmission Mode Configuration ................................................... 14

18 DSD Data Port Header Pin Configuration ..................................................... 15

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19 DSD Output Mode Configuration ................................................................ 15

20 DSD Output Rate Selection ...................................................................... 15

21 Modulator Data Port Header Pin Configuration ............................................... 16

22 Multi-Bit Modulator (MBM) Output Mode Configuration ...................................... 16

23 Bill of Materials .................................................................................... 19

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Reference

Multi-Bit

Delta-Sigma

Multi-Bit

Delta-Sigma

Digital
Filters

Audio
Serial

Port

DSD

Engine

Reset

Logic

Control

and

Status

MasterClock

andTiming

VINL+

VCOML

REFGNDL

VREFL

S/M
FMT0
FMT1
OWL0
OWL1
SUB0(WCK0)
SUB1(MCK0)
PCMEN
FS0(MOD3)
FS1(MOD4)
OVFL
OVFR
MODEN

DSDEN(MOD6)
DSDCLK
DSDL
DSDR

DSDMODE

VCC1

VCC2

AGND

AGND

AGND

AGND

AGND

AGND

DGND

DGND

DGND

VDD

RST

LRCK
BCK
DATA

DF(MOD5)
HPFDR(MOD1)
HPFDL(MOD2)

VREFR

MCKI

REFGNDR

VCOMR

VINL-

VINR+

VINR-

Introduction

1 Introduction

The PCM4222EVM evaluation module from Texas Instruments provides a convenient platform for testing
the PCM4222 , a high-performance, stereo audio analog-to-digital (A/D) converter integrated circuit.

Figure 1 shows a block diagram of the PCM4222 device. Refer to the PCM4222 product datasheet for

additional information and details regarding this product. The PCM4222EVM evaluation module includes
analog input and digital output circuitry with common audio connectors, providing a direct interface to
audio test systems for measurement and evaluation.

Figure 1. PCM4222 Functional Block Diagram

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Introduction

The primary features of the PCM4222EVM include:

• Simple configuration using switches and power-supply jumpers.

• Two differential input buffer/filter circuits employing the Texas Instruments OPA1632 fully differential

amplifer integrated circuit.

• Two Texas Instruments DIT4192 digital audio interface transmitters, providing AES3-encoded output
data. Transformer coupled 110 Ω balanced and 75 Ω unbalanced outputs are provided. Single-Channel,
Double Sampling Frequency operation is supported.

• A buffered audio serial port header supports connection to external hardware or test equipment
supporting Philips' I2S™, Left Justified, or Time Division Multiplexed (TDM) audio interface formats for
PCM output data.

• A buffered data port header provides one-bit Direct Stream Digital (DSD) output data and the
associated bit clock for the DSD output.

• A buffered modulator output port header provides access to the PCM4222 6-bit modulator data outputs
and clocks.

• Support for onboard or external clock generation. Two onboard crystal oscillators provide support for
common audio sampling rates, including 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, and 192kHz.

• Light emitting diode (LED) overflow indicators for the left and right audio channels.

• Minimum power-supply requirements: ± 6V to ± 15V for the analog section, and +5V for the digital

section.

• The PCM4222 analog supply may be generated from an onboard +4.0 linear voltage regulator, or an
external regulated dc power source.

• A +3.3V supply, used to power the majority of the digital circuitry and the PCM4222 digital section,
may be generated from the +5.0V digital supply using an onboard linear voltage regulator.
Alternatively, an external regulated dc power source may be selected, supporting digital supply
voltages as low as +2.4V.

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S/M

FDA

FDA

DIT

DIT

Analog

Power

Audio
Serial
Port

Digital
Power

DSD
Data
Port

Modulator
Output
Port

J6

J5

J4

J12

J1
Left Cha lnne
Analog I tnpu

J2

RightChannel

Analog I tnpu

U1

PCM4222 FP B

SW6

SW1

and

SW2

AES3

Out#1

AES3

Out#2

J7

J8

J9

J10

J11

ExtClock

X1

X2

Clock

Select

SW3

SW5

SW4

ADC

Reset

DIT

Reset

ToDIT

J3

Figure 2 shows a simplified block diagram for the PCM4222EVM circuit functions. The blocks labeled FDA

are the OPA1632 fully differential amplifier input circuits (U4 and U5). The blocks labeled DIT are the
DIT4192 digital audio interface transmitters (U13 and U14). Two transmitters are required to support AES3
Single-Channel, Double Sampling Frequency applications.

Introduction

Figure 2. Simplified Block Diagram for the PCM4222EVM Evaluation Module

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Hardware Configuration

2 Hardware Configuration

This section provides information on the PCM4222EVM hardware configuration, including power supplies
and switch settings. Evaluation module handling information and absolute operating conditions are also
provided.

2.1 Electrostatic Discharge Warning

Failure to observe proper ESD handling procedures may result in damage to
PCM4222EVM components.

Many of the components used in the assembly of the evaluation module are susceptible to damage by
electrostatic discharge (ESD). Customers are advised to observe proper ESD handling procedure when
unpacking and handling the EVM. All handling should be performed at an approved ESD workstation or
test bench while wearing an appropriate grounding device. Failure to observe ESD handling procedures
may result in damage to EVM components.

2.2 Absolute Operating Conditions

Exceeding the absolute operating conditions may result in improper operation
or damage to the evaluation module and/or the equipment connected to it.

CAUTION

CAUTION

Table 1 summarizes the critical data points for the PCM4222EVM absolute operating conditions.

Table 1. Absolute Operating Conditions

PARAMETER MIN MAX UNIT
Analog Power Supplies

+15V -0.3 +16.0 VDC

-15V +0.3 -16.0 VDC
EXT VCC -0.3 +6.0 VDC

Digital Power Supplies

+5V -0.3 +5.5 VDC
EXT VDD -0.3 +4.0 VDC

Analog Input Voltage (Measured Differentially at J1 or J2)

Left Channel Analog Input (J1) 4 x VCC V
Right Channel Analog Input (J2) 4 x VCC V

Digital Input Voltage

Audio Serial Port (J6) -0.3 +4.0 V
EXT CLOCK (J11) -0.3 +6.5 V

Digital Output Voltage

Connectors J4, J5, and J6 -0.3 VDD + 0.3
Connector J7, J9 (terminated with 110 ohms) 4.5 V
Connector J8, J10 (terminated with 75 ohms) 3.6 V

Temperature

Ambient Operating Range 0 +70 ° C

PP (DIFF)
PP (DIFF)

PP (DIFF)

PP

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2.3 Power Supplies

VCC +5V +3.3V VDD

+5V DGND

+15V

+15V

-15V

-15V

AGND

EXT

VCC

EXT
VDD

+3.3V

Regulator

+4.0V

Regulator

J12

DigitalPower

J3

AnalogPower

REG

1

3

2

4

EXT

JMP6

REG

1

3

2

4

EXT

JMP5

U23 U22

Hardware Configuration

The PCM4222EVM includes two terminal blocks for connection of external power supplies. Terminal block
J3 supports analog power supplies, while terminal block J12 supports digital power supplies. Refer to

Table 1 for absolute operating conditions. Table 2 shows the recommended power supply range for the

PCM4222EVM.

Table 2. Recommended Power Supply Range

PARAMETER MIN MAX UNIT
Analog Power Supplies (J3)

+15V +6.0 +15.0 VDC

-15V -6.0 -15 VDC
EXT VCC +3.8 +4.2 VDC

Digital Power Supplies (J12)

+5V +4.5 +5.5 VDC
EXT VDD +2.4 +3.6 VDC

The PCM4222EVM requires a minimum of two external dc power supplies for the analog functions. The
two power supplies are labeled as +15V and –15V on terminal block J3. The +15V and –15V supplies
should be regulated and capable of providing a minimum of 200mA of current each.

The PCM4222 requires a +4.0V nominal dc supply for operation of the internal analog circuitry.
Designated as VCC, this supply may be derived from the +15V analog power supply using an onboard
linear regulator circuit, comprised of U23 and the associated components. The regulator circuit is
protected in the event that a short-circuit occurs between the +15V supply and ground. The EVM also
supports an external +4.0V power supply, which may be connected at the EXT VCC terminal of J3.
Jumper JMP6 is used to select the onboard regulated supply or an external power source. Figure 3
illustrates the jumper options.

Figure 3. Power Supply Jumper Configuration

In addition to the analog supplies, the PCM4222EVM requires at least one digital power supply, connected
at the +5V terminal of J12. This supply is nominally +5V dc, and should be provided by a regulated
voltage source capable of sourcing a minimum of 200mA. The +3.3V required for the PCM4222 digital
section and external support logic may be derived from the +5V supply using an onboard linear voltage
regulator (U22). Alternatively, an external regulated VDD supply may be connected via the EXT VDD
terminal of J12. Refer to Figure 3 for the configuration of jumper JMP5, which is used to select the source
of the VDD power supply.

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Hardware Configuration

2.4 Analog Inputs

The left and right channel analog input sources for the PCM4222 are provided through connectors J1 and
J2, respectively. The J1 and J2 connectors accommodate both 3-pin balanced XLR and 1/4-inch balanced
TRS input connections. Pin 1 for both connector J1 and J2 include a ground lift jumper.

Each analog input is buffered by an input circuit employing the OPA1632 fully differential audio amplifier,
selected for its low noise and distortion, and fully-differential input-to-output architecture. The buffer circuit
provides attenuation (nominal gain = 0.482, or –6.34dB) and low-pass antialiasing filter functions. The
printed circuit board (PCB) layout supports limited board stuff options for experimentation. The full-scale
input voltage for the input buffer circuit is approximately 4.2V

(or +14.6845dBu) differential, given a

RMS

nominal VCC supply of +4.0V for the PCM4222 and a source impedance of 40 Ω . Due to the full-scale
input voltage varying slightly from one PCM4222 device to another, the full-scale input swing should be
calibrated for each EVM individually, adjusting the input voltage level until a 0dBFS output level is
indicated.

The common-mode bias for each OPA1632 is provided by the corresponding VCOML or VCOMR outputs
from the PCM4222. The VCOML and VCOMR outputs are buffered by OPA227 low-noise precision op
amps, configured as voltage followers. A buffer is required because of the low input impedance of the
OPA1632 V

pin.

OCM

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