TTL-Compatible Output Can Sink or
Source up to 200 mA
D
Functionally Interchangeable With the
D, JG, OR P PACKAGE
(TOP VIEW)
GND
TRIG
RESET
OUT
1
2
3
4
8
7
6
5
V
CC
DISCH
THRES
CONT
Signetics NE555, SA555, SE555, SE555C;
Have Same Pinout
FK PACKAGE
(TOP VIEW)
SE555C FROM TI IS NOT RECOMMENDED
FOR NEW DESIGNS
description
These devices are precision monolithic timing
circuits capable of producing accurate time delays
or oscillation. In the time-delay or monostable
mode of operation, the timed interval is controlled
by a single external resistor and capacitor
NC
TRIG
NC
OUT
NC
NC
GND
NC
32120 19
4
5
6
7
8
910111213
VCC
NC
18
17
16
15
14
NC
DISCH
NC
THRES
NC
network. In the astable mode of operation, the
NC
NC
CONT
. These levels can
CC
frequency and duty cycle may be independently
controlled with two external resistors and a single
external capacitor.
NC–No internal connection
NC
RESET
The threshold and trigger levels are normally two-thirds and one-third, respectively , of V
be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop
is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above
the threshold level, the flip-flop is reset and the output is low. RESET can override all other inputs and can be
used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low.
Whenever the output is low, a low-impedance path is provided between DISCH and ground.
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of
5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.
The NE555 is characterized for operation from 0°C to 70°C. The SA555 is characterized for operation from
–40°C to 85°C. The SE555 and SE555C are characterized for operation over the full military range of –55°C
to 125°C.
AVAILABLE OPTIONS
PACKAGE
T
A
0°C to 70°C11.2 VNE555DNE555P
–40°C to 85°C11.2 VSA555DSA555P
–55°C to 125°C
The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR).
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LowIrrelevantIrrelevantLowOn
High< 1/3 V
High> 1/3 V
High> 1/3 V
†
Voltage levels shown are nominal.
functional block diagram
TRIGGER VOLTAGE†THRESHOLD VOLTAGE
DD
DD
DD
FUNCTION TABLE
†
OUTPUTDISCHARGE SWITCH
IrrelevantHighOff
> 2/3 V
< 2/3 V
DD
DD
LowOn
As previously established
V
CC
8
CONT
5
R
TRIG
6
R
2
R
1
GND
THRES
RESET can override TRIG, which can override THRES.
Pin numbers shown are for the D, JG, and P packages only.
RESET
4
R1
R
S
1
3
7
OUT
DISCH
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
chip information
These chips, properly assembled, display characteristics similar to the NE555 (see electrical table for NE555Y).
Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be
mounted with conductive epoxy or a gold-silicon preform.
41
(5)
(6)
BONDING PAD ASSIGNMENTS
(3)
(4)
42
(7)
(1)
(8)
(2)
THRES
TRIG
CONT
V
CC
(8)
R
(6)
R
(2)
R
(1)
GND
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJ max = 150° C
TOLERANCES ARE ± 10%
ALL DIMENSIONS ARE IN MILS
PIN (1) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP
(5)
RESET
(4)
R1
R
S
1
(3)
(7)
OUT
DISCH
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
NE555, NE555Y, SA555, SE555, SE555C
UNIT
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)