Datasheet NE555 Datasheet (ST)

Features

■ Low turn-off time

■ Maximum operating frequency greater than

500 kHz

■ Timing from microseconds to hours

■ Operates in both astable and monostable

modes

■ Output can source or sink up to 200 mA

■ Adjustable duty cycle

■ TTL compatible

■ Temperature stability of 0.005% per °C

Description

NE555

SA555 - SE555

General-purpose single bipolar timers

N

DIP8

(Plastic package)

D

SO8

(Plastic micropackage)

The NE555, SA555, and SE555 monolithic timing
circuits are highly stable controllers capable of
producing accurate time delays or oscillation. In
the time delay mode of operation, the time is
precisely controlled by one external resistor and
capacitor. For a stable operation as an oscillator,
the free running frequency and the duty cycle are
both accurately controlled with two external
resistors and one capacitor.

The circuit may be triggered and reset on falling
waveforms, and the output structure can source
or sink up to 200 mA.

Pin connections

(top view)

1

2

36

4

1 - GND
2 - Trigger
3 - Output
4 - Reset

8

7

5

5 - Control voltage
6 - Threshold
7 - Discharge
8 - V

CC

January 2012 Doc ID 2182 Rev 6 1/20

www.st.com

20

Schematic diagrams NE555 - SA555 - SE555

1 Schematic diagrams

Figure 1. Block diagram

+

V

CC

5kΩ

THRESHOLD

CONTROL VOLTAGE

TRIGGER

COMP

5kΩ

COMP

5kΩ

R

FLIP-FLOP

S

INHIBIT/
RESET

Q

DISCHARGE

OUT

RESET

Figure 2. Schematic diagram

S

2/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Absolute maximum ratings and operating conditions

2 Absolute maximum ratings and operating conditions

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

I

OUT

R

thja

R

thjc

ESD

Supply voltage 18 V

Output current (sink & source) ±225 mA

(1)

(1)

85

125

41
40

1000

100

1500

°C/W

°C/W

Thermal resistance junction to ambient

DIP8
SO-8

Thermal resistance junction to case

DIP8
SO-8

Human body model (HBM)

Charged device model (CDM)

(2)

(3)

(4)

Latch-up immunity 200 mA

T

LEAD

T

j

T

stg

1. Short-circuits can cause excessive heating. These values are typical.

2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a

1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.

3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.

4. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.

Table 2. Operating conditions

Lead temperature (soldering 10 seconds) 260 °C

Junction temperature 150 °C

Storage temperature range -65 to 150 °C

VMachine model (MM)

Symbol Parameter Value Unit

Supply voltage

V

CC

NE555
SA555
SE555

, V

cl

th

, V

I

OUT

trig

reset

,

Maximum input voltage V

Output current (sink and source) ±200 mA

V

V

4.5 to 16

4.5 to 16

4.5 to 18

CC

Operating free air temperature range

T

oper

NE555
SA555
SE555

0 to 70

-40 to 105

-55 to 125

°C

Doc ID 2182 Rev 6 3/20

V

V

Electrical characteristics NE555 - SA555 - SE555

3 Electrical characteristics

Table 3. T

= +25° C, VCC = +5 V to +15 V (unless otherwise specified)

amb

Symbol Parameter

Supply current (RL = ∝)
Low state V

I

CC

High state V

= +5 V

CC

VCC = +15 V

= +5 V

CC

Timing error (monostable)
(R

= 2 kΩ to 100 kΩ, C = 0.1 μF)

A

Initial accuracy

(1)

Drift with temperature
Drift with supply voltage

Timing error (astable)
(R

R

= 1 kΩ to 100 kΩ, C = 0.1 μF, VCC= +15 V)

,

A

B

Initial accuracy

(1)

Drift with temperature
Drift with supply voltage

Control voltage level

V

CL

VCC = +15 V

= +5 V

V

CC

Threshold voltage

V

th

V

CC

= +15 V

VCC = +5 V

Threshold current

I

th

(2)

Trigger voltage

V

V

trig

I

trig

reset

VCC = +15 V

= +5 V

V

CC

Trigger current (V

Reset voltage

(3)

= 0 V) 0.5 0.9 0.5 2.0 µA

trig

Reset current

I

reset

V
V

reset

reset

= +0.4 V
= 0 V

Low level output voltage

= +15 VI

V

CC

V

OL

VCC = +5 V I

O(sink)

I

O(sink)

I

O(sink)

I

O(sink)

O(sink)

I

O(sink)

= 10 mA

= 50 mA

= 100 mA
= 200 mA
= 8 mA
= 5 mA

SE555 NE555 - SA555

Min. Typ. Max. Min. Typ. Max.

3

10

2

0.5
30

0.05

1.5
90

0.15

9.6

2.9103.33

9.4

2.7103.33

5

12

3

10

2

2

100

0.2

1

50

0.130.5

2.25
150

0.3

10.4

3.892.6103.33114

10.648.8

2.4103.33

6

15

ppm/°C

ppm/°C

11.2

4.2

0.1 0.25 0.1 0.25 µA

4.8

1.4551.67

5.2

1.9

4.5

1.151.67

5.6

2.2

0.4 0.7 1 0.4 0.7 1 V

0.1

0.4

0.1

0.4

2.5

0.1

0.05

0.4
1

0.15

0.5

2

2.2

0.1

0.4

0.1

0.4
2

0.4

1.5

0.25

0.75

2.5

2.5

0.25

0.2

0.3

0.25

0.4

0.35

Unit

mA

%

%/V

%

%/V

V

V

V

mA

V

4/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Electrical characteristics

Table 3. T

= +25° C, VCC = +5 V to +15 V (unless otherwise specified) (continued)

amb

SE555 NE555 - SA555

Symbol Parameter

Min. Typ. Max. Min. Typ. Max.

High level output voltage

= +15 VI

V

V

OH

CC

VCC = +5 V I

I

dis(off)

V

dis(sat)

Discharge pin leakage current
(output high) V

Discharge pin saturation voltage
(output low)

(4)

VCC = +15V, I
VCC = +5V, I

t

Output rise time

r

t

Output fall time

f

Turn off time

t

off

1. Tested at VCC = +5 V and VCC = +15 V.

2. This will determine the maximum value of R
operation and 3.5 MΩ for +5 V operation.

3. Specified with trigger input high.

4. No protection against excessive pin 7 current is necessary, providing the package dissipation rating is not exceeded.

5. Time measured from a positive pulse (from 0 V to 0.8 x V
output pin. Trigger is tied to threshold.

(5)

O(sink)

I

O(sink)

O(sink)

= 10 V

dis

= 15 mA

dis

= 4.5 mA

dis

(V

reset

= 200 mA
= 100 mA
= 100 mA

13

3

12.5

13.3

3.3

12.7
5

2.75

12.5

13.3

3.3

20 100 20 100 nA

18080480

200

100
100

200
200

18080480

200

100
100

300
300

= VCC)0.50.5µs

+ RB for 15 V operation. The maximum total (RA + RB) is 20 MΩ for +15 V

A

) on the threshold pin to the transition from high to low on the

CC

Unit

V

mV

ns

Doc ID 2182 Rev 6 5/20

Electrical characteristics NE555 - SA555 - SE555

Figure 3. Minimum pulse width required for

triggering

Figure 4. Supply current versus supply

voltage

Figure 5. Delay time versus temperature Figure 6. Low output voltage versus output

sink current

Figure 7. Low output voltage versus output

Figure 8. Low output voltage versus output

sink current

6/20 Doc ID 2182 Rev 6

sink current

NE555 - SA555 - SE555 Electrical characteristics

Figure 9. High output voltage drop versus

output

Figure 11. Propagation delay versus voltage

level of trigger value

Figure 10. Delay time versus supply voltage

Doc ID 2182 Rev 6 7/20

Application information NE555 - SA555 - SE555

4 Application information

4.1 Monostable operation

In the monostable mode, the timer generates a single pulse. As shown in Figure 12, the
external capacitor is initially held discharged by a transistor inside the timer.

Figure 12. Typical schematics in monostable operation

V

= 5 to 15V

CC

Reset

R1

4

8

Trigger

Output

The circuit triggers on a negative-going input signal when the level reaches 1/3 V

2

NE555

3

1

7

6

Control Voltage

5

0.01

μ

C1

F

. Once

CC

triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered
again during this interval. The duration of the output HIGH state is given by t = 1.1 R

1C1

and

is easily determined by Figure 14.

Note that because the charge rate and the threshold level of the comparator are both
directly proportional to supply voltage, the timing interval is independent of supply. Applying
a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2)
during the timing cycle discharges the external capacitor and causes the cycle to start over.
The timing cycle now starts on the positive edge of the reset pulse. During the time the reset
pulse is applied, the output is driven to its LOW state.

When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short­circuit across the external capacitor and driving the output HIGH. The voltage across the
capacitor increases exponentially with the time constant t = R
the capacitor equals 2/3 V

, the comparator resets the flip-flop which then discharges the

CC

. When the voltage across

1C1

capacitor rapidly and drives the output to its LOW state.

Figure 13 shows the actual waveforms generated in this mode of operation.

When Reset is not used, it should be tied high to avoid any possibility of unwanted
triggering.

8/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Application information

Figure 13. Waveforms in monostable operation

t = 0.1 ms / div

INPUT = 2.0V/div

OUTPUT VOLTAGE = 5.0V/div

CAPACITOR VOLTAGE = 2.0V/div

R1 = 9.1kΩ, C1 = 0.01μF, R = 1kΩ

L

Figure 14. Pulse duration versus R1C1

(μF)

1.0

0.1

0.01

0.001

4.2 Astable operation

When the circuit is connected as shown in Figure 15 (pins 2 and 6 connected) it triggers
itself and free runs as a multi-vibrator. The external capacitor charges through R
and discharges through R
ratio of these two resistors.

In the astable mode of operation, C
As in the triggered mode, the charge and discharge times and, therefore, frequency are
independent of the supply voltage.

C

10

10 100 1.0 10 100 10 (t )

μs μs

only. Thus the duty cycle can be set accurately by adjusting the

2

charges and discharges between 1/3 VCC and 2/3 VCC.

1

Ω

1k

=

10k

Ω

Ω

k

00

Ω

1

1M

Ω

M

10

R1

ms ms mss

d

and R2

1

Doc ID 2182 Rev 6 9/20

Application information NE555 - SA555 - SE555

Figure 15. Typical schematics in astable operation

= 5 to 15V

V

CC

R1

4

8

Output

0.01μF

Control

Voltage

3

NE555

5

1

7

R2

6

2

C1

Figure 16 shows the actual waveforms generated in this mode of operation.

The charge time (output HIGH) is given by:

t1 = 0.693 (R

+ R2) C

1

1

and the discharge time (output LOW) by:

t2 = 0.693 (R

2

) C

1

Thus the total period T is given by:

T = t1 + t2 = 0.693 (R1 + 2R2) C1

The frequency of oscillation is then:

f =

1

---

T

1.44

-------------------------------------- -=

R1 2R2+()C1

It can easily be found from Figure 17.

The duty cycle is given by:

t1

---------------------

t1 t2+()

10/20 Doc ID 2182 Rev 6

R1 R2+()

----------------------------------- - 1
R1 2 R2•+()

R2

-------------------------- -

–==

R1 R2+()

NE555 - SA555 - SE555 Application information

Figure 16. Waveforms in astable operation

t = 0.5 ms / div

OUTPUT VOLTAGE = 5.0V/div

CAPACITOR VOLTAGE = 1.0V/div

R1 = R2 = 4.8kΩ, C1= 0.1μF, R = 1k

L

Figure 17. Free running frequency versus R1, R2 and C

C

(μF)

10

1.0

0.1

0.01

R

1

+

R

2

1

0

1

M

Ω

=

1

0

M

Ω

0.001

0.1 1 10 100 1k 10k f (Hz)

1

k

Ω

1

0

k

Ω

0

k

Ω

Ω

1

o

Doc ID 2182 Rev 6 11/20

Application information NE555 - SA555 - SE555

4.3 Pulse width modulator

When the timer is connected in the monostable mode and triggered with a continuous pulse
train, the output pulse width can be modulated by a signal applied to pin 5. Figure 18 shows
the circuit.

Figure 18. Pulse width modulator

V

CC

R

A

4

8

Trigger

Output

4.4 Linear ramp

When the pull-up resistor, RA, in the monostable circuit is replaced by a constant current
source, a linear ramp is generated. Figure 19 shows a circuit configuration that will perform
this function.

Figure 19. Linear ramp

2

NE555

3

1

4

8

7

6

Modulation

Input

5

R

E

C

V

CC

R1

Trigger

2

NE555

Output

12/20 Doc ID 2182 Rev 6

3

1

7

6

5

2N4250

or equiv.

C

R2

0.01μF

NE555 - SA555 - SE555 Application information

Figure 20 shows the waveforms generator by the linear ramp.

The time interval is given by:

(2/3 Vcc RE (R1+R2) C

--------------------------------------------------------------- -

T =

R1 Vcc - VBE (R1+R2)

VBE = 0.6V

Figure 20. Linear ramp

V

= 5 V

CC

Time:
20 µs/DIV

+ 47 kΩ

R

1

R2 = 100 kΩ
RE = 2.7 kΩ
C = 0.01 µF

Top trace: input 3 V/DIV
Middle trace: output 5 V/DIV
Bottom trace: output 5 V/DIV
Bottom trace: capacitor voltage 1 V/DIV

4.5 50% duty cycle oscillator

For a 50% duty cycle, the resistors RA and RB can be connected as in Figure 21. The time
period for the output high is the same as for astable operation (see Section 4.2 on page 9):

t1 = 0.693 R

For the output low it is

Thus the frequency of oscillation is:

C

A

t2[(R. RB)/(RA+RB)].C.Ln

=

Doc ID 2182 Rev 6 13/20

RB 2RA–

-------------------------- -

2RB RA–

1

f

---------------- -=
t1 t2+

Application information NE555 - SA555 - SE555

Figure 21. 50% duty cycle oscillator

V

CC

4

2

8

R

22k

B

Ω

7

R

51k

V

CC

A

Ω

Out

3

Note that this circuit will not oscillate if R
and R

cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator.

B

4.6 Additional information

Adequate power supply bypassing is necessary to protect associated circuitry. The
minimum recommended is 0.1 µF in parallel with 1 µF electrolytic.

NE555

1

is greater than 1/2 RA because the junction of RA

B

6

5

0.01μF
C

0.01μF

14/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Package information

5 Package information

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

Doc ID 2182 Rev 6 15/20

Package information NE555 - SA555 - SE555

5.1 DIP8 package information

Figure 22. DIP8 package mechanical drawing

Table 4. DIP8 package mechanical data

Dimensions

Ref.

Min. Typ. Max. Min. Typ. Max.

A5.33 0.210

A1 0.380.015

A2 2.92 3.30 4.95 0.115 0.1300.195

b0.36 0.46 0.56 0.014 0.018 0.022

b2 1.14 1.52 1.78 0.045 0.060 0.070

c0.200.250.36 0.008 0.010 0.014

D 9.02 9.27 10.16 0.355 0.365 0.400

E 7.62 7.87 8.26 0.300 0.310 0.325

E1 6.10 6.35 7.11 0.240 0.250 0.280

e 2.54 0.100

eA 7.62 0.300

eB 10.92 0.430

L2.923.30 3.81 0.115 0.1300.150

Millimeters Inches

16/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Package information

5.2 SO-8 package information

Figure 23. SO-8 package mechanical drawing

Table 5. SO-8 package mechanical data

Dimensions

Ref.

Min. Typ. Max. Min. Typ. Max.

A1.750.069

A1 0.10 0.25 0.004 0.010

A2 1.25 0.049

b 0.28 0.48 0.011 0.019

c0.17 0.23 0.007 0.010

D 4.80 4.90 5.00 0.189 0.193 0.197

E 5.80 6.00 6.20 0.228 0.2360.244

E1 3.80 3.90 4.00 0.150 0.154 0.157

e 1.27 0.050

h 0.25 0.50 0.010 0.020

L 0.40 1.27 0.016 0.050

L1 1.04 0.040

k 0 8° 1° 8°

Millimeters Inches

ccc 0.10 0.004

Doc ID 2182 Rev 6 17/20

Ordering information NE555 - SA555 - SE555

6 Ordering information

Table 6. Order codes

Part number Temperature range Package Packing Marking

NE555N

NE555D

(1)

/DT

0 °C, +70 °C

SA555N

SA555D

(1)

/DT SO-8 Tube

-40 °C, +105 °C

SE555N

SE555D

1. Not recommended for new design. Contact local ST sales office for availability.

(1)

/DT SO-8 Tube

-55 °C, + 125 °C

DIP8 Tube NE555N

SO-8 Tube

(1)

DIP8 Tube SA555N

(1)

DIP8 Tube SE555N

(1)

or tape & reel NE555

or tape & reel SA555

or tape & reel SE555

18/20 Doc ID 2182 Rev 6

NE555 - SA555 - SE555 Revision history

7 Revision history

Table 7. Document revision history

Date Revision Changes

01-Jun-2003 1 Initial release.

2004-2006 2-3 Internal revisions

15-Mar-2007 4

06-Nov-2008 5

Expanded order code table.
Template update.

Added I

value in Table 1: Absolute maximum ratings and

OUT

Table 2: Operating conditions.

Added ESD tolerance, latch-up tolerance, R

Table 1: Absolute maximum ratings.

thja

and R

thjc

in

04-Jan-2012 6

Modified duty cycle equation in Section 4.2: Astable operation.

®

Updated ECOPACK

text in Section 5: Package information.

Added footnote 1 to Table 6: Order codes as shipping method in
tubes is not recommended for new design.

Doc ID 2182 Rev 6 19/20

NE555 - SA555 - SE555

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20/20 Doc ID 2182 Rev 6