LM2736 Thin SOT 750 mA Load Step-Down DC-DC Regulator
1Features3Description
1
•Thin SOT-6 Package
•3.0 V to 18 V Input Voltage Range
•1.25 V to 16 V Output Voltage Range
•750 mA Output Current
•550 kHz (LM2736Y) and 1.6 MHz (LM2736X)
Switching Frequencies
•350 mΩ NMOS Switch
•30 nA Shutdown Current
•1.25 V, 2% Internal Voltage Reference
•Internal Soft-Start
•Current-Mode, PWM Operation
•WEBENCH®Online Design Tool
•Thermal Shutdown
2Applications
•Local Point of Load Regulation
•Core Power in HDDs
•Set-Top Boxes
•Battery Powered Devices
•USB Powered Devices
•DSL Modems
•Notebook Computers
The LM2736 regulator is a monolithic, high frequency,
PWM step-down DC/DC converter in a 6-pin Thin
SOT package. It provides all the active functions to
provide local DC/DC conversion with fast transient
response and accurate regulation in the smallest
possible PCB area.
With a minimum of external components and online
design support through WEBENCH®, the LM2736 is
easy to use. The ability to drive 750 mA loads with an
internal 350 mΩ NMOS switch using state-of-the-art
0.5 µm BiCMOS technology results in the best power
density available. The world class control circuitry
allows for on-times as low as 13 ns, thus supporting
exceptionally high frequency conversion over the
entire 3 V to 18 V input operating range down to the
minimumoutput voltage of1.25 V.Switching
frequency is internally set to 550 kHz (LM2736Y) or
1.6 MHz (LM2736X), allowing the use of extremely
small surface mount inductors and chip capacitors.
Even though the operating frequencies are very high,
efficiencies up to 90% are easy to achieve. External
shutdown is included, featuring an ultra-low stand-by
current of 30 nA. The LM2736 utilizes current-mode
control and internal compensation to provide highperformanceregulation overawide rangeof
operating conditions. Additionalfeatures include
internal soft-start circuitry to reduce inrush current,
pulse-by-pulse current limit, thermal shutdown, and
output over-voltage protection.
LM2736
Device Information
PART NUMBERPACKAGEBODY SIZE (NOM)
LM2736SOT (6)2.90 mm x 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
(1)
Typical Application Circuit
Efficiency vs. Load Current "X"
VIN= 5 V, V
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (October 2014) to Revision HPage
•Updated Design Requirements and moved Bill of Materials to Detailed Design Procedures.............................................. 13
Changes from Revision F (April 2013) to Revision GPage
•Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of T
and TA. The maximum allowable power dissipation at any ambient temperature is PD= (T
packages soldered directly onto a 3” x 3” PC board with 2oz. copper on 4 layers in still air. For a 2 layer board using 1 oz. copper in still
air, θJA= 204°C/W.
Specifications with standard typeface are for TJ= 25°C unless otherwise specified. Datasheet min/max specification limits are
ensured by design, test, or statistical analysis.
PARAMETERTEST CONDITIONSUNIT
V
Feedback Voltage1.2501.2251.275V
FB
MIN
ΔVFB/Δ Feedback Voltage LineVIN= 3V to 18V
V
I
FB
Regulation
IN
Feedback Input Bias
Current
Sink/Source10250nA
Undervoltage LockoutVINRising2.742.90
UVLOUndervoltage LockoutVINFalling2.32.0V
UVLO Hysteresis0.440.300.62
F
SW
D
MAX
D
MIN
R
DS(ON)
I
CL
I
Q
Switching FrequencyMHz
Maximum Duty Cycle
Minimum Duty Cycle
Switch ON ResistanceV
Switch Current LimitV
Quiescent CurrentSwitching1.52.5mA
The LM2736 device is a constant frequency PWM buck regulator IC that delivers a 750 mA load current. The
regulator has a preset switching frequency of either 550 kHz (LM2736Y) or 1.6 MHz (LM2736X). These high
frequencies allow the LM2736 device to operate with small surface mount capacitors and inductors, resulting in
DC/DC converters that require a minimum amount of board space. The LM2736 device is internally
compensated, so it is simple to use, and requires few external components. The LM2736 device uses currentmode control to regulate the output voltage.
The following operating description of the LM2736 device will refer to the Simplified Block Diagram (Functional
Block Diagram) and to the waveforms in Figure 11. The LM2736 device supplies a regulated output voltage by
switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle
begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the
output control logic turns on the internal NMOS control switch. During this on-time, the SW pin voltage (VSW)
swings up to approximately VIN, and the inductor current (IL) increases with a linear slope. ILis measured by the
current-sense amplifier, which generates an output proportional to the switch current. The sense signal is
summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional
to the difference between the feedback voltage and V
output switch turns off until the next switching cycle begins. During the switch off-time, inductor current
discharges through Schottky diode D1, which forces the SW pin to swing below ground by the forward voltage
(VD) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.
. When the PWM comparator output goes high, the
REF
Figure 11. LM2736 Waveforms of SW Pin Voltage and Inductor Current
The overvoltage comparator compares the FB pin voltage to a voltage that is 10% higher than the internal
reference Vref. Once the FB pin voltage goes 10% above the internal reference, the internal NMOS control
switch is turned off, which allows the output voltage to decrease toward regulation.
7.3.2 Undervoltage Lockout
Undervoltage lockout (UVLO) prevents the LM2736 device from operating until the input voltage exceeds 2.74 V
(typ).
The UVLO threshold has approximately 440mV of hysteresis, so the part will operate until VINdrops below 2.3 V
(typ). Hysteresis prevents the part from turning off during power up if VINis non-monotonic.
7.3.3 Current Limit
The LM2736 device uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle,
a current limit comparator detects if the output switch current exceeds 1.5 A (typ), and turns off the switch until
the next switching cycle begins.
7.3.4 Thermal Shutdown
Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature
exceeds 165°C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature
drops to approximately 150°C.
The LM2736 device has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is
applied to EN, the part is in shutdown mode and its quiescent current drops to typically 30 nA. Switch leakage
adds another 40 nA from the input supply. The voltage at this pin should never exceed VIN+ 0.3 V.
7.4.2 Soft-Start
This function forces V
reference voltage ramps from 0 V to its nominal value of 1.25 V in approximately 200 µs. This forces the
regulator output to ramp up in a more linear and controlled fashion, which helps reduce inrush current.
to increase at a controlled rate during start up. During soft-start, the error amplifier’s
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Boost Function
Capacitor C
drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time,
V
needs to be at least 1.6 V greater than VSW. Although the LM2736 device will operate with this minimum
BOOST
voltage, it may not have sufficient gate drive to supply large values of output current. Therefore, it is
recommended that V
the maximum operating limit of 5.5 V.
5.5 V > V
BOOST
and diode D2 in Figure 12 are used to generate a voltage V
BOOST
be greater than 2.5 V above VSWfor best efficiency. V
BOOST
– VSW> 2.5 V for best performance.
BOOST
BOOST
. V
- VSWis the gate
BOOST
– VSWshould not exceed
Figure 12. V
Charges C
OUT
BOOST
When the LM2736 device starts up, internal circuitry from the BOOST pin supplies a maximum of 20 mA to
C
source current to C
There are various methods to derive V
. This current charges C
BOOST
to a voltage sufficient to turn the switch on. The BOOST pin will continue to
BOOST
until the voltage at the feedback pin is greater than 1.18 V.
BOOST
:
BOOST
1. From the input voltage (VIN)
2. From the output voltage (V
3. From an external distributed voltage rail (V
OUT
)
)
EXT
4. From a shunt or series zener diode
In the Functional Block Diagram, capacitor C
switch. Capacitor C
NMOS control switch is off (T
is charged via diode D2 by VIN. During a normal switching cycle, when the internal
BOOST
) (refer to Figure 11), V
OFF
during which the current in the inductor (L) forward biases the Schottky diode D1 (V
stored across C
V
- VSW= VIN- V
BOOST
BOOST
is
+ V
FD2
FD1
and diode D2 supply the gate-drive current for the NMOS
BOOST
equals VINminus the forward voltage of D2 (V
BOOST
). Therefore the voltage
FD1
FD2
),
(1)
When the NMOS switch turns on (TON), the switch pin rises to
VSW= VIN– (R
forcing V
V
BOOST
to rise thus reverse biasing D2. The voltage at V
BOOST
= 2VIN– (R
which is approximately
2 VIN- 0.4 V(4)
for many applications. Thus the gate-drive voltage of the NMOS switch is approximately
An alternate method for charging C
voltage should be between 2.5 V and 5.5 V, so that proper gate voltage will be applied to the internal switch. In
this circuit, C
provides a gate drive voltage that is slightly less than V
BOOST
In applications where both VINand V
directly from these voltages. If VINand V
minus a zener voltage by placing a zener diode D3 in series with D2, as shown in Figure 13. When using a
series zener diode from the input, ensure that the regulation of the input supply doesn’t create a voltage that falls
outside the recommended V
(V
(V
– VD3) < 5.5 V(6)
INMAX
– VD3) > 1.6 V(7)
INMIN
BOOST
voltage.
is to connect D2 to the output as shown in Figure 12. The output
BOOST
.
OUT
are greater than 5.5 V, or less than 3 V, C
OUT
are greater than 5.5 V, C
OUT
BOOST
can be charged from VINor V
cannot be charged
BOOST
OUT
Figure 13. Zener Reduces Boost Voltage from V
IN
An alternative method is to place the zener diode D3 in a shunt configuration as shown in Figure 14. A small 350
mW to 500 mW 5.1 V zener in a SOT or SOD package can be used for this purpose. A small ceramic capacitor
such as a 6.3 V, 0.1 µF capacitor (C4) should be placed in parallel with the zener diode. When the internal
NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The 0.1 µF
parallel shunt capacitor ensures that the V
voltage is maintained during this time.
BOOST
Resistor R3 should be chosen to provide enough RMS current to the zener diode (D3) and to the BOOST pin. A
recommended choice for the zener current (I
) is 1 mA. The current I
ZENER
into the BOOST pin supplies the
BOOST
gate current of the NMOS control switch and varies typically according to the following formula for the X version:
I
= 0.49 x (D + 0.54) x (V
BOOST
I
can be calculated for the Y version using the following:
BOOST
I
= 0.20 x (D + 0.54) x (V
BOOST
where D is the duty cycle, V
ZENER
– VD2) mA(8)
ZENER
- VD2) µA(9)
ZENER
and VD2are in volts, and I
is in milliamps. V
BOOST
is the voltage applied to
ZENER
the anode of the boost diode (D2), and VD2is the average forward voltage across D2. Note that this formula for
I
gives typical current. For the worst case I
BOOST
, increase the current by 40%. In that case, the worst case
BOOST
boost current will be
I
BOOST-MAX
= 1.4 x I
BOOST
(10)
R3 will then be given by
R3 = (VIN- V
For example, using the X-version let VIN= 10 V, V
ZENER
) / (1.4 x I
BOOST
+ I
)(11)
ZENER
= 5 V, VD2= 0.7 V, I
ZENER
= 1 mA, and duty cycle D =
ZENER
50%. Then
I
= 0.49 x (0.5 + 0.54) x (5 - 0.7) mA = 2.19mA(12)
BOOST
R3 = (10 V - 5 V) / (1.4 x 2.19 mA + 1 mA) = 1.23 kΩ(13)
The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN) as
shown in Equation 14:
(14)
The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to
calculate a more accurate duty cycle. Use Equation 15 to Calculate D.
(15)
VSWcan be approximated by:
VSW= IOx R
DS(ON)
The diode forward drop (VD) can range from 0.3 V to 0.7 V depending on the quality of the diode. The lower V
is, the higher the operating efficiency of the converter.
The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor,
but increase the output ripple current. An increase in the inductor value will decrease the output ripple current.
The ratio of ripple current (ΔiL) to output current (IO) is optimized when it is set between 0.3 and 0.4 at 750 mA.
The ratio r is defined in .
(16)
D
One must also ensure that the minimum current limit (1.0 A) is not exceeded, so the peak current in the inductor
must be calculated. Use Equation 18 to calculate the peak current (I
If r = 0.7 at an output of 750 mA, the peak current in the inductor will be 1.0125 A. The minimum ensured current
limit over all operating conditions is 1.0 A. One can either reduce r to 0.6 resulting in a 975 mA peak current, or
make the engineering judgement that 12.5 mA over will be safe enough with a 1.5 A typical current limit and 6
sigma limits. When the designed maximum output current is reduced, the ratio r can be increased. At a current of
0.1 A, r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is
actually quite low, and if r remains constant the inductor value can be made quite large. Equation 19 is
empirically developed for the maximum ripple ratio at any current below 2 A.
Note that this is just a guideline.
The LM2736 device operates at frequencies allowing the use of ceramic output capacitors without compromising
transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple.
See the Output Capacitor section for more details on calculating output voltage ripple.
Now that the ripple current or ripple ratio is determined, the inductance is calculated using Equation 20
where fsis the switching frequency and IOis the output current. When selecting an inductor, make sure that it is
capable of supporting the peak output current without saturating. Inductor saturation will result in a sudden
reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal
current limit, the peak current of the inductor need only be specified for the required maximum output current. For
example, if the designed maximum output current is 0.5 A and the peak current is 0.7 A, then the inductor should
be specified with a saturation current limit of >0.7 A. There is no need to specify the saturation or peak current of
the inductor at the 1.5 A typical switch current limit. The difference in inductor size is a factor of 5. Because of the
operating frequency of the LM2736, ferrite based inductors are preferred to minimize core losses. This presents
little restriction since the variety of ferrite based inductors is huge. Lastly, inductors with lower series resistance
(DCR) will provide better operating efficiency. For recommended inductors see Example Circuits.
8.2.1.2.2 Input Capacitor
An input capacitor is necessary to ensure that VINdoes not drop excessively during switching transients. The
primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent
Series Inductance). The recommended input capacitance is 10-µF, although 4.7-µF works well for input voltages
below 6 V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any
recommended deratings and also verify if there is any significant change in capacitance at the operating input
voltage and the operating temperature. The input capacitor maximum RMS input current rating (I
RMS-IN
) must be
greater than:
(21)
It can be shown from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always
calculate the RMS at the point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually
determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL
and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LM2736, certain
capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required to
provide stable operation. As a result, surface mount capacitors are strongly recommended. Sanyo POSCAP,
Tantalum or Niobium, Panasonic SP or Cornell Dubilier ESR, and multilayer ceramic capacitors (MLCC) are all
good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use
X7R or X5R dielectrics. Consult capacitor manufacturer datasheet to see how rated capacitance varies over
operating conditions.
8.2.1.2.3 Output Capacitor
The output capacitor is selected based upon the desired output ripple and transient response. The initial current
of a load transient is provided mainly by the output capacitor. The output ripple of the converter is:
(22)
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the
output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the
availability and quality of MLCCs and the expected output voltage of designs using the LM2736, there is really no
need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass
high frequency noise. A certain amount of switching edge noise will couple through parasitic capacitances in the
inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not. Since the output
capacitor is one of the two external components that control the stability of the regulator control loop, most
applications will require a minimum at 10-µF of output capacitance. Capacitance can be increased significantly
with little detriment to the regulator stability. Like the input capacitor, recommended multilayer ceramic capacitors
are X7R or X5R. Again, verify actual capacitance at the desired operating voltage and temperature.
Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet
the following condition:
The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching
times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than:
ID1= IOx (1-D)(24)
The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.
To improve efficiency choose a Schottky diode with a low forward voltage drop.
8.2.1.2.5 Boost Diode
A standard diode such as the 1N4148 type is recommended. For V
circuits derived from voltages less than
BOOST
3.3 V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small
signal diode.
8.2.1.2.6 Boost Capacitor
A ceramic 0.01-µF capacitor with a voltage rating of at least 16 V is sufficient. The X7R and X5R MLCCs provide
the best performance.
8.2.1.2.7 Output Voltage
The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and
R1 is connected between VOand the FB pin. A good value for R2 is 10 kΩ.
8.2.1.3 Application Curves
V
= 5 VV
OUT
Figure 16. Efficiency vs Load Current - "X"Figure 17. Efficiency vs Load Current - "Y"
An alternative method when VINis greater than 5.5V is to place the zener diode D3 in a shunt configuration. A
small 350 mW to 500 mW 5.1 V zener in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3 V, 0.1 µF capacitor (C4) should be placed in parallel with the zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1 µF parallel shunt capacitor ensures that the V
Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
BOOST
Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
BOOST
8.2.4.1 Design Requirements
In applications where both VINand V
directly from these voltages. If VINis greater than 5.5 V, C
are greater than 5.5 V, or less than 3 V, C
OUT
can be charged from VINminus a zener voltage
BOOST
cannot be charged
BOOST
by placing a zener diode D3 in series with D2. When using a series zener diode from the input, ensure that the
regulation of the input supply doesn’t create a voltage that falls outside the recommended V
(V
(V
– VD3) < 5.5 V(26)
INMAX
– VD3) > 1.6 V(27)
INMIN
BOOST
voltage.
8.2.4.2 Detailed Design Procedure
Table 4. Bill of Materials for Figure 24
PART IDPART VALUEPART NUMBERMANUFACTURER
U1750 mA Buck RegulatorLM2736XTI
C1, Input Cap10-µF, 25 V, X7RC3225X7R1E106MTDK
C2, Output Cap22-µF, 6.3 V, X5RC3216X5ROJ226MTDK
C3, Boost Cap0.01-µF, 16 V, X7RC1005X7R1C103KTDK
D1, Catch Diode0.4 VFSchottky 1 A, 30VRSS1P3LVishay
D2, Boost Diode1VF@ 50 mA Diode1N4148WDiodes, Inc.
D3, Zener Diode11 V 350 Mw SOTBZX84C11TDiodes, Inc.
L16.8µH, 1.6 A,SLF7032T-6R8M1R6TDK
R12 kΩ, 1%CRCW06032001FVishay
R210 kΩ, 1%CRCW06031002FVishay
R3100 kΩ, 1%CRCW06031003FVishay
An alternative method when VINis greater than 5.5V is to place the zener diode D3 in a shunt configuration. A
small 350 mW to 500 mW 5.1 V zener in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3 V, 0.1 µF capacitor (C4) should be placed in parallel with the zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1 µF parallel shunt capacitor ensures that the V
Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
BOOST
Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
BOOST
8.2.9.1 Design Requirements
In applications where both VINand V
directly from these voltages. If VINis greater than 5.5 V, C
are greater than 5.5 V, or less than 3 V, C
OUT
can be charged from VINminus a zener voltage
BOOST
cannot be charged
BOOST
by placing a zener diode D3 in series with D2. When using a series zener diode from the input, ensure that the
regulation of the input supply doesn’t create a voltage that falls outside the recommended V
Input voltage is rated as 3 V to 18 V however care should be taken in certain circuit configurations eg. V
derived from VINwhere the requirement that V
V
should be at least 2.5 V above VSW.
BOOST
- VSW< 5.5 V should be observed. Also for best efficiency
BOOST
BOOST
The voltage on the Enable pin should not exceed VINby more than 0.3 V.
10Layout
10.1 Layout Guidelines
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing the layout is the close coupling of the GND connections of the C
capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the
GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in
importance is the location of the GND connection of the C
connections of CINand D1.
There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching
node island.
The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup
and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND
of R2 placed as close as possible to the GND of the IC. The V
inductor and any other traces that are switching.
High AC currents flow through the VIN, SW and V
traces, so they should be as short and wide as possible.
OUT
However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated
noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close as possible to the IC. Please see Application Note
AN-1229 SNVA054 for further considerations and the LM2736 device demo board as an example of a four-layer
layout.
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
WEBENCH, SIMPLE SWITCHER are registered trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
LM2736XMKNRNDSOTDDC61000TBDCall TICall TI-40 to 125SHAB
LM2736XMK/NOPBACTIVESOTDDC61000Green (RoHS
LM2736XMKX/NOPBACTIVESOTDDC63000Green (RoHS
LM2736YMKNRNDSOTDDC61000TBDCall TICall TI-40 to 125SHBB
LM2736YMK/NOPBACTIVESOTDDC61000Green (RoHS
LM2736YMKX/NOPBACTIVESOTDDC63000Green (RoHS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Lead/Ball Finish
(6)
CU SNLevel-1-260C-UNLIM-40 to 125SHAB
CU SNLevel-1-260C-UNLIM-40 to 125SHAB
CU SNLevel-1-260C-UNLIM-40 to 125SHBB
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MSL Peak Temp
(3)
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(4/5)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
22-Dec-2014
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