Texas Instruments LM2727MTC, LM2737MTC Schematic [ru]

LM27x7

HG

BOOT

I

SEN

LG

PGND

FB

V

CC

SD

PWGD

FREQ

SS

SGND

EAO

PGND

+5V

VIN = 3.3V

VO = 1.2V@5A

CO1,2

2200PF

6.3V, 2.8A

1.5 PH

6.1 A, 9.6 m:

R

FB2

C

C2

R

C1

R

CS

C

SS

R

FADJ

R

IN

C

IN

D1

C

BOOT

Q1

Q2

10PF

6.3V

10k

2.2k

10k

392k

2.2p

180p

12n

63.4k

2.2PF

10:

0.1P
CIN1,2

L1

+

C

C1

R

FB1

Si4884DY

Si4884DY

LM2727, LM2737

www.ti.com

SNVS205D –AUGUST 2002–REVISED MARCH 2013

LM2727/LM2737 N-Channel FET Synchronous Buck Regulator Controller for Low Output

Voltages

Check for Samples: LM2727, LM2737

1

FEATURES

2

• Input Power from 2.2V to 16V

• Output Voltage Adjustable Down to 0.6V

• Power Good flag, Adjustable Soft-Start and
Output Enable for Easy Power Sequencing

• Output Over-Voltage and Under-Voltage Latch­Off (LM2727)

• Output Over-Voltage and Under-Voltage Flag
(LM2737)

• Reference Accuracy: 1.5% (0°C - 125°C)

• Current Limit Without Sense Resistor

• Soft Start

• Switching Frequency from 50 kHz to 2 MHz adjusting the value of an external resistor. Current

• TSSOP-14 Package

APPLICATIONS

• Cable Modems

• Set-Top Boxes/ Home Gateways

• DDR Core Power

• High-Efficiency Distributed Power

• Local Regulation of Core Power

DESCRIPTION

The LM2727 and LM2737 are high-speed,
synchronous, switching regulator controllers. They
are intended to control currents of 0.7A to 20A with
up to 95% conversion efficiencies. The LM2727
employs output over-voltage and under-voltage latch­off. For applications where latch-off is not desired, the
LM2737 can be used. Power up and down
sequencing is achieved with the power-good flag,
adjustable soft-start and output enable features. The
LM2737 and LM2737 operate from a low-current 5V
bias and can convert from a 2.2V to 16V power rail.
Both parts utilize a fixed-frequency, voltage-mode,
PWM control architecture and the switching
frequency is adjustable from 50kHz to 2MHz by

limit is achieved by monitoring the voltage drop
across the on-resistance of the low-side MOSFET,
which enhances low duty-cycle operation. The wide
range of operating frequencies gives the power
supply designer the flexibility to fine-tune component
size, cost, noise and efficiency. The adaptive, non­overlapping MOSFET gate-drivers and high-side
bootstrap structure helps to further maximize
efficiency. The high-side power FET drain voltage can
be from 2.2V to 16V and the output voltage is
adjustable down to 0.6V.

Typical Application

1

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright © 2002–2013, Texas Instruments Incorporated

LM27x7

HG

BOOT

ISEN

LG
PGND

FB

Vcc

SD

PWGD

FREQ

SS

SGND

EAO

PGND

1
2
3
4
5
6
7 8

9

10

11

12

13

14

LM2727, LM2737

SNVS205D –AUGUST 2002–REVISED MARCH 2013

www.ti.com

Connection Diagram

Figure 1. 14-Lead Plastic TSSOP

θ

= 155°C/W

See Package Number PW0014A

BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the regulator

input voltage to properly turn on the high-side N-FET.

LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-through problems.
PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground.
SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground.
VCC(Pin 5) - Supply rail for the controller.
PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP, or UVLO mode. During

normal operation, this pin is connected to VCCor other voltage source through a pull-up resistor.
ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50µA current. A resistor of appropriate value should be connected

between this pin and the drain of the low-side FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to determine

the duty cycle. This pin is necessary for compensating the control loop.
SS (Pin 9) - Soft start pin. A capacitor connected between this pin and ground sets the speed at which the output voltage ramps up. Larger

capacitor value results in slower output voltage ramp but also lower inrush current.
FB (Pin 10) - This is the inverting input of the error amplifier, which is used for sensing the output voltage and compensating the control

loop.

FREQ (Pin 11) - The switching frequency is set by connecting a resistor between this pin and ground.
SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low the chip turns off the high side switch and turns on the low side switch. While

this pin is low, the IC will not start up. An internal 20µA pull-up connects this pin to VCC.

HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG to avoid shoot-through problems.

JA

PIN DESCRIPTION

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LM2727 LM2737

LM2727, LM2737

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Absolute Maximum Ratings

V

CC

(1)(2)

SNVS205D –AUGUST 2002–REVISED MARCH 2013

BOOTV 21V
Junction Temperature 150°C
Storage Temperature −65°C to 150°C
Soldering Information
Lead Temperature (soldering, 10sec) 260°C
Infrared or Convection (20sec) 235°C
ESD Rating

(3)

2 kV

(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for

which the device operates correctly. Opearting Ratings do not imply ensured performance limits.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3) The human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin.

Operating Ratings

Supply Voltage (VCC) 4.5V to 5.5V
Junction Temperature Range −40°C to +125°C
Thermal Resistance (θJA) 155°C/W

Electrical Characteristics

VCC= 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25°C. Limits appearing in
boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are ensured by design,
test, or statistical analysis.

Symbol Parameter Conditions Min Typ Max Units

VCC= 4.5V, 0°C to +125°C 0.591 0.6 0.609
VCC= 5V, 0°C to +125°C 0.591 0.6 0.609

V

FB_ADJ

V

I

Q-V5

t

PWGD1

t

PWGD2

I

I

SS-ON

I

SS-OC

I

SEN-TH

SD

ON

FB Pin Voltage V

UVLO Thresholds Rising 4.2

Operating VCCCurrent mA

Shutdown VCCCurrent SD = 0V 0.15 0.4 0.7 mA
PWGD Pin Response Time FB Voltage Going Up 6 µs
PWGD Pin Response Time FB Voltage Going Down 6 µs
SD Pin Internal Pull-up Current 20 µA
SS Pin Source Current SS Voltage = 2.5V

SS Pin Sink Current During Over SS Voltage = 2.5V
Current

I

Pin Source Current Trip Point 0°C to +125°C 35 50 65

SEN

VCC= 5.5V, 0°C to +125°C 0.591 0.6 0.609
VCC= 4.5V, −40°C to +125°C 0.589 0.6 0.609
VCC= 5V, −40°C to +125°C 0.589 0.6 0.609
VCC= 5.5V, −40°C to +125°C 0.589 0.6 0.609

Falling 3.6
SD = 5V, FB = 0.55V

Fsw = 600kHz
SD = 5V, FB = 0.65V

Fsw = 600kHz

1 1.5 2

0.8 1.7 2.2

0°C to +125°C 8 11 15 µA

-40°C to +125°C 5 11 15
95 µA

-40°C to +125°C 28 50 65

µA

V

7V

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Electrical Characteristics (continued)

VCC= 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25°C. Limits appearing in
boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are ensured by design,
test, or statistical analysis.

Symbol Parameter Conditions Min Typ Max Units

ERROR AMPLIFIER

GBW Error Amplifier Unity Gain

Bandwidth

G Error Amplifier DC Gain 60 dB

SR Error Amplifier Slew Rate 6 V/µA

I

I

EAO

V

FB

EA

FB Pin Bias Current FB = 0.55V 0 15 100

FB = 0.65V 0 30 155

EAO Pin Current Sourcing and V
Sinking V

= 2.5, FB = 0.55V 2.8

EAO

= 2.5, FB = 0.65V 0.8

EAO

Error Amplifier Maximum Swing Minimum 1.2

Maximum 3.2

GATE DRIVE

I

Q-BOOT

BOOT Pin Quiescent Current BOOTV = 12V, EN = 0

0°C to +125°C 95 160 µA

-40°C to +125°C 95 215

R

DS1

R

DS2

R

DS3

R

DS4

Top FET Driver Pull-Up ON
resistance

Top FET Driver Pull-Down ON
resistance

Bottom FET Driver Pull-Up ON
resistance

Bottom FET Driver Pull-Down ON
resistance

BOOT-SW = 5V@350mA 3 Ω

BOOT-SW = 5V@350mA 2 Ω

BOOT-SW = 5V@350mA 3 Ω

BOOT-SW = 5V@350mA 2 Ω

OSCILLATOR

R

= 590kΩ 50

FADJ

R

= 88.7kΩ 300

FADJ

R

= 42.2kΩ, 0°C to +125°C 500 600 700

f

OSC

PWM Frequency kHz

D Max Duty Cycle f

FADJ

R

= 42.2kΩ, -40°C to +125°C 490 600 700

FADJ

R

= 17.4kΩ 1400

FADJ

R

= 11.3kΩ 2000

FADJ

= 300kHz 90 %

PWM

f

= 600kHz 88

PWM

LOGIC INPUTS AND OUTPUTS

V

SD-IH

V

SD-IL

V

PWGD-TH-LO

SD Pin Logic High Trip Point 2.6 3.5 V
SD Pin Logic Low Trip Point 0°C to +125°C 1.3 1.6

-40°C to +125°C 1.25 1.6

PWGD Pin Trip Points FB Voltage Going Down

0°C to +125°C 0.413 0.430 0.446 V

-40°C to +125°C 0.410 0.430 0.446

V

PWGD-TH-HI

PWGD Pin Trip Points FB Voltage Going Up

0°C to +125°C 0.691 0.710 0.734 V

-40°C to +125°C 0.688 0.710 0.734

V

PWGD-HYS

PWGD Hysteresis (LM2737 only) FB Voltage Going Down FB Voltage 35

Going Up 110

5 MHz

nA

mA

V

V

mV

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Product Folder Links: LM2727 LM2737

PWM FREQUENCY (kHz)

612

614

616

618

620

622

624

626

628

630

AMBIENT TEMPERATURE (oC)

0

10

20

25

35

45

55

65

75

85

95

105

115

125

7

7.2

7.4

7.6

7.8

8

8.2

8.4

8.6

BOOT PIN CURRENT (mA)

AMBIENT TEMPERATURE (oC)

0

10

20

25

35

45

55

65

75

85

95

105

115

125

AMBIENT TEMPERATURE (oC)

OPEARTING CURRENT(mA)

0 20

35

55

75

95

115

Without

Bootstrap

(V

boot

= 12V)

With

Bootstrap

(V

boot

= 5V)

1.46

1.48

1.5

1.52

1.54

1.56

1.58

1.6

1.62

1.64

BOOT PIN CURRENT (mA)

28.9

29.1

29.3

29.5

29.7

29.9

30.1

30.3

AMBIENT TEMPERATURE (oC)

0 10

20

25

35

45

55

65

75

85

95

105

115

125

20

30

40

50

60

70

80

90

100

0.2

1

3 5

7

9

OUTPUT CURRENT (A)

EFFICIENCY (%)

Vin = 5V

Vin = 12V

Vin = 3.3V

30

40

50

60

70

80

90

100

0.1 0.5

2

4

6

8

10

Vin = 5V

Vin = 12V

OUTPUT CURRENT (A)

EFFICIENCY (%)

LM2727, LM2737

www.ti.com

SNVS205D –AUGUST 2002–REVISED MARCH 2013

Typical Performance Characteristics

Efficiency (VO= 1.5V) Efficiency (VO= 3.3V)

FSW= 300kHz, TA= 25°C FSW= 300kHz, TA= 25°C

Figure 2. Figure 3.

VCCOperating Current Bootpin Current

FSW= 600kHz, No-Load FSW= 600kHz, Si4826DY FET, No-Load

vs vs

Temperature Temperature for BOOTV = 12V

Figure 4. Figure 5.

Bootpin Current PWM Frequency

vs vs

= 43.2kΩ

FADJ

Figure 6. Figure 7.

Temperature with 5V Bootstrap Temperature

FSW= 600kHz, Si4826DY FET, No-Load for R

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Product Folder Links: LM2727 LM2737

V

CC

PLUS BOOT CURRENT

0

5

10

15

20

25

30

35

40

100300 500 700 90011001300150017001900

PWM FREQUENCY (kHz)

10

15

20

25

30

900

1000

11001200

1300

1400

1500

1600

1700

1800

1900

PWM FREQUENCY (kHz)

RF-ADJ (k:)

PWM FREQUENCY (kHz)

RF-ADJ (k:)

0

100

200

300

400

500

100 150

200

250

300350400

450

500600

700

800

LM2727, LM2737

SNVS205D –AUGUST 2002–REVISED MARCH 2013

Typical Performance Characteristics (continued)

R

FADJ

vs vs

(in 100 to 800kHz range), TA= 25°C (in 900 to 2000kHz range), TA= 25°C

VCCOperating Current Plus Boot Current vs IO= 3A, CSS= 10nF

PWM Frequency (Si4826DY FET, TA= 25°C) FSW= 600kHz

PWM Frequency PWM Frequency

Figure 8. Figure 9.

R

FADJ

Switch Waveforms (HG Falling)

VIN= 5V, VO= 1.8V

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Figure 10. Figure 11.

Switch Waveforms (HG Rising) Start-Up (No-Load)

VIN= 5V, VO= 1.8V VIN= 10V, VO= 1.2V

IO= 3A, FSW= 600kHz CSS= 10nF, FSW= 300kHz

Figure 12. Figure 13.

Product Folder Links: LM2727 LM2737

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SNVS205D –AUGUST 2002–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Start-Up (Full-Load)
VIN= 10V, VO= 1.2V Start Up (No-Load, 10x CSS)

IO= 10A, CSS= 10nF VIN= 10V, VO= 1.2V

FSW= 300kHz CSS= 100nF, FSW= 300kHz

Figure 14. Figure 15.

Start Up (Full Load, 10x CSS) Shutdown

VIN= 10V, VO= 1.2V VIN= 10V, VO= 1.2V

IO= 10A, CSS= 100nF IO= 10A, CSS= 10nF

FSW= 300kHz FSW= 300kHz

Figure 16. Figure 17.

Start Up (Full Load, 10x CSS)

VIN= 10V, VO= 1.2V Load Transient Response (IO= 0 to 4A)

IO= 10A, CSS= 100nF VIN= 12V, VO= 1.2V

FSW= 300kHz FSW= 300kHz

Figure 18. Figure 19.

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SNVS205D –AUGUST 2002–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Load Transient Response (IO= 4 to 0A) Line Transient Response (VIN=5V to 12V)

Line Transient Response (VIN=12V to 5V) Line Transient Response

VIN= 12V, VO= 1.2V VO= 1.2V, IO= 5A

FSW= 300kHz FSW= 300kHz

Figure 20. Figure 21.

VO= 1.2V, IO= 5A VO= 1.2V, IO= 5A

FSW= 300kHz FSW= 300kHz

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Figure 22. Figure 23.

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Product Folder Links: LM2727 LM2737

BG =

0.6V

50PA

10PA

OUTPUT CLAMP

HI: 3.25V

LO: 1.25V

3.25V

1.25V

SYNCHRONOUS

DRIVER LOGIC

10Ps

DELAY

0.708V
tol.=+/-2%

0.42V
tol.=+/-2%
hyst.=12%

SHUT

DOWN

LATCH

CLOCK &

RAMP

LOGIC

S

R

R>S

off

oc

UVLO

SD

FREQ

Vcc PGND SGND

FB

EAO

BOOT

HG

LG

ISEN

PWGD

SS

PGND

95P$

oc

off

off

20PA

EA

HIGH LOW

PWM

ILIM

3.05V

SS

CMP

LM2727, LM2737

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SNVS205D –AUGUST 2002–REVISED MARCH 2013

Block Diagram

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Product Folder Links: LM2727 LM2737

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APPLICATION INFORMATION

THEORY OF OPERATION

The LM2727 is a voltage-mode, high-speed synchronous buck regulator with a PWM control scheme. It is
designed for use in set-top boxes, thin clients, DSL/Cable modems, and other applications that require high
efficiency buck converters. It has power good (PWRGD), output shutdown (SD), over voltage protection (OVP)
and under voltage protection (UVP). The over-voltage and under-voltage signals are OR gated to drive the
Power Good signal and a shutdown latch, which turns off the high side gate and turns on the low side gate if
pulled low. Current limit is achieved by sensing the voltage VDSacross the low side FET. During current limit the
high side gate is turned off and the low side gate turned on. The soft start capacitor is discharged by a 95µA
source (reducing the maximum duty cycle) until the current is under control. The LM2737 does not latch off
during UVP or OVP, and uses the HIGH and LOW comparators for the powergood function only.

START UP

When VCCexceeds 4.2V and the enable pin EN sees a logic high the soft start capacitor begins charging through
an internal fixed 10µA source. During this time the output of the error amplifier is allowed to rise with the voltage
of the soft start capacitor. This capacitor, Css, determines soft start time, and can be determined approximately
by:

(1)

An application for a microprocessor might need a delay of 3ms, in which case CSSwould be 12nF. For a different
device, a 100ms delay might be more appropriate, in which case CSSwould be 400nF. (390 10%) During soft
start the PWRGD flag is forced low and is released when the voltage reaches a set value. At this point this chip
enters normal operation mode, the Power Good flag is released, and the OVP and UVP functions begin to
monitor Vo.

NORMAL OPERATION

While in normal operation mode, the LM2727/37 regulates the output voltage by controlling the duty cycle of the
high side and low side FETs. The equation governing output voltage is:

(2)

The PWM frequency is adjustable between 50kHz and 2MHz and is set by an external resistor, R

, between

FADJ

the FREQ pin and ground. The resistance needed for a desired frequency is approximately:

(3)

MOSFET GATE DRIVERS

The LM2727/37 has two gate drivers designed for driving N-channel MOSFETs in a synchronous mode. Power
for the drivers is supplied through the BOOTV pin. For the high side gate (HG) to fully turn on the top FET, the
BOOTV voltage must be at least one V
a separate, higher voltage source, or supplied from a local charge pump structure. In a system such as a
desktop computer, both 5V and 12V are usually available. Hence if Vin was 5V, the 12V supply could be used for
BOOTV. 12V is more than 2*Vin, so the HG would operate correctly. For a BOOTV of 12V, the initial gate
charging current is 2A, and the initial gate discharging current is typically 6A.

greater than Vin. (BOOTV ≥ 2*Vin) This voltage can be supplied by

GS(th)

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Product Folder Links: LM2727 LM2737