TEXAS INSTRUMENTS DAC7644 Technical data

®

For most current data sheet and other product

information, visit www.burr-brown.com

16-Bit, Quad Voltage Output

DIGITAL-TO-ANALOG CONVERTER

DAC7644

DAC7644

FEATURES

● LOW POWER: 10mW

● UNIPOLAR OR BIPOLAR OPERATION

● SETTLING TIME: 10µs to 0.003%

● 15-BIT LINEARITY AND MONOTONICITY:

–40°C to +85°C

● PROGRAMMABLE RESET TO MID-SCALE

OR ZERO-SCALE

● DATA READBACK

● DOUBLE-BUFFERED DATA INPUTS

APPLICATIONS

● PROCESS CONTROL

● CLOSED-LOOP SERVO-CONTROL

● MOTOR CONTROL

● DATA ACQUISITION SYSTEMS

● DAC-PER-PIN PROGRAMMERS

V

V

DAC7644

V

DD

CC

SS

DESCRIPTION

The DAC7644 is a 16-bit, quad voltage output digital­to-analog converter with guaranteed 15-bit monotonic
performance over the specified temperature range. It
accepts 16-bit parallel input data, has double-buffered
DAC input logic (allowing simultaneous update of all
DACs), and provides a readback mode of the internal
input registers. Programmable asynchronous reset clears
all registers to a mid-scale code of 8000H or to a zero­scale of 0000H. The DAC7644 can operate from a single
+5V supply or from +5V and –5V supplies.

Low power and small size per DAC make the DAC7644
ideal for automatic test equipment, DAC-per-pin pro­grammers, data acquisition systems, and closed-loop
servo-control. The DAC7644 is available in a 48-lead
SSOP package and offers guaranteed specifications
over the –40°C to +85°C temperature range.

V

V

L

REF

AB Sense

V

REF

L AB V

H AB

REF

H

REF

AB Sense

SBAS121

16

DATA I/O

A1
A0

CS

R/W

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone]

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

I/O

Buffer

Control

Logic

© 1999 Burr-Brown Corporation PDS-1535B Printed in U.S.A. November, 1999

Input

Register A

Input

Register B

Input

Register C

Input

Register D

AGND DGND

RST

DAC

Register A

DAC

Register B

DAC

Register C

DAC

Register D

RSTSEL

1

LOADDACS

V

L

REF

CD Sense

DAC A

DAC B

DAC C

DAC D

V

REF

L CD V

V

A

OUT

V

Sense

OUTA

V

B

OUT

V

Sense

OUTB

V

C

OUT

V

Sense

OUTC

V

D

OUT

V

Sense

OUTD

H CD

V

REF

H

REF

CD Sense

DAC7644

®

SPECIFICATIONS (Dual Supply)

At TA = T

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ACCURACY

Linearity Error ±3 ±4 ±2 ±3 LSB
Linearity Match ±4 ±2 LSB
Differential Linearity Error ±2 ±3 ±1 ±2 LSB
Monotonicity, T
Bipolar Zero Error ±1 ±2 ✻✻ mV
Bipolar Zero Error Drift 5 10 ✻✻ppm/°C
Full-Scale Error ±1 ±2 ✻✻ mV
Full-Scale Error Drift 5 10 ✻✻ppm/°C
Bipolar Zero Matching Channel-to-Channel Matching ±1 ±2 ±1 ±2mV
Full Scale Matching Channel-to-Channel Matching ±1 ±2 ±1 ±2mV
Power Supply Rejection Ratio (PSRR)

ANALOG OUTPUT

Voltage Output
Output Current –1.25 +1.25 ✻✻mA
Maximum Load Capacitance No Oscillation 500 ✻ pF
Short-Circuit Current –10, +30 ✻ mA
Short-Circuit Duration GND or V

REFERENCE INPUT

Ref High Input Voltage Range
Ref Low Input Voltage Range –2.5
Ref High Input Current 500 ✻ µA
Ref Low Input Current –500 ✻ µA

DYNAMIC PERFORMANCE

Settling Time To ±0.003%, 5V Output Step 8 10 ✻✻ µs
Channel-to-Channel Crosstalk See Figure 5. 0.5 ✻ LSB
Digital Feedthrough 2 ✻ nV-s
Output Noise Voltage f = 10kHz 60 ✻ nV/√Hz
DAC Glitch

DIGITAL INPUT

V
V
I
I

DIGITAL OUTPUT

V
V

POWER SUPPLY

V
V
V
I
I
I
Power 15 20 ✻✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C

✻ Specifications same as DAC7644E.

to T

MIN

MAX

, VDD = V

= +5V, VSS = –5V, V

CC

H = +2.5V, and V

REF

L = –2.5V, unless otherwise noted.

REF

DAC7644E DAC7644EB

MIN

to T

MAX

14 15 Bits

At Full Scale 10 100 ✻✻ppm/V

V

= –2.5V, RL = 10kΩ, VSS = –5V

REF

or V

CC

SS

7FFFH to 8000H or 8000H to 7FFF

IH

IL
IH
IL

OH

OL

DD

CC

SS
CC
DD
SS

IOH = –0.8mA 3.6 4.5 ✻✻ V

IOL = 1.2mA 0.3 0.4 ✻✻ V

V

LV

REF

H ✻✻V

REF

Indefinite ✻

V

H

L + 1.25

REF

0.7 • V

40 ✻ nV-s

DD

+2.5 ✻✻V

V

H – 1.25

REF

✻✻V

✻ V

0.3 • V

DD

±10 ✻ µA

✻ V

±10 ✻ µA

+4.75 +5.0 +5.25 ✻✻✻ V
+4.75 +5.0 +5.25 ✻✻✻ V
–5.25 –5.0 –4.75 ✻✻✻ V

1.5 2 ✻✻ mA
50 ✻ µA

–2.3 –1.5 ✻✻ mA

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

®

DAC7644

2

SPECIFICATIONS (Single Supply)

At TA = T

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ACCURACY

Linearity Error
Linearity Match ±4 ±2 LSB
Differential Linearity Error ±2 ±3 ±1 ±2 LSB
Monotonicity, T
Zero Scale Error ±1 ±2 ✻✻ mV
Zero Scale Error Drift 5 10 ✻✻ppm/°C
Full-Scale Error ±1 ±2 ✻✻ mV
Full-Scale Error Drift 5 10 ✻✻ppm/°C
Zero Scale Matching Channel-to-Channel Matching ±1 ±2 ±1 ±2mV
Full-Scale Matching Channel-to-Channel Matching ±1 ±2 ±1 ±2mV
Power Supply Rejection Ratio (PSRR)

ANALOG OUTPUT

Voltage Output V
Output Current –1.25 +1.25 ✻✻mA
Maximum Load Capacitance No Oscillation 500 ✻ pF
Short-Circuit Current ±30 ✻ mA
Short-Circuit Duration GND or V

REFERENCE INPUT

Ref High Input Voltage Range
Ref Low Input Voltage Range 0
Ref High Input Current 250 ✻ µA
Ref Low Input Current –250 ✻ µA

DYNAMIC PERFORMANCE

Settling Time To ±0.003%, 2.5V Output Step 8 10 ✻✻ µs
Channel-to-Channel Crosstalk See Figure 6. 0.5 ✻ LSB
Digital Feedthrough 2 ✻ nV-s
Output Noise Voltage, f = 10kHz 60 ✻ nV/√Hz
DAC Glitch

DIGITAL INPUT

V
V
I
I

DIGITAL OUTPUT

V
V

POWER SUPPLY

V
V
V
I
I
Power 7.5 10 ✻✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C
NOTE: (1) If V
✻ Specifications same as DAC7644E.

to T

MIN

MAX

, VDD = V

= +5V, VSS = 0V, V

CC

H = +2.5V, and V

REF

L = 0V, unless otherwise noted.

REF

DAC7644E DAC7644EB

(1)

MIN

to T

MAX

14 15 Bits

±3 ±4 ±2 ±3 LSB

At Full Scale 10 100 ✻✻ppm/V

L = 0V, VSS = 0V, RL = 10kΩ 0V

REF

CC

V

REF

7FFFH to 8000H or 8000H to 7FFF

IH

IL
IH
IL

OH

OL

DD

CC

SS
CC
DD

= 0V specification applies at Code 0040H and above due to possible negative zero-scale error.

SS

IOH = –0.8mA 3.6 4.5 ✻✻ V

IOL = 1.2mA 0.3 0.4 ✻✻ V

H

0.7 • V

+4.75 +5.0 +5.25 ✻✻✻ V
+4.75 +5.0 +5.25 ✻✻✻ V

Indefinite ✻

L + 1.25

40 ✻ nV-s

DD

000✻✻✻ V

1.5 2 ✻✻ mA
50 ✻ µA

H ✻✻V

REF

+2.5 ✻✻V

V

H – 1.25

REF

✻✻V

✻ V

0.3 • V

DD

±10 ✻ µA

✻ V

±10 ✻ µA

®

3

DAC7644

ABSOLUTE MAXIMUM RATINGS

V

and V

CC

V

CC

V

REFL

V

CC

V

REFH

Digital Input Voltage to GND ................................... –0.3V to V

Digital Output Voltage to GND ................................. –0.3V to V

Maximum Junction Temperature................................................... +150°C

Operating Temperature Range ........................................–40°C to +85°C

Storage Temperature Range ......................................... –65°C to +125°C

Lead Temperature (soldering, 10s) ............................................... +300°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.

to VSS.............................................................. –0.3V to 11V

DD

and V

to GND ........................................................... –0.3V to 5.5V

DD

to VSS.............................................................–0.3V to (V

to V

H ............................................................ –0.3V to (V

REF

to V

L ......................................................... –0.3V to (V

REF

(1)

ELECTROSTATIC
DISCHARGE SENSITIVITY

– VSS)

CC
CC
CC

+ 0.3V

DD

+ 0.3V

DD

– VSS)
– VSS)

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.

PACKAGE/ORDERING INFORMATION

LINEARITY DIFFERENTIAL PACKAGE SPECIFICATION

PRODUCT (LSB) (LSB) PACKAGE NUMBER

ERROR NONLINEARITY DRAWING TEMPERATURE ORDERING TRANSPORT

DAC7644E ±4 ±3 48-Lead SSOP 333 –40°C to +85°C DAC7644E Rails

"" """ "DAC7644E/1K Tape and Reel

DAC7644EB ±3 ±2 48-Lead SSOP 333 –40°C to +85°C DAC7644EB Rails

"" """ "DAC7644EB/1K Tape and Reel

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/)
are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7644/1K” will get a single
1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

(1)

RANGE NUMBER

(2)

MEDIA

®

DAC7644

4

PIN CONFIGURATION

Top View SSOP

DB15
DB14
DB13
DB12
DB11
DB10

DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0

RSTSEL

RST

LOADDACS

R/W

DGND

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21

A1

22

A0

23

CS

24

DAC7644

48

NC

47

NC

46

NC

45

NC

44

A Sense

V

OUT

43

A

V

OUT

42

L AB Sense

V

REF

41

L AB

V

REF

40

H AB

V

REF

39

H AB Sense

V

REF

38

B Sense

V

OUT

37

B

V

OUT

36

C Sense

V

OUT

35

C

V

OUT

34

H CD Sense

V

REF

33

H CD

V

REF

32

L CD

V

REF

31

L CD Sense

V

REF

30

D Sense

V

OUT

29

D

V

OUT

28

V

SS

27

AGND

26

V

CC

25

V

DD

PIN DESCRIPTIONS

PIN NAME DESCRIPTION

1 DB15 Data Bit 15, MSB
2 DB14 Data Bit 14
3 DB13 Data Bit 13
4 DB12 Data Bit 12
5 DB11 Data Bit 11
6 DB10 Data Bit 10
7 DB9 Data Bit 9
8 DB8 Data Bit 8

9 DB7 Data Bit 7
10 DB6 Data Bit 6
11 DB5 Data Bit 5
12 DB4 Data Bit 4
13 DB3 Data Bit 3
14 DB2 Data Bit 2
15 DB1 Data Bit 1
16 DB0 Data Bit 0, LSB
17 RSTSEL Reset Select. Determines the action of RST. If

HIGH, a RST command will set the DAC registers to
mid-scale. If LOW, a RST command will set the DAC
registers to zero.

18 RST Reset, Rising Edge Triggered. Depending on the

state of RSTSEL, the DAC registers are set to either
mid-scale or zero.

19 LOADDACS DAC Output Registers Load Control. Rising edge

triggered.

20 R/W Enabled by the CS, Controls Data Read and Write

from the Input Registers.

21 A1 Enabled by the CS, in Combination With A0 Selects

the Individual DAC Input Registers.

22 A0 Enabled by the CS, in Combination With A1 Selects

the Individual DAC Input Registers.

PIN NAME DESCRIPTION

23 CS Chip Select. Active LOW.
24 DGND Digital Ground
25 V
26 V

DD
CC

Positive Power Supply (digital)

Positive Power Supply (analog)
27 AGND Analog Ground
28 V
29 V
30 V

31 V
32 V
33 V
34 V

OUT

L CD Sense DAC C and D Reference Low Sense Input

REF

REF
REF

H CD Sense DAC C and D Reference High Sense Input

REF

35 V
36 V

OUT

37 V
38 V

39 V
40 V
41 V
42 V

OUT

H AB Sense DAC A and B Reference High Sense Input

REF

REF

REF

L AB Sense DAC A and B Reference Low Sense Input

REF

43 V
44 V

OUT

SS

OUT

D Sense DAC D’s Output Amplifier Inverting Input. Used to

L CD DAC C and D Reference Low Input

H CD DAC C and D Reference High Input

OUT

C Sense DAC C’s Output Amplifier Inverting Input. Used to

OUT

B Sense DAC B’s Output Amplifier Inverting Input. Used to

H AB DAC A and B Reference High Input

L AB DAC A and B Reference Low Input

OUT

A Sense DAC A’s Output Amplifier Inverting Input. Used to

Negative Power Supply

D DAC D Voltage Output

close the feedback loop at the load.

C DAC C Voltage Output

close the feedback loop at the load.

B DAC B Voltage Output

close the feedback loop at the load.

A DAC A Voltage Input

close the feedback loop at the load.
45 NC No Connection
46 NC No Connection
47 NC No Connection
48 NC No Connection

®

5

DAC7644

TYPICAL PERFORMANCE CURVES: VSS = 0V

At TA = +25°C, VDD = VCC = +5V, VSS = 0V, V

REFH

= +2.5V, V

= 0V, representative unit, unless otherwise specified.

REFL

+25°C

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

(DAC A, +25°C)

A000

H

H

Digital Input Code

LINEARITY ERROR AND

(DAC C, +25°C)

A000

H

H

Digital Input Code

C000HE000HFFFF

C000HE000HFFFF

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC B, +25°C)

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

H

0000H2000H4000H6000H8000

A000

H

C000HE000HFFFF

H

H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

H

0000H2000H4000H6000H8000

A000

H

C000HE000HFFFF

H

H

Digital Input Code

+85°C

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

®

DAC7644

LINEARITY ERROR AND

(DAC B, +85°C)

A000

H

H

Digital Input Code

C000HE000HFFFF

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC B, +85°C)

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

H

0000H2000H4000H6000H8000

A000

H

C000HE000HFFFF

H

H

Digital Input Code

6

TYPICAL PERFORMANCE CURVES: VSS = 0V (CONT)

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +85°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, –40°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, –40°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

At TA = +25°C, VDD = VCC = +5V, VSS = 0V, V

REFH

= +2.5V, V

= 0V, representative unit, unless otherwise specified.

REFL

+85°C (cont)

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

–40°C

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5

0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5

0
–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

(DAC C, +85°C)

A000

H

H

Digital Input Code

LINEARITY ERROR AND

(DAC A, –40°C)

A000

H

H

Digital Input Code

C000HE000HFFFF

C000HE000HFFFF

H

H

LE (LSB)DLE (LSB)

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC C, –40°C)

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

Digital Input Code

A000

H

C000HE000HFFFF

H

H

®

7

DAC7644

TYPICAL PERFORMANCE CURVES: VSS = 0V (CONT)

At TA = +25°C, VDD = VCC = +5V, VSS = 0V, V

REFH

= +2.5V, V

= 0V, representative unit, unless otherwise specified.

REFL

2

Code (0040H)

1.5

ZERO-SCALE ERROR vs TEMPERATURE

1

DAC D

0.5
0

UPO (mV)

–0.5

–1

DAC A

–1.5

–2

–40 –25 8502555

Temperature (°C)

CURRENT vs CODE

V

REFH

(all DACs sent to indicated code)

0.30

0.25

0.20

0.15

Current (mA)

0.10

REF

V

0.05

DAC C

DAC B

2

Code (FFFFH)

1.5
1

DAC B

0.5
0

FULL-SCALE ERROR vs TEMPERATURE

–0.5

DAC A

–1

Positive Full-Scale Error (mV)

–1.5

–2

–40 –25 8502555

Temperature (°C)

CURRENT vs CODE

V

REFL

(all DACs sent to indicated code)

0.00

–0.05

–0.10

–0.15

Current (mA)

–0.20

REF

V

–0.25

DAC C

DAC D

0.00
0000H2000H4000H6000H8000

A000HC000HE000HFFFF

H

Digital Input Code

POSITIVE SUPPLY CURRENT vs TEMPERATURE

2

Data = FFFFH (all DACs)

No Load

1.5

1

(mA)

CC

I

0.5

0

–40 –25 8502555

Temperature (°C)

–0.30

H

0000H2000H4000H6000H8000

A000HC000HE000HFFFF

H

H

Digital Input Code

POSITIVE SUPPLY CURRENT

vs DIGITAL INPUT CODE

2

No Load

1.5
All DACs

1

(mA)

CC

I

One DAC

0.5

0

0000H0200H0400H0800H1000H2000H4000H6000H8000HA000HC000HE000HFFFF

H

Digital Input Code

®

DAC7644

8

TYPICAL PERFORMANCE CURVES: VSS = 0V (CONT)

1000

100

10

Frequency (Hz)

10

100

1000 10000

100000

1000000

OUTPUT NOISE VOLTAGE vs FREQUENCY

Noise (nV/√Hz)

At TA = +25°C, VDD = VCC = +5V, VSS = 0V, V

REFH

= +2.5V, V

= 0V, representative unit, unless otherwise specified.

REFL

OUTPUT VOLTAGE vs SETTLING TIME

Output Voltage

vs MIDSCALE GLITCH PERFORMANCE

(0V to +2.5V)

Large-Signal Settling Time: 0.5V/div

Small-Signal Settling Time: 4LSB/div

Time (2µs/div)

OUTPUT VOLTAGE

+5V
LDAC
0

+5V
LDAC
0

OUTPUT VOLTAGE vs SETTLING TIME

Output Voltage

vs MIDSCALE GLITCH PERFORMANCE

(+2.5V to 2mV)

Small-Signal Settling Time: 4LSB/div

Large-Signal Settling Time: 0.5V/div

Time (2µs/div)

OUTPUT VOLTAGE

+5V
LDAC
0

+5V
LDAC
0

Output Voltage (50mV/div)

Time (1µs/div)

BROADBAND NOISE

Noise Voltage (50µV/div)

Time (10µs/div)

7FFFH to 8000

Code = 8000

H

BW = 10kHz

8000H to 7FFF

Output Voltage (50mV/div)

Time (1µs/div)

H

H

9

DAC7644

®

TYPICAL PERFORMANCE CURVES: VSS = 0V (CONT)

At TA = +25°C, VDD = VCC = +5V, VSS = 0V, V

REFH

= +2.5V, V

= 0V, representative unit, unless otherwise specified.

REFL

LOGIC SUPPLY CURRENT

12

10

8

6

4

Logic Supply Current (mA)

2

0

vs LOGIC INPUT LEVEL FOR DATA BITS

0

1

Logic Input Level for Data Bits (V)

23

V

vs R

OUT

5

4

3

(V)

OUT

V

2

1

0

4

5

0.01

0.1

LOAD

Source

Sink

1 10 100

(kΩ)

R

LOAD

®

DAC7644

10

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +85°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +25°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000

H

C000HE000HFFFF

H

TYPICAL PERFORMANCE CURVES: VSS = –5V

At TA = +25°C, VDD = VCC = +5V, VSS = –5V, V

REFH

= +2.5V, V

= –2.5V, representative unit, unless otherwise specified.

REFL

+25°C

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

LINEARITY ERROR AND

(DAC A, +25°C)

A000

H

H

Digital Input Code

(DAC C, +25°C)

A000

H

H

Digital Input Code

C000HE000HFFFF

C000HE000HFFFF

H

H

+85°C

LE (LSB)DLE (LSB)

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC A, +85°C)

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5
–3.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

Digital Input Code

A000

H

C000HE000HFFFF

H

H

®

11

DAC7644

TYPICAL PERFORMANCE CURVES: VSS = –5V (CONT)

At TA = +25°C, VDD = VCC = +5V, VSS = –5V, V

+85°C (cont)

DIFFERENTIAL LINEARITY ERROR vs CODE

1.5

1.0

0.5
0

–0.5
–1.0

LE (LSB)DLE (LSB)

–1.5
–2.0
–2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

(DAC C, +85°C)

Digital Input Code

REFH

= +2.5V, V

= –2.5V, representative unit, unless otherwise specified.

REFL

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +85°C)

1.0

0.5
0

–0.5
–1.0
–1.5

LE (LSB)DLE (LSB)

–2.0
–2.5
–3.0

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5

A000

H

C000HE000HFFFF

H

H

–3.0

0000H2000H4000H6000H8000

Digital Input Code

A000

H

C000HE000HFFFF

H

H

–40°C

DIFFERENTIAL LINEARITY ERROR vs CODE

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

DIFFERENTIAL LINEARITY ERROR vs CODE

1.5

1.0

0.5
0

–0.5
–1.0

LE (LSB)DLE (LSB)

–1.5
–2.0
–2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

(DAC A, –40°C)

A000

H

H

Digital Input Code

LINEARITY ERROR AND

(DAC C, –40°C)

A000

H

H

Digital Input Code

C000HE000HFFFF

C000HE000HFFFF

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC B, –40°C)

1.5

1.0

0.5
0

–0.5
–1.0

LE (LSB)DLE (LSB)

–1.5
–2.0
–2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

H

0000H2000H4000H6000H8000

A000

H

C000HE000HFFFF

H

H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, –40°C)

1.5

1.0

0.5
0

–0.5
–1.0

LE (LSB)DLE (LSB)

–1.5
–2.0
–2.5

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0
–2.5

H

0000H2000H4000H6000H8000

A000

H

C000HE000HFFFF

H

H

Digital Input Code

®

DAC7644

12

TYPICAL PERFORMANCE CURVES: VSS = –5V (CONT)

At TA = +25°C, VDD = VCC = +5V, VSS = –5V, V

CURRENT vs CODE

V

REFH

(all DACs sent to indicated code)

+0.6

REFH

= +2.5V, V

= –2.5V, representative unit, unless otherwise specified.

REFL

V

(all DACs sent to indicated code)

0.0

CURRENT vs CODE

REFL

+0.5

+0.4

+0.3

Current (mA)

+0.2

REF

V

+0.1

0.0
0000H2000H4000H6000H8000

A000HC000HE000HFFFF

H

Digital Input Code

ZERO-SCALE ERROR vs TEMPERATURE

2

(Code 8000

)

H

1.5
1

0.5

DAC A

DAC B

0

–0.5

–1

Zero-Scale Error (mV)

DAC D

–1.5

–2

–40 –25 8502555

Temperature (°C)

DAC C

–0.1

–0.2

–0.3

Current (mA)

–0.4

REF

V

–0.5

–0.6

H

0000H2000H4000H6000H8000

A000HC000HE000HFFFF

H

H

Digital Input Code

POSITIVE FULL-SCALE ERROR vs TEMPERATURE

2

(Code FFFF

)

H

1.5
1

DAC B

DAC A

0.5
0

–0.5

–1

Positive Full-Scale Error (mV)

–1.5

DAC C

DAC D

–2

–40 –25 8502555

Temperature (°C)

NEGATIVE FULL-SCALE ERROR vs TEMPERATURE

2

(Code 0000

)

H

1.5
1

DAC D

DAC A

0.5
0

–0.5

–1

Negative Full-Scale Error (mV)

–1.5

DAC C

DAC B

–2

–40 –25 8502555

Temperature (°C)

13

POWER SUPPLY CURRENT

vs TEMPERATURE

3

Data = FFFFH (all DACs)

2.5
2

1.5

No Load

I

CC

1

0.5
0

(mA)

Q

I

–0.5

–1

–1.5

I

SS

–2

–2.5

–3

–40 –25 8502555

Temperature (°C)

DAC7644

®

TYPICAL PERFORMANCE CURVES: VSS = –5V (CONT)

At TA = +25°C, VDD = VCC = +5V, VSS = –5V, V

V

vs R

5

OUT

4
3
2
1

(V)

0

OUT

V

–1
–2
–3
–4
–5

0.01

0.1

1 10 100

(kΩ)

R

LOAD

LOAD

REFH

Source

Sink

= +2.5V, V

= –2.5V, representative unit, unless otherwise specified.

REFL

POSITIVE SUPPLY CURRENT

2

No Load

1.5

1

(mA)

CC

I

0.5

0

0000H0200H0400H0800H1000H2000H4000H6000H8000HA000HC000HE000HFFFF

vs DIGITAL INPUT CODE

Digital Input Code

All DACs

One DAC

H

OUTPUT VOLTAGE vs SETTLING TIME

Output Voltage

(–2.5V to +2.5V)

Large-Signal Settling Time: 1V/div

Small-Signal Settling Time: 2LSB/div

Time (2µs/div)

+5V
LDAC
0

OUTPUT VOLTAGE vs SETTLING TIME

Output Voltage

(+2.5V to –2.5V)

Small-Signal Settling Time:

2LSB/div

Large-Signal Settling Time: 1V/div

Time (2µs/div)

+5V
LDAC
0

®

DAC7644

14

THEORY OF OPERATION

The DAC7644 is a quad voltage output, 16-bit digital-to­analog converter (DAC). The architecture is an R-2R ladder
configuration with the three MSB’s segmented followed by
an operational amplifier that serves as a buffer. Each DAC
has its own R-2R ladder network, segmented MSBs and
output op amp (see Figure 1). The minimum voltage output
(zero-scale) and maximum voltage output (full-scale) are set

by the external voltage references (V

L and V

REF

REF

H, re­spectively). The digital input is a 16-bit parallel word and
the DAC input registers offer a readback capability. The
converters can be powered from either a single +5V supply
or a dual ±5V supply. The device offers a reset function
which immediately sets all DAC output voltages and DAC
registers to mid-scale code 8000H or to zero-scale, code
0000H. See Figures 2 and 3 for the basic operation of the
DAC7644.

R

F

V

Sense

OUT

R

2R2R 2R 2R 2R 2R 2R 2R

2R

FIGURE 1. DAC7644 Architecture.

Reset DACs

Load DAC Registers

READ/WRITE

Chips Select

Data

Bus

Address

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RSTSEL
RST
LOADDACS
R/W
A1
A0
CS
DGND

V

REF

V

REF

DAC7644

V

REF

V

REF

NC = No Connection

V

A Sense

OUT

V

L AB Sense

V

REF

V

REF

H AB Sense

B Sense

V

OUT

V

V

C Sense

OUT

V

H CD Sense

H CD

V

REF

V

REF

L CD Sense

V

D Sense

OUT

V

AGND

OUT

L AB

H AB

OUT

OUT

L CD

OUT

V

V
V

V

OUT

V

H

REF

V

H Sense

REF

V

L

REF

V

L Sense

REF

48

NC

47

NC

46

NC

45

NC

44
43

A

42
41
40
39
38
37

B

36
35

C

34
33
32
31
30
29

D

28

SS

27
26

CC

25

DD

0V to +2.5V

+2.5000V

0V to +2.5V

0V to +2.5V

+2.5000V

0V to +2.5V

0.1µF

1µF

+

+5V

FIGURE 2. Basic Single-Supply Operation of the DAC7644.

15

®

DAC7644

+5V

Reset DACs

Load DAC Registers

READ/WRITE

Chips Select

Data

Bus

Address

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RSTSEL
RST
LOADDACS
R/W
A1
A0
CS
DGND

V

REF

V

REF

DAC7644

V

REF

V

REF

NC = No Connection

V

A Sense

OUT

V

L AB Sense

V

REF

V

REF

H AB Sense

V

B Sense

OUT

V

V

C Sense

OUT

V

H CD Sense

V

REF

V

REF

L CD Sense

D Sense

V

OUT

V

AGND

NC
NC
NC
NC

OUT

L AB

H AB

OUT

OUT

H CD
L CD

OUT

V

V
V

48
47
46
45
44
43

A

42
41
40
39
38
37

B

36
35

C

34
33
32
31
30
29

D

28

SS

27
26

CC

25

DD

–2.5V to +2.5V

–2.5V

+2.5V

–2.5V to +2.5V

–2.5V to +2.5V

+2.5V

–2.5V

–2.5V to +2.5V

0.1µF 1.0µF
+

1.0µF

0.1µF
+

–5V

+5V

FIGURE 3. Basic Dual-Supply Operation of the DAC7644.

ANALOG OUTPUTS

When VSS = –5V (dual supply operation), the output ampli­fier can swing to within 2.25V of the supply rails, guaran­teed over the –40°C to +85°C temperature range. With V
= 0V (single-supply operation), and with R

LOAD

also con-

SS

nected to ground, the output can swing to ground. Care must
also be taken when measuring the zero-scale error when V

SS

= 0V. Since the output voltage cannot swing below ground,
the output voltage may not change for the first few digital
input codes (0000H, 0001H, 0002H, etc.) if the output ampli­fier has a negative offset. At the negative limit of –2mV, the
first specified output starts at code 0040H.

Due to the high accuracy of these D/A converters, system
design problems such as grounding and contact resistance
become very important. A 16-bit converter with a 2.5V full­scale range has a 1LSB value of 38µV. With a load current
of 1mA, series wiring and connector resistance (see Figure

4) of only 40mΩ (RW2) will cause a voltage drop of 40µV.
To understand what this means in terms of a system layout,
the resistivity of a typical 1 ounce copper-clad printed circuit
board is 1/2 mΩ per square. For a 1mA load, a 10 milli-inch
wide printed circuit conductor 600 milli-inches long will
result in a voltage drop of 30µV.

®

DAC7644

The DAC7644 offers a force and sense output configuration
for the high open-loop gain output amplifier. This feature
allows the loop around the output amplifier to be closed at
the load (see Figure 4), thus ensuring an accurate output
voltage.

48

NC

47

NC

46

DAC7644

V

V

REF

V

REF

V

NC
NC

A Sense

OUT

V

OUT

L AB Sense

V

L AB

REF

V

H AB

REF

H AB Sense

B Sense

OUT

V

OUT

45
44
43

A

42
41
40
39
38
37

B

R

W1

R

W2

R

W1

R

W2

FIGURE 4. Analog Output Closed-Loop Configuration

(1/2 DAC7644). RW represents wiring resis­tances.

16

V

OUT

+V

+2.5V

V

OUT

REFERENCE INPUTS

The reference inputs, V
between V

+ 2.5V and V

SS

at least 1.25V greater than V
each DAC is equal to V

L and V

REF

– 2.5V provided that V

CC

REF

REFL

H, can be any voltage

REF

L. The minimum output of

plus a small offset voltage

REF

H is

(essentially, the offset of the output op amp). The maximum
output is equal to V

H plus a similar offset voltage. Note

REF

that VSS (the negative power supply) must either be
connected to ground or must be in the range of –4.75V to
–5.25V. The voltage on VSS sets several bias points within
the converter. If VSS is not in one of these two configura­tions, the bias values may be in error and proper operation
of the device is not guaranteed.

48

NC

47

NC

46

NC

45

NC

DAC7644

V

V

REF

V

REF

V

A Sense

OUT

L AB Sense

V

REF

V

REF

H AB Sense

B Sense

OUT

V

V

OUT

L AB

H AB

OUT

44
43

A

42
41
40
39
38
37

B

V

OUT

V

OUT

500pF

The current into the V

H input and out of V

REF

L depends

REF

on the DAC output voltages and can vary from a few
microamps to approximately 0.5mA. The reference input
appears as a varying load to the reference. If the reference
can sink or source the required current, a reference buffer is
not required. The DAC7644 features a reference drive and
sense connection such that the internal errors caused by the
changing reference current and the circuit impedances can
be minimized. Figures 5 through 12 show different reference
configurations and the effect on the linearity and differential
linearity.

+V

OPA2234

–2.5V

–V

500pF

+V

+2.5V

–V

FIGURE 5. Dual Supply Configuration-Buffered References, used for Dual Supply Performance Curves (1/2 DAC7644).

48

NC

47

NC

46

NC

45

NC

V

H AB

V

OUT

L AB

OUT

44
43

A

42
41
40
39
38
37

B

V

OUT

1000pF

1000pF

V

OUT

V

A Sense

OUT

DAC7644

V

L AB Sense

REF

V

REF

V

REF

V

H AB Sense

REF

V

B Sense

OUT

NOTE: V
drops across the 100Ω resistor and the output stage of the buffer op amp.

L has been chosen to be 50mV to allow for current sinking voltage

REF

100Ω

100Ω

2200pF

2200pF

+V

OPA2350

2kΩ

0.050V

+V

98kΩ

+2.5V

FIGURE 6. Single-Supply Buffered Reference with a Reference Low of 50mV (1/2 DAC7644).

17

®

DAC7644

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

2.0

1.5

1.0

0.5
0

–0.5

LE (LSB)DLE (LSB)

–1.0
–1.5
–2.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

(DAC A, +25°C)

A000HC000HE000HFFFF

H

Digital Input Code

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

(DAC A, +25°C)

2.5

2.0

1.5

1.0

0.5
0

LE (LSB)DLE (LSB)

–0.5
–1.0
–1.5

2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5

H

0000H2000H4000H6000H8000

A000HC000HE000HFFFF

H

H

Digital Input Code

FIGURE 7. Integral Linearity and Differential Linearity

Error Curves for Figure 6.

48

NC

47

NC

46

NC

45

NC

REF

V

H AB

V

OUT

L AB

OUT

44
43

A

42
41
40
39
38
37

B

V

OUT

1000pF

1000pF

V

OUT

REF

V

A Sense

OUT

DAC7644

V

L AB Sense

REF

V
V

REF

H AB Sense

V

REF

V

B Sense

OUT

FIGURE 9. Single-Supply Buffered Reference with V

FIGURE 8. Integral Linearity and Differential Linearity

Error Curves for Figure 9.

+V

+V

+1.25V

+V

+2.5V

100Ω

100Ω

2200pF

2200pF

L = +1.25V and V

OPA2350

H = +2.5V (1/2 DAC7644).

REF

V

A Sense

OUT

V

L AB Sense

REF

V

H AB Sense

REF

V

OUT

V

V

REF

V

REF

B Sense

V

OUT

L AB

H AB

OUT

DAC7644

FIGURE 10. Single-Supply Buffered V

®

DAC7644

48

NC

47

NC

46

NC

45

NC

44
43

A

42
41
40
39
38

V

37

B

H (1/2 DAC7644).

REF

OUT

V

OUT

1000pF

100Ω

2200pF

+V

OPA350

+V

+2.5V

18

DIFFERENTIAL LINEARITY ERROR vs CODE

2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

LE (LSB)DLE (LSB)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

0000H2000H4000H6000H8000

H

Digital Input Code

A000HC000HE000HFFFF

H

3.0

2.5

2.0

1.5

1.0

0.5

LE (LSB)DLE (LSB)

0
–0.5
–1.0

2.0

1.5

1.0

0.5
0

–0.5
–1.0
–1.5
–2.0

0000H2000H4000H6000H8000

LINEARITY ERROR AND

(DAC A, +25°C)

A000HC000HE000HFFFF

H

Digital Input Code

H

FIGURE 11. Linearity and Differential Linearity Error Curves

for Figure 10.

48

NC

47

NC

46

NC

45

NC

DAC7644

V

V

REF

V

REF

V

A Sense

OUT

L AB Sense

V

REF

V

REF

H AB Sense

B Sense

OUT

V

V

OUT

L AB

H AB

OUT

44
43

A

42
41
40
39
38
37

B

V

OUT

+V

+2.5V

V

OUT

FIGURE 12. Low Cost Single-Supply Configuration.

FIGURE 13. Linearity and Differential Linearity Error Curves

for Figure 12.

DIGITAL INTERFACE

Table I shows the basic control logic for the DAC7644. Note
that each internal register is edge triggered and not level
triggered. When the LOADDACS signal is transitioned to
HIGH, the digital word currently in the register is latched.
The first set of registers (the input registers) are triggered via
the A0, A1, R/W, and CS inputs. Only one of these registers
is transparent at any given time.

The double-buffered architecture is designed mainly so each
DAC input register can be written to at any time and then all
DAC voltages updated simultaneously by the rising edge of
LOADDACS. It also allows a DAC input register to be
written to at any point and the DAC voltages to be synchro­nously changed via a trigger signal connected to
LOADDACS.

A1 A0 R/W CS RST RSTSEL

LLLLHXX Write Hold Write Input A

L H L L H X X Write Hold Write Input B
H L L L H X X Write Hold Write Input C
H H L L H X X Write Hold Write Input D

L L H L H X X Read Hold Read Input A

L H H L H X X Read Hold Read Input B
H L H L H X X Read Hold Read Input C
H H H L H X X Read Hold Read Input D
XXXHHX↑ Hold Write Update All
X X X H H X H Hold Hold Hold All
XXXX↑ L X Reset to Zero Reset to Zero All
XXXX↑ H X Reset to Midscale Reset to Midscale All

TABLE I. DAC7644 Logic Truth Table.

LOADDACS

19

INPUT DAC

REGISTER REGISTER MODE DAC

®

DAC7644

DIGITAL TIMING

Figure 14 and Table II provide detailed timing for the digital
interface of the DAC7644.

VHVLN

VVL

=+

OUT REF

()

–•

REF REF

,65 536

(1)

DIGITAL INPUT CODING

The DAC7644 input data is in Straight Binary format. The
output voltage is given by Equation 1.

t

RCS

t

RDH

Data Valid

t

CSD

RESET SEL

t

AH

t

DZ

RST

LOADDACS

t

SS

t

RSH

t

RSS

t

AS

R/W

A0/A1

Data Out

CS

t

RDS

Data Read Timing

CS

R/W

A0/A1

Data In

V

OUT

t

SH

where N is the digital input code. This equation does not
include the effects of offset (zero-scale) or gain (full-scale)
errors.

t

WCS

t

t

AS

t

DS

Data Write Timing

t

WS

t

LWD

WH

t

AH

t

t

LS

LH

t

LX

±0.003% of FSR

t

DH

t

S

Error Band

±0.003% of FSR

Error Band

+FS

,RESET SEL LOW

V

OUT

–FS

+FS

V

,RESET SEL HIGH

OUT

–FS

FIGURE 14. Digital Input and Output Timing.

SYMBOL DESCRIPTION MIN TYP MAX UNITS

t

RCS

t

RDS

t

RDH

t

t

CSD

t

WCS

t

WS

t

WH

t
t
t
t
t
t
t

t

LWD

t
t

t

RSS

t

RSH

DZ

AS
AH
LS
LH
LX
DS
DH

SS
SH

t

S

CS HIGH to Data Bus in High Impedance 10 100 ns

CS LOW for Read 150 ns

R/W HIGH to CS LOW 10 ns

R/W HIGH after CS HIGH 10 ns

CS LOW to Data Bus Valid 100 150 ns

CS LOW for Write 40 ns

R/W LOW to CS LOW 0 ns

R/W LOW after CS HIGH 10 ns

Address Valid to CS LOW 0 ns

Address Valid after CS HIGH 10 ns

CS LOW to LOADDACS HIGH 30 ns

CS LOW after LOADDACS HIGH 100 ns

LOADDACS HIGH 100 ns

Data Valid to CS LOW 0 ns

Data Valid after CS HIGH 10 ns

LOADDACS LOW 100 ns

RSTSEL Valid Before RESET HIGH 0 ns

RSTSEL Valid After RESET HIGH 200 ns

RESET LOW Before RESET HIGH 10 ns

RESET LOW After RESET HIGH 10 ns

Settling Time 10 µs

MS

DAC7644 Reset Timing

TABLE II. Timing Specifications (TA = –40°C to +85°C).

®

DAC7644

20

DIGITALLY-PROGRAMMABLE
CURRENT SOURCE

The DAC7644 offers a unique set of features that allows a
wide range of flexibility in designing applications circuits
such as programmable current sources. The DAC7644 offers
both a differential reference input as well as an open-loop
configuration around the output amplifier. The open-loop
configuration around the output amplifier allows transistor
to be placed within the loop to implement a digitally­programmable, uni-directional current source. The availabil­ity of a differential reference also allows programmability
for both the full-scale and zero-scale currents. The output
current is calculated as:

Figure 15 shows a DAC7644 in a 4mA to 20mA current
output configuration. The output current can be determined
by Equation 3:

(3)

I

OUT





=







25 05

.–.

V V N Value V
125 65 536

ΩΩ





•









05






,

.




125




+





At full-scale, the output current is 16mA plus the 4mA for
the zero current. At zero scale the output current is the offset
current of 4mA (0.5V/125Ω).

I

=

OUT

DAC7644





VHVLRN Value

–

REF REF









SENSE

+

VLR

()

REF SENSE

A Sense

V

OUT

V

L AB Sense

V

REF

V

REF

V

REF

H AB Sense

V

REF

B Sense

V

OUT

V

NC
NC
NC
NC

OUT

L AB

H AB

OUT





•









48
47
46
45
44
43

A

42
41
40
39
38
37

B

,/65 536











1000pF

1000pF

(2)

100Ω

100Ω

2200pF

2200pF

+V

OPA2350

I

OUT

V

PROGRAMMED

125Ω

20kΩ

+0.5V

80kΩ

+V

+2.5V

FIGURE 15. 4-to-20mA Digitally Controlled Current Source (1/2 DAC7644).

21

I

OUT

V

PROGRAMMED

125Ω

GND

DAC7644

®

PACKAGE OPTION ADDENDUM

www.ti.com

29-Sep-2006

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

DAC7644E ACTIVE SSOP DL 48 30 Green (RoHS &

no Sb/Br)

DAC7644E/1K ACTIVE SSOP DL 48 1000 Green (RoHS &

no Sb/Br)

DAC7644E/1KG4 ACTIVE SSOP DL 48 1000 Green (RoHS &

no Sb/Br)

DAC7644EB ACTIVE SSOP DL 48 30 Green (RoHS &

no Sb/Br)

DAC7644EB/1K ACTIVE SSOP DL 48 1000 Green (RoHS &

no Sb/Br)

DAC7644EB/1KG4 ACTIVE SSOP DL 48 1000 Green (RoHS &

no Sb/Br)

DAC7644EBG4 ACTIVE SSOP DL 48 30 Green (RoHS &

no Sb/Br)

DAC7644EG4 ACTIVE SSOP DL 48 30 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

CU NIPDAU Level-3-260C-168 HR

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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Addendum-Page 1

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