Texas Instruments DAC7562EVM, DAC8562EVM User Manual

User's Guide

SBAU183A–May 2011–Revised June 2011

DAC7562EVM, DAC8562EVM

DAC8562EVM

This user's guide describes the characteristics, operation, and use of the DAC8562EVM. The evaluation model (EVM) is an evaluation board for the DAC7562 and DAC8562. The DAC7562 and DAC8562 are low-power, voltage-output, 12- or 16-bit digital-to-analog converters (DACs). These converters are controlled through a serial peripheral interface (SPI) that can operate at clock rates of up to 50MHz. Additionally, these DACs include a 2.5V internal reference voltage (disabled by default), giving a full-scale output range of 5V when placed in a gain of two configuration. The EVM allows evaluation of all aspects of the device and allows user control over every pin on the DAC7562/DAC8562. Complete circuit descriptions, schematic diagrams, and bills of material are included in this document.

The following related documents are available for download through the Texas Instruments web site at

http://www.ti.com.

EVM-Related Device Data Sheets

Device Literature Number

DAC7562 SLAS719A DAC8562 SLAS719A REF5025 SBOS410D

OPA379 SBOS347D

All trademarks are the property of their respective owners.

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Contents

1 EVM Overview ............................................................................................................... 3

2 Analog Interface ............................................................................................................. 3

3 Digital Interface .............................................................................................................. 4

4 Power Supplies .............................................................................................................. 5

5 Voltage Reference .......................................................................................................... 6

6 EVM Operation .............................................................................................................. 7

7 Schematics and Layout .................................................................................................... 9

List of Figures

1 Reference Selection Jumper JP3......................................................................................... 6

2 DAC8562EVM Default Jumper Locations ............................................................................... 8

3 DAC8562EVM: Top Layer Image ....................................................................................... 10

4 DAC8562EVM: Bottom Layer Image ................................................................................... 10

List of Tables

1 J1: Analog Interface Pinout................................................................................................ 3

2 J2.3: Serial Interface Pins.................................................................................................. 4

3 J3 Configuration: Power-Supply Input.................................................................................... 5

4 DAC8562EVM Jumpers.................................................................................................... 7

5 Bill of Materials ............................................................................................................. 9

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1 EVM Overview

1.1 Features

DAC8562EVM:

• Full-featured evaluation board for the DAC7562 or DAC8562

• Onboard optional external reference selection

• Wide selection of digital and I/O voltages

• Hardware or software control of control logic

• Compatible with the TI Modular EVM System

• Onboard optional bipolar circuit configuration (requires installing components)

This manual covers the operation of the DAC8562EVM. For simplicity, the DAC7562 and DAC8562 are referred to as DACx562 throughout this document; unless otherwise noted, the information applies to either DAC device. Additionally, the abbreviation EVM and the term evaluation module are synonymous with the DAC8562EVM.

1.2 Introduction

The DACx562 series of devices are 10-pin, 12-, 14-, or 16-bit, low-power, two-channel digital-to-analog converters (DACs) that operates from a single 2.7V to 5.5V supply. These DACs include a 2.5V internal reference voltage (disabled by default), giving a full-scale output range of 5V when placed in a gain of two configuration. The EVM is designed to highlight both the features of the small,10-pin QFN package that the DACx562 is available in, and the performance of either the 12-bit or 16-bit DAC. Digital communication is controlled through a three-wire SPI protocol allowing for speeds up to 50MHz.

The DAC8562EVM is designed to give the user access to all pins on the DACx562. The evaluation module allows the user to control the DAC logic using onboard jumpers, or digitally through the J2 header. By default, the evaluation module is configured to be used with an onboard 2.5V external reference, but can be easily modified to use the DAC internal reference by changing a jumper setting and enabling the internal reference using software.

The DAC8562EVM is an evaluation module built to the TI Modular EVM System specification. It can be connected to any modular EVM system interface card. The DAC8562EVM does not have an onboard microprocessor and cannot run software by itself. To connect it to a computer, some type of interface is required.

EVM Overview

2 Analog Interface

For maximum flexibility, the DAC8562EVM can interface to multiple analog sources. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a 10-pin, dual-row, header at J1. This header provides access to the analog input and output pins of the DACx562. Consult Samtec at

http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. Table 1

summarizes the pinouts for analog interface J1.

Pin Number Signal Description

J1.2 V J1.4 V

J1.20 V

J1.1-1.13 (odd) GND Analog ground connection J1.17-1.19 (odd) GND Analog ground connection J1.6-1.18 (even) N/A —

J1.10 N/A

J1.12 - J1.18 (even) N/A —

J1.15 V

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Table 1. J1: Analog Interface Pinout

-0 Analog output 0

OUT

-1 Analog output 1

OUT

REFIN/VREFOUT

Buf Buffered internal reference voltage

REF

External reference source input for

REFIN/VREFOUT

Op amp bipolar output (requires

installed components)

Digital Interface

The analog interface is populated on both the top and the bottom sides of the evaluation board. All of the output pins of the DACx562 are routed directly to the J1 connector.

The GND pins of the DACx562 are connected directly to the ground of the evaluation board. The DAC8562EVM is designed to allow the user to choose from using the DACx562 internal reference,

the onboard 2.5V REF5025, or a user-supplied external reference source for the DAC. Depending on how the DACx562 is configured, pin J1.20 is either an input or an output. If the DACx562 internal reference is used, then J1.20 is the output of the V than the onboard REF5025, J1.20 is used to provide the external reference voltage.

Additionally, the evaluation board contains an OPA379 in a buffer configuration to condition the internal reference if the user would like to use the signal to drive another component. The buffered signal is routed to pin J1.15.

If the DACx562 bipolar circuit is installed on the EVM, the output of the installed operational amplifier is routed to pin J1.10 on the J1 connector.

3 Digital Interface

3.1 Serial Peripheral Interface

Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a 10-pin, dual-row, header/socket combination at J2. This header/socket provides access to the digital control data pins from both J2A (top side) and J2B (bottom side) of the connector. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. Table 2 describes the serial interface pins.

REFIN/VREFOUT

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pin on the DAC. If an external reference is used, other

Table 2. J2.3: Serial Interface Pins

Pin No. Signal Name I/O Type Pull-Up Function

J2.1 SYNC0 In None DACx562 SYNC signal. Jumper

J2.3 SCLK In None DACx562 SCLK signal J2.5 SCLK In None DACx562 SCLK signal J2.7 SYNC1 In None DACx562 SYNC signal. Jumper

J2.9 SYNC2 In None DACx562 SYNC signal. Jumper

J2.11 SDI In None DACx562 DIN signal J2.15 LDAC1 In High DACx562 LDAC signal. Jumper

J2.17 LDAC2 In High DACx562 LDAC signal. Jumper

J2.19 CLR In High DACx562 CLR signal.

J2.2 Unused — — —

J2.6 to J2.8 (even) Unused — — —

J2.12 to J2.16 (even) Unused — — —

J2.20 Unused — — —

J2.4, J2.10, J2.18 GND In/Out None Ground

JP5 determines SYNC pin

JP6 determines LDAC control pin

The DACx562 is controlled through a serial peripheral interface using the pins available on the J2 header. The four SPI signals are connected to the DAC I/O signals through 33Ω series resistors. The SYNC signal can be routed to one of three pins on the J2 header: J2.1, or J2.7 and J2.9. The SCLK signal is routed to both J2.3 and J2.5. The DIN signal is routed to the J2.11 pin on the J2 header.

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There are two static I/O pins, LDAC and CLR, from the DACx562 that are routed to the J2 header. Both of signals have weak pull-up resistors to the AVDD power-supply voltage. Either of these signals can be pulled down using hardware jumpers or applying signals to the J2 header. Note that these signals are edge-triggered.

The CLR pin is routed to pin J2.19. The LDAC pin is routed to either J2.15 or J2.17, selectable using the JP6 onboard jumper. Updating the DACx562 output can be completed in one of three different ways. The LDAC pin can be held low, and the output then update immediately following the last SCLK of the data word. Alternatively, the LDAC can be held high, the DAC input register can be written to, and the output then updates once the LDAC signal is brought low. A third technique is to overwrite the LDAC pin using either register settings or DACx562 commands. See the product data sheet for more information.

4 Power Supplies

J3 is the power-supply input connector. Table 3 lists the configuration details for J3. The voltage inputs to the DAC can be applied directly to the device. The DACx562 requires only one power supply to operate.

Pin No. Pin Name Function Required

J3.1 +VA +VA analog supply Optional

J3.2 –VA –VA analog supply Optional

J3.3 +5VA +5V analog supply Yes

J3.4 –5VA -5V analog supply No

J3.5 DGND Digital ground input Yes

J3.6 AGND Analog ground input Yes

J3.7 +1.8VD 1.8V digital supply No

J3.8 +3.3VD 3.3V digital supply No

J3.9 VD1 Not used No J3.10 +5VD +5V No

Power Supplies

Table 3. J3 Configuration: Power-Supply Input

The digital and analog ground inputs are short-circuited internally through a ground plane. The DAC8562EVM is designed to operate from a single +5V power supply (J3.3). This supply powers the

DACx562 itself, and the onboard REF5025 reference voltage source. The DACx562 can be powered from a wide range of voltages from +2.7V to +5.5V. The onboard REF5025

is powered from the +5VA supply on the J3 header. Jumper JP4 is in place to allow users to choose between the +5VA voltage to power the DAC or a separate, external power supply applied to TP1. This flexibility allows the user to be able to properly power the REF5025 while powering the DAC from any desired voltage within the specified range. The DAC8562EVM is not designed with any filters, so the use of a clean, well-regulated supply is strongly recommended.

The +VA and –VA supplies are only used to power the optional external op amp, U4, and that is only if the bipolar circuit is installed. Currently, the op amp is uninstalled and the EVM board does not require the +VA and –VA supplies. If the op amp is installed, J3.1 and J3.2 must be powered by ±15V in order for the bipolar circuit to be functional.

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Texas Instruments DAC7562EVM, DAC8562EVM User Manual

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