TEXAS INSTRUMENTS CY74FCT240T Technical data

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CY54/74FCT240T
CY54/74FCT244T
SCCS017 - May 1994 - Revised February 2000
Features
Function, pinout, and drive compatible with FCT and
F logic
FCT-C speed at 4.1 ns max. (Com’l), FCT-A speed at 4.8 ns max. (Com’l)
Reduced V
FCT functions
(typically = 3.3V) versions of equivalent
OH
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
ESD > 2000V
Matched rise and fall times
Fully compatible with TTL input and output logic levels
Extended commercial range of 40˚C to +85˚C
Logic Block Diagram
FCT240T
OE
A
OE
B
DA
OB
DA
OB
DA
OB
DA
OB
0
0
1
1
2
2
3
3
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–1
8-Bit Buffers/Line Drivers
• Sink current 64 mA (Com’l), 48 mA (Mil) Source current 32 mA (Com’l), 12 mA (Mil)
Functional Description
The FCT240T and FCT244T are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers. The devices provide speed and drive capabilities equivalent to their fastest bipolar logic counterparts while reducing power consumption. The input and output v oltage levels allow direct interface with TTL, NMOS, and CMOS devices without e xternal components.
The outputs are designed with a power-off disable feature to allow for live insertion of boards.
FCT244T
OE
A
OE
B
DA
OB
DA
OB
DA
OB
DA
OB
0
0
1
1
2
2
3
3
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–4
Pin Configurations
LCC
Top View
1
2
OB
GND
DB
OA
DB
3
DA
8
3
9 10
FCT240T
11
3
12
3
13
2
1516 17 18
14
2
OA
DA
OB2OB
765
1
1
DB
OA
4
0
DB
1
DA
3 2
1 20 19
0
OA
FCT240T–2
DA
OB
OE V OE
DIP/SOIC/QSOP
Top View
1
OE
A
2
DA
0
3
OB
0
4
DA
0
0
A
CC
B
OB
DA OB DA OB
GND
1
5
FCT240T
1
6
2
7
2
8
3
9
3
10
20 19 18 17 16 15 14 13 12 11
V
CC
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–3
OB
GND
DB
OA
DB
3
3
3
2
9 10 11 12 13
14
LCC
Top View
2
3
DA
DA
OB2OB
765
8
FCT244T
1516 17 18
2
1
1
OA
DB
OA
1
1
DA
4
OB
0
3
DA
0
2
OE
A
1
V
CC
20
OE
19
B
0
0
DB
OA
FCT240T–5 FCT240T–6
DIP/SOIC/QSOP
Top View
1
OE
A
2
DA
0
3
OB
0
4
DA
1
5
FCT244T
OB
1
6
DA
2
7
OB
2
8
DA
3
9
OB
3
10
GND
20
V
CC
19
OE
B
18
OA
0
17
DB
0
16
OA
1
15
DB
1
14
OA
2
13
DB
2
12
OA
3
11
DB
3
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT240T
CY54/74FCT244T
] ]
Function Table FCT240T
Inputs
A
L L
H
Maximum Ratings
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage............................................–0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
OE
B
L L
H
[2, 3]
[1]
Function Table FCT244T
[1]
Inputs
D
L H X
OutputOE
H
L
Z
A
L L
H
OE
B
L L
H
D
L H X
OutputOE
L H Z
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Range Speed
Commercial DT 0°C to +70°C 5V ± 5% Commercial T, AT, CT –40°C to +85°C 5V ± 5%
[4]
Military
All –55°C to +125°C 5V ± 10%
Ambient
Temperature V
CC
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
V
OH
Output HIGH Voltage VCC=Min., IOH=–32 mA Com’l 2.0 V
VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V VCC=Min., IOH=–12 mA Mil 2.4 3.3 V
V
OL
Output LOW Voltage VCC=Min., IOL=64 mA Com’l 0.3 0.55 V
VCC=Min., IOL=48mA Mil 0.3 0.55 V
V
IH
V
IL
V
H
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
OFF
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
4. T
5. Typical values are at V
6. This parameter is specified but not tested.
7. Not more than one outputshouldbeshorted at a time. Duration ofshort should notexceed one second. The use ofhigh-speedtest apparatus and/or sample and hold techniques are preferable in order to minimizeinternal chip heatingandmoreaccurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I
Input HIGH Voltage 2.0 V Input LOW Voltage 0.8 V Hysteresis
[6]
All inputs 0.2 V Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V Input HIGH Current VCC=Max., VIN=V
CC
Input HIGH Current VCC=Max., VIN=2.7V ±1 µA Input LOW Current VCC=Max., VIN=0.5V ±1 µA Off State HIGH-Level Output
Current Off State LOW-Level
Output Current Output Short Circuit Current Power-Off Disable VCC=0V, V
is the “instant on” case temperature.
A
tests should be performed last.
OS
=5.0V, TA=+25˚C ambient.
CC
VCC= Max., V
VCC = Max., V
[7]
VCC=Max., V
= 2.7V 10 µA
OUT
= 0.5V –10 µA
OUT
=0.0V –60 –120 –225 mA
OUT
=4.5V ±1 µA
OUT
or ground.
CC
[5]
Max. Unit
5 µA
2
CY54/74FCT240T
CY54/74FCT244T
]
Capacitance
Parameter Description Typ.
C
IN
C
OUT
Power Supply Characteristics
Parameter Description Test Conditions Typ.
I
CC
I
CC
I
CCD
I
C
Notes:
8. Per TTL driven input (V
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
IC=ICC+ICCDHNT+I I
CC
I
CC
D
H
N
T
I
CCD
f
0
f
1
N
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
[6]
Input Capacitance 5 10 pF Output Capacitance 9 12 pF
Quiescent Power Supply Current VCC=Max., VIN≤0.2V,
Quiescent Power Supply Current (TTL inputs)
Dynamic Power Supply
[9]
Current
Total Power Supply Current
[10]
V VCC=Max., VIN=3.4V,
f1=0, Outputs Open VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open, V
VCC=Max., 50% Duty Cycle, Outputs Open,
–0.2V
IN≥VCC
0.2V or VIN≥VCC–0.2V
IN
One Bit Toggling at f OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f OE1=OE2=GND, VIN=3.4V or VIN=GND
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f OE1=OE2=GND, VIN=3.4V or VIN=GND
=3.4V); all other inputs at VCC or GND.
IN
=I
QUIESCENT
= Quiescent Current with CMOS input levels = Power Supply Current for a TTL HIGH input (VIN=3.4V) = Duty Cycle for TTL inputs HIGH = Number of TTL inputs at D = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero = Input signal frequency = Number of inputs changing at f
+ I
INPUTS
CCD(f0
+ I
DYNAMIC
/2 + f1N1)
H
1
[8]
=10 MHz,
1
=10 MHz,
1
=2.5 MHz,
1
=2.5 MHz,
1
[5]
OE1=OE2=GND,
Max. Unit
[5]
Max. Unit
0.1 0.2 mA
0.5 2.0 mA
0.06 0.12 mA/MHz
0.7 1.4 mA
1.0 2.4 mA
1.3 2.6
3.3 10.6
[11]
[11]
mA
mA
3
Switching Characteristics Over the Operating Range
FCT240T FCT240AT
Military Commercial Military Commercial
Parameter Description
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay Data to Input
Output Enable Time 1.5 10.5 1.5 10.0 1.5 6.5 1.5 6.2 ns 1, 7, 8
Output Disable Time 1.5 10.0 1.5 9.5 1.5 5.9 1.5 5.6 ns 1, 7, 8
Parameter Description
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay Data to Input 1.5 4.7 1.5 4.3 ns 1, 2
Output Enable Time 1.5 5.7 1.5 5.0 ns 1, 7, 8
Output Disable Time 1.5 4.6 1.5 4.5 ns 1, 7, 8
[12]
Min.
Max. Min.
1.5 9.0 1.5 8.0 1.5 5.1 1.5 4.8 ns 1, 2
[12]
Max. Min.
Min.
CY54/74FCT240T
CY54/74FCT244T
[12]
Max. Min.
FCT240CT
Military Commercial
[12]
Max. Min.
[12]
[12]
Max.
Max.
Unit
Unit
Fig.
No.
Fig.
No.
[13]
[13]
FCT244T FCT244AT
Military Commercial Military Commercial
Parameter Description
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay Data to Input
Output Enable Time 1.5 8.5 1.5 8.0 1.5 6.5 1.5 6.2 ns 1, 7, 8
Output Disable Time 1.5 7.5 1.5 7.0 1.5 5.9 1.5 5.6 ns 1, 7, 8
[12]
Min.
Max. Min.
1.5 7.0 1.5 6.5 1.5 5.1 1.5 4.6 ns 1, 3
[12]
Military Commercial Commercial
Parameter Description
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
Propagation Delay Data to Input 1.5 4.6 1.5 4.1 1.5 3.6 ns 1, 3
Output Enable Time 1.5 6.5 1.5 5.8 1.5 4.8 ns 1, 7, 8
Output Disable Time 1.5 5.7 1.5 5.2 1.5 4.0 ns 1, 7, 8
Min.
[12]
Max. Min.
[12]
Max. Min.
[12]
FCT244CT FCT244DT
Max. Min.
[12]
Max. Min.
[12]
Max.
Max.
Unit
Unit
Fig.
No.
Fig.
No.
[13]
[13]
4
CY54/74FCT240T
CY54/74FCT244T
Ordering Information—FCT240T
Speed
(ns) Ordering Code
4.3 CY74FCT240CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial CY74FCT240CTQCT Q5 20-Lead (150-Mil) QSOP
4.8 CY74FCT240ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial CY74FCT240ATQCT Q5 20-Lead (150-Mil) QSOP
5.1 CY54FCT240ATDMB D6 20-Lead (300-Mil) CerDIP Military CY54FCT240ATLMB L61 20-Pin Square Leadless Chip Carrier
8.0 CY74FCT240TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial CY74FCT240TQCT Q5 20-Lead (150-Mil) QSOP
9.0 CY54FCT240TDMB D6 20-Lead (300-Mil) CerDIP Military
Ordering Information—FCT244T
Speed
(ns) Ordering Code
3.6 CY74FCT244DTQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT244DTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC
4.1 CY74FCT244CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial CY74FCT244CTQCT Q5 20-Lead (150-Mil) QSOP
4.6 CY54FCT244CTDMB D6 20-Lead (300-Mil) CerDIP Military
4.6 CY74FCT244ATPC P5 20-Lead (300-Mil) Molded DIP Commercial CY74FCT244ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY74FCT244ATQCT Q5 20-Lead (150-Mil) QSOP
5.1 CY54FCT244ATDMB D6 20-Lead (300-Mil) CerDIP Military CY54FCT244ATLMB L61 20-Pin Square Leadless Chip Carrier
6.5 CY74FCT244TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial CY74FCT244TQCT Q5 20-Lead (150-Mil) QSOP
7.0 CY54FCT244TDMB D6 20-Lead (300-Mil) CerDIP Military CY54FCT244TLMB L61 20-Pin Square Leadless Chip Carrier
Shaded areas contain preliminary information.
Document #: 38-00259-B
Package
Name Package Type
Package
Name Package Type
Operating
Operating
Range
Range
5
Package Diagrams
CY54/74FCT240T
CY54/74FCT244T
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835 D- 8 Config.A
20-Pin Square Leadless Chip Carrier L61
MIL-STD-1835 C-2A
20-Lead (300-Mil) Molded DIP P5
6
Package Diagrams (continued)
CY54/74FCT240T
CY54/74FCT244T
20-Lead Quarter Size Outline
20-Lead (300-Mil) Molded SOIC
Q5
S5
7
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
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Copyright 2000, Texas Instruments Incorporated
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