TEXAS INSTRUMENTS CY74FCT240T Technical data

查询CY54/74FCT240T供应商
CY54/74FCT240T
CY54/74FCT244T
SCCS017 - May 1994 - Revised February 2000
Features
Function, pinout, and drive compatible with FCT and
F logic
FCT-C speed at 4.1 ns max. (Com’l), FCT-A speed at 4.8 ns max. (Com’l)
Reduced V
FCT functions
(typically = 3.3V) versions of equivalent
OH
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
ESD > 2000V
Matched rise and fall times
Fully compatible with TTL input and output logic levels
Extended commercial range of 40˚C to +85˚C
Logic Block Diagram
FCT240T
OE
A
OE
B
DA
OB
DA
OB
DA
OB
DA
OB
0
0
1
1
2
2
3
3
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–1
8-Bit Buffers/Line Drivers
• Sink current 64 mA (Com’l), 48 mA (Mil) Source current 32 mA (Com’l), 12 mA (Mil)
Functional Description
The FCT240T and FCT244T are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers. The devices provide speed and drive capabilities equivalent to their fastest bipolar logic counterparts while reducing power consumption. The input and output v oltage levels allow direct interface with TTL, NMOS, and CMOS devices without e xternal components.
The outputs are designed with a power-off disable feature to allow for live insertion of boards.
FCT244T
OE
A
OE
B
DA
OB
DA
OB
DA
OB
DA
OB
0
0
1
1
2
2
3
3
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–4
Pin Configurations
LCC
Top View
1
2
OB
GND
DB
OA
DB
3
DA
8
3
9 10
FCT240T
11
3
12
3
13
2
1516 17 18
14
2
OA
DA
OB2OB
765
1
1
DB
OA
4
0
DB
1
DA
3 2
1 20 19
0
OA
FCT240T–2
DA
OB
OE V OE
DIP/SOIC/QSOP
Top View
1
OE
A
2
DA
0
3
OB
0
4
DA
0
0
A
CC
B
OB
DA OB DA OB
GND
1
5
FCT240T
1
6
2
7
2
8
3
9
3
10
20 19 18 17 16 15 14 13 12 11
V
CC
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
FCT240T–3
OB
GND
DB
OA
DB
3
3
3
2
9 10 11 12 13
14
LCC
Top View
2
3
DA
DA
OB2OB
765
8
FCT244T
1516 17 18
2
1
1
OA
DB
OA
1
1
DA
4
OB
0
3
DA
0
2
OE
A
1
V
CC
20
OE
19
B
0
0
DB
OA
FCT240T–5 FCT240T–6
DIP/SOIC/QSOP
Top View
1
OE
A
2
DA
0
3
OB
0
4
DA
1
5
FCT244T
OB
1
6
DA
2
7
OB
2
8
DA
3
9
OB
3
10
GND
20
V
CC
19
OE
B
18
OA
0
17
DB
0
16
OA
1
15
DB
1
14
OA
2
13
DB
2
12
OA
3
11
DB
3
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT240T
CY54/74FCT244T
] ]
Function Table FCT240T
Inputs
A
L L
H
Maximum Ratings
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage............................................–0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
OE
B
L L
H
[2, 3]
[1]
Function Table FCT244T
[1]
Inputs
D
L H X
OutputOE
H
L
Z
A
L L
H
OE
B
L L
H
D
L H X
OutputOE
L H Z
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Range Speed
Commercial DT 0°C to +70°C 5V ± 5% Commercial T, AT, CT –40°C to +85°C 5V ± 5%
[4]
Military
All –55°C to +125°C 5V ± 10%
Ambient
Temperature V
CC
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
V
OH
Output HIGH Voltage VCC=Min., IOH=–32 mA Com’l 2.0 V
VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V VCC=Min., IOH=–12 mA Mil 2.4 3.3 V
V
OL
Output LOW Voltage VCC=Min., IOL=64 mA Com’l 0.3 0.55 V
VCC=Min., IOL=48mA Mil 0.3 0.55 V
V
IH
V
IL
V
H
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
OFF
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
4. T
5. Typical values are at V
6. This parameter is specified but not tested.
7. Not more than one outputshouldbeshorted at a time. Duration ofshort should notexceed one second. The use ofhigh-speedtest apparatus and/or sample and hold techniques are preferable in order to minimizeinternal chip heatingandmoreaccurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I
Input HIGH Voltage 2.0 V Input LOW Voltage 0.8 V Hysteresis
[6]
All inputs 0.2 V Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V Input HIGH Current VCC=Max., VIN=V
CC
Input HIGH Current VCC=Max., VIN=2.7V ±1 µA Input LOW Current VCC=Max., VIN=0.5V ±1 µA Off State HIGH-Level Output
Current Off State LOW-Level
Output Current Output Short Circuit Current Power-Off Disable VCC=0V, V
is the “instant on” case temperature.
A
tests should be performed last.
OS
=5.0V, TA=+25˚C ambient.
CC
VCC= Max., V
VCC = Max., V
[7]
VCC=Max., V
= 2.7V 10 µA
OUT
= 0.5V –10 µA
OUT
=0.0V –60 –120 –225 mA
OUT
=4.5V ±1 µA
OUT
or ground.
CC
[5]
Max. Unit
5 µA
2
CY54/74FCT240T
CY54/74FCT244T
]
Capacitance
Parameter Description Typ.
C
IN
C
OUT
Power Supply Characteristics
Parameter Description Test Conditions Typ.
I
CC
I
CC
I
CCD
I
C
Notes:
8. Per TTL driven input (V
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
IC=ICC+ICCDHNT+I I
CC
I
CC
D
H
N
T
I
CCD
f
0
f
1
N
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
[6]
Input Capacitance 5 10 pF Output Capacitance 9 12 pF
Quiescent Power Supply Current VCC=Max., VIN≤0.2V,
Quiescent Power Supply Current (TTL inputs)
Dynamic Power Supply
[9]
Current
Total Power Supply Current
[10]
V VCC=Max., VIN=3.4V,
f1=0, Outputs Open VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open, V
VCC=Max., 50% Duty Cycle, Outputs Open,
–0.2V
IN≥VCC
0.2V or VIN≥VCC–0.2V
IN
One Bit Toggling at f OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f OE1=OE2=GND, VIN=3.4V or VIN=GND
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f OE1=OE2=GND, VIN=3.4V or VIN=GND
=3.4V); all other inputs at VCC or GND.
IN
=I
QUIESCENT
= Quiescent Current with CMOS input levels = Power Supply Current for a TTL HIGH input (VIN=3.4V) = Duty Cycle for TTL inputs HIGH = Number of TTL inputs at D = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero = Input signal frequency = Number of inputs changing at f
+ I
INPUTS
CCD(f0
+ I
DYNAMIC
/2 + f1N1)
H
1
[8]
=10 MHz,
1
=10 MHz,
1
=2.5 MHz,
1
=2.5 MHz,
1
[5]
OE1=OE2=GND,
Max. Unit
[5]
Max. Unit
0.1 0.2 mA
0.5 2.0 mA
0.06 0.12 mA/MHz
0.7 1.4 mA
1.0 2.4 mA
1.3 2.6
3.3 10.6
[11]
[11]
mA
mA
3
Loading...
+ 5 hidden pages