[ /Title
(CD40
70B,
CD407
7B)
/Subject
(CMO
SQuad
ExclusiveOR
and
ExclusiveNOR
Gate)
/Autho
r ()
/Keywords
(Harris
Semiconductor,
CD400
0,
metal
gate,
CMOS
, pdip,
cerdip,
mil,
Data sheet acquired from Harris Semiconductor
SCHS055E
January 1998 - Revised September 2003
Features
• High-Voltage Types (20V Rating)
• CD4070B - Quad Exclusive-OR Gate
• CD4077B - Quad Exclusive-NOR Gate
• Medium Speed Operation
, t
-t
PHL
• 100% Tested for Quiescent Current at 20V
• Standardized Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full
Package Temperature Range
- 100nA at 18V and 25
• Noise Margin (Over Full Package Temperature Range)
- 1V at V
• Meets All Requirements of JEDEC Standard No. 13B,
“Standard Specifications for Description of ‘B’ Series
CMOS Devices
= 65ns (Typ) at VDD = 10V, CL = 50pF
PLH
o
C
= 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
DD
Applications
• Logical Comparators
• Adders/Subtractors
• Parity Generators and Checkers
Description
The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent
Exclusive-NOR gates.
The CD4070B and CD4077B provide the system designer
with a means for direct implementation of the Exclusive-OR
and Exclusive-NOR functions, respectively.
CD4077B
CMOS Quad Exclusive-OR
and Exclusive-NOR Gate
Ordering Information
TEMP. RANGE
PART NUMBER
CD4070BE-55 to 12514 Ld PDIP
CD4070BF3A-55 to 12514 Ld CERDIP
CD4070BM-55 to 12514 Ld SOIC
CD4070BMT-55 to 12514 Ld SOIC
CD4070BM96-55 to 12514 Ld SOIC
CD4070BNSR-55 to 12514 Ld SOP
CD4070BPW-55 to 12514 Ld TSSOP
CD4070BPWR-55 to 12514 Ld TSSOP
CD4077BE-55 to 12514 Ld PDIP
CD4077BF3A-55 to 12514 Ld CERDIP
CD4077BM-55 to 12514 Ld SOIC
CD4077BMT-55 to 12514 Ld SOIC
CD4077BM96-55 to 12514 Ld SOIC
CD4077BNSR-55 to 12514 Ld SOP
CD4077BPW-55 to 12514 Ld TSSOP
CD4077BPWR-55 to 12514 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
(oC)PACKAGE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . . . . 3V to 18V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
JM38510/17203BCAACTIVECDIPJ141TBDA42 SNPBN / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153