Texas Instruments bq25505 User Manual
User's Guide
SLUUAA8–September 2013
User's Guide for bq25505 Battery Charger Evaluation
Module for Energy Harvesting
This user’s guide describes the bq25505 evaluation module (EVM), how to perform a stand-alone
evaluation and how to allow the EVM to interface with the system and host. The boost charger output is
configured to deliver up to 4.2-V maximum voltage to its output, VSTOR, using external resistors. This
voltage is applied to the storage element as long as the storage element voltage at VBAT_SEC is above
the internally programmed undervoltage of 2 V. The VBAT_OK indicator toggles high when VSTOR ramps
up to 3 V and toggles low when VSTOR ramps down to 2.8 V.
Contents
1 Introduction ................................................................................................................... 2
1.1 EVM Features....................................................................................................... 2
1.2 General Description ................................................................................................ 2
1.3 Design and Evaluation Considerations .......................................................................... 3
1.4 bq25505EVM Schematic........................................................................................... 4
1.5 EVM I/O Connections .............................................................................................. 5
2 EVM Performance Specification Summary............................................................................... 7
3 Test and Measurement Summary......................................................................................... 7
3.1 Test Setups and Results........................................................................................... 8
4 Bill of Materials and Board Layout ....................................................................................... 14
4.1 Bill of Materials .................................................................................................... 14
4.2 EVM Board Layout................................................................................................ 15
5 PCB Layout Guideline ..................................................................................................... 19
List of Figures
1 bq25505EVM Schematic.................................................................................................... 4
2 Test Setup for Measuring Boost Charger Efficiency .................................................................... 8
3 Charger Efficiency versus Input Voltage.................................................................................. 9
4 Charger Efficiency versus Input Current.................................................................................. 9
5 Test Setup for Measuring Charger Operation .......................................................................... 10
6 Charger Operational Waveforms During Battery Charging........................................................... 10
7 Test Setup................................................................................................................... 11
8 Switching from Primary to Secondary Battery.......................................................................... 12
9 Test Setup for Charging a Super Capacitor on VBAT_SEC.......................................................... 12
10 Charging a Super Cap on VBAT_SEC ................................................................................. 13
11 EVM PCB Top Silk......................................................................................................... 15
12 EVM PCB Top Assembly.................................................................................................. 16
13 EVM PCB Top Layer ...................................................................................................... 17
14 EVM PCB Bottom Layer................................................................................................... 18
List of Tables
1 I/O Connections and Configuration for Evaluation of bq25505 EVM ................................................. 5
2 Bill of Materials ............................................................................................................. 14
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Introduction
1 Introduction
1.1 EVM Features
• Evaluation module for bq25505
• Ultra-low power boost converter/charger with battery management for energy harvester applications
• Resistor-programmable settings for overvoltage providing flexible battery management
• Programmable push-pull output indicator for battery status (VBAT_OK)
• Test points for key signals available for testing purpose – easy probe hook-up
• Jumpers available – easy to change settings
1.2 General Description
The bq25505 is an integrated energy harvesting Nano-Power management solution that is well suited for
meeting the special needs of ultra-low power applications. The product is specifically designed to
efficiently acquire and manage the microwatts (µW) to milliwatts (mW) of power generated from a variety
of high output impedance (Hi-Z) DC sources like photovoltaic (solar) or thermal electric generators; or with
an AC/DC rectifier, a piezoelectric generator. The bq25505 implements a highly efficient, pulse-frequency
modulated (PFM) boost converter/charger targeted toward products and systems, such as wireless sensor
networks (WSN) which have stringent power and operational demands. Assuming a depleted storage
element has been attached, the bq25505 DC-DC boost converter/charger that requires only microwatts of
power to begin operating in cold-start mode. Once the boost converter output, VSTOR, reaches ~1.8 V
and can now power the converter, the main boost converter can now more efficiently extract power from
low voltage output harvesters such as thermoelectric generators (TEGs) or single- and dual-cell solar
panels. For example, assuming the Hi-Z input source can provide at least 5 µW typical and the load on
VSTOR (including the storage element leakage current) is less than 1 µA of leakage current, the boost
converter can be started with VIN_DC as low as 330 mV typical, and once VSTOR reaches 1.8 V, can
continue to harvest energy down to VIN_DC ≃ 120 mV.
Hi-Z DC sources have a maximum output power point (MPP) that varies with ambient conditions. For
example, a solar panel's MPP varies with the amount of light on the panel and with temperature. The MPP
is listed by the harvesting source manufacturer as a percentage of its open circuit (OC) voltage. Therefore,
the bq25505 implements a programmable maximum power point tracking (MPPT) sampling network to
optimize the transfer of power into the device. The bq25505 periodically samples the open circuit input
voltage every 16 seconds by disabling the boost converter for 256 ms and stores the programmed MPP
ratio of the OC voltage on the external reference capacitor (C2) at VREF_SAMP. Typically, solar cells are
at their MPP when loaded to ~70–80% of their OC voltage and TEGs at ~50%. While the storage element
is less than the user programmed maximum voltage (VBAT_OV), the boost converter loads the harvesting
source until VIN_DC reaches the MPP (voltage at VREF_SAMP). This results in the boost charger
regulating the input voltage of the converter until the output reaches VBAT_SEC_OV, thus transferring the
maximum amount of power currently available per ambient conditions to the output.
The battery undervoltage, VBAT_UV, threshold is checked continuously to ensure that the internal battery
FET, connecting VSTOR to VBAT_SEC, does not turn on until VSTOR is above the VBAT_UV threshold
(2 V).The overvoltage (VBAT_OV) setting initially is lower than the programmed value at startup (varies on
conditions) and is updated after the first ~32 ms. Subsequent updates are every ~64 ms. The VBAT_OV
threshold sets maximum voltage on VSTOR and the boost converter stops switching when the voltage on
VSTOR reaches the VBAT_OV threshold. The open circuit input voltage (VIN_OC) is measured every ~16
seconds in order for the Maximum Power Point Tracking (MPPT) circuit to sample and hold the input
regulation voltage. This periodic update continually optimizes maximum power delivery based on the
harvesting conditions.
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The bq25505 was designed with the flexibility to support a variety of energy storage elements. The
availability of the sources from which harvesters extract their energy can often be sporadic or timevarying. Systems will typically need some type of energy storage element, such as a re-chargeable
battery, super capacitor, or conventional capacitor. The storage element will make certain constant power
is available when needed for the systems. In general, the storage element also allows the system to
handle any peak currents that can not directly come from the input source. It is important to remember
that batteries and super capacitors can have significant leakage currents that need to be included with
determining the loading on VSTOR.
To prevent damage to a customer’s storage element, both maximum and minimum voltages are monitored
against the internally programmed undervoltage (VBAT_UV) and user programmed overvoltage
(VBAT_OV) levels.
To further assist users in the strict management of their energy budgets, the bq25505 toggles a user
programmable battery good flag (VBAT_OK), checked every 64 ms, to signal the microprocessor when
the voltage on an energy storage element or capacitor has risen above (OK_HYST threshold) or dropped
below (OK_PROG threshold) a pre-set critical level. To prevent the system from entering an undervoltage
condition or if starting up into a depleted storage element, it is recommended to isolate the system load
from VSTOR by using an NFET to invert the BAT_OK signal so that it drives the gate of PFET, which
isolates the system load from VSTOR.
For details, see bq25505 data sheet (SLUSBJ3).
1.3 Design and Evaluation Considerations
This user's guide is not a replacement for the data sheet. Reading the data sheet first will help in
understanding the operations and features of this IC. In this document, “secondary rechargeable battery”
or "VBAT_SEC" will be used but one could substitute any appropriate storage element.
Introduction
System Design Tips
Compared to designing systems powered from an AC/DC converter or large battery (for example, low
impedance sources), designing systems powered by Hi-Z sources requires that the system load-per-unit
time (for example, per day for solar panel) be compared to the expected loading per the same time unit.
Often there is not enough real time input harvested power (for example, at night for a solar panel) to run
the system in full operation. Therefore, the energy harvesting circuit collects more energy than being
drawn by the system when ambient conditions allow and stores that energy in a storage element for later
use to power the system. See SLUC461 for an example spreadsheet on how to design a real solar-panelpowered system in three easy steps:
1. Referring the system rail power back to VSTOR
2. Referring the required VSTOR power back to bq255xx input power
3. Computing the minimum solar panel area from the input power requirement
As demonstrated in the spreadsheet, for any boost converter, you must perform a power balance:
P
/ PIN= (V
OUT
where η is the estimated efficiency for the same or similar configuration in order to determine the minimum
input power needed to supply the desired output power.
This IC is a highly efficient charger for a storage element such as a battery or super capacitor. The main
difference between a battery and a super capacitor is the capacity curve. The battery typically has little or
no capacity below a certain voltage, whereas the capacitor does have capacity at lower voltages. Both can
have significant leakage currents that will appear as a DC load on VSTOR/VBAT_SEC.
STOR
× I
) / (VIN× IIN) = η (1)
STOR
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1
Not Installed
VIN
VIN
GND
VREF_SAMP
VSTOR
GND
VSTOR
BAT_SEC
GND
BAT_SEC
GND
BAT_OK
GND
VBAT_PRI
GND
GND
BAT_SEC
/EN
JP1 to R3-R5
VOC_SAMP
50%
80%
VRDIV
VSTOR
VSTOR
GND
GND
1
VBAT_PRI
GND
GND
GND
2
1
1
GND
VOR
LBOOST
VOR
1
2.0V-5.5V
4.2V (Adj up to 5.5V)
4.2V (Adj up to 5.5V)
2.1V - 5.5V
1
C1
4.7uF
TP1
J2
C6
0.1uF
JP3
C2
0.01uF
R1
7.5M
R2
5.76M
TP2
C5
4.7uF
J5
C4
0.1uF
J4
J8
C3
100uF
TP4
TP5
R3
4.99M
R4
10M
JP4
JP1
J13
R8
5.36M
R7
6.98M
TP7
Q2-A
Q1-A
J11
C13
1uF
JP2
Q2-B
Q1-B
R6
887K
L1
22uH
C11
C12
J6
J7
J9
J10
J12
R5
4.99M
J1
J3
+ C9
DNP
+ C7
DNP
J15
J14
J16
+ C8
DNP
1
VSS
2
VIN_DC
3
VOC_SAMP
4
VREF_SAMP
5
EN
6
NC
7
VBAT_OV8VRDIV
9
VB_SEC_ON
10
VB_PRI_ON
11
OK_HYST
12
OK_PROG
13
VBAT_OK
14
VBAT_PRI
15
VSS
16NC17
NC
18
VBAT_SEC
19
VSTOR
20
LBOOST
21
PWPD
U1
BQ25505RGR
TP6
TP8
TP3
C10
4.7uF
VIN1
VIN1
VB_PRI_ON
VBAT_PRI
VSTOR
VOC_SAMP
BAT_SEC
VB_SEC_ON
VSTOR
VB_PRI_ON
VOC_SAMP
BAT_SEC
VBAT_PRI
VRDIV
VRDIV
VB_SEC_ON
Introduction
1.4 bq25505EVM Schematic
Figure 1 is the schematic for this EVM.
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User's Guide for bq25505 Battery Charger Evaluation Module for Energy SLUUAA8–September 2013
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Figure 1. bq25505EVM Schematic
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Introduction
1.5 EVM I/O Connections
Table 1. I/O Connections and Configuration for Evaluation of bq25505 EVM
REFERENCE DESCRIPTION COMMENTS / DEFAULT SETTINGS
DESIGNATOR
HEADERS AND TERMINALS
J1 – VIN Input source (+) If VIN_DC is higher than VSTOR and VSTOR is equal to VBAT_OV, the input VIN_DC is pulled to ground
J2 – VIN/GND Input source terminal block
J3 – GND Input source return (–)
J4 – VSTOR Boost charger output (+)
J5 – VSTOR/GND Boost charger output terminal block
J6 – GND Boost charger return (–)
J7– BAT_SEC Rechargeable storage element connection (+)
J8 – BAT_SEC/GND Rechargeable storage element terminal block
J9 – GND Rechargeable storage element connection return (–)
J10 – VBAT_PRI Non-rechargeable storage element connection (+) VBAT_PRI is an optional non-rechargeable battery that switches in to the power the system when
J11 – Non-rechargeable storage element connection terminal
VBAT_PRI/GND block
J12 – GND Non-rechargeable storage element connection return (–)
J13 – BAT_OK/GND Battery Status Indicator (+/–)
J14 – VOR Output of multiplexing switches, either VSTOR or
VBAT_PRI (+)
J15 – VOR/GND Output of multiplexing switches terminal block
J16 – GND Return for output of multiplexing switches (–)
TEST POINTS
TP1 Input source, VIN_DC (+)
TP2 Boost charger switching node
TP3 Buck converter switching node
TP4 Boost charger output, VSTOR (+)
TP5 Rechargeable storage element, VBAT_SEC (+)
TP6 Non-rechargeable storage element, VBAT_PRI(+)
TP7 VRDIV node CAUTION: Providing an additional low impedance current path in parallel with the feedback resistors , for
TP8 Output return (–)
TP9 Input return (–)
WHITE
through a small resistance to stop further charging of the attached battery or capacitor. It is critical that if
this case is expected, the impedance of the source attached to VIN_DC be higher than 20 Ω and not a low
impedance source.
BAT_SEC drops below the VBAT_OK threshold.
example, with a 10-MΩ scope probe attached, will degrade regulation accuracy.
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Introduction
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Table 1. I/O Connections and Configuration for Evaluation of bq25505 EVM (continued)
REFERENCE DESCRIPTION COMMENTS / DEFAULT SETTINGS
DESIGNATOR
JUMPERS
JP1 – VOC_SAMP VOC_SAMP = external resistors sized to configure the IC Uninstalled (NOTE: Do not install if JP4 shunt is installed)
JP2 - EN EN = GND enables the IC. EN = BAT_SEC disables the EN = GND
JP3 - VREF_SAMP VREF_SAMP = GND Uninstalled (NOTE: Providing an additional leakage path for the VREF_SAMP capacitor for example,
to GND through a 10-MΩ scope probe attached to VREF_SAMP, will degrade input voltage regulation
JP4 - VOC_SAMP VOC_SAMP = 80% configures the IC to regulate VIN to JP4 = 80% (NOTE: Do not install if JP1 shunt is installed)
to regulate VIN to 75% of VINOC.
IC.
performance).
80% of VIN_OC. VOC_SAMP = 50% configures the IC to
regulate VIN to 50% of VIN_OC.
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2 EVM Performance Specification Summary
See Data Sheet “Recommended Operating Conditions” for component adjustments. For details about the
resistor programmable settings, see bq25505 data sheet (SLUSBJ3).
VIN(DC) DC input voltage into VIN_DC 0.13 4.0 V
VIN_STARTUP(D DC minimum start-up voltage into depleted storage element, no load attached 330 mV
C) to VSTOR or VOUT and IBAT(LEAK) ≤ 1 µA
VBAT_OV Battery overvoltage Threshold –min and max values include ±2% set point 4.04 4.18 4.32 V
VBAT_OK
MPPT Maximum Power Point Tracking, Resistor Programmed % of Open Circuit 80%
CBAT A 100-µF low leakage ceramic capacitor is installed on the EVM as the 100 µF
See SLUC484 spreadsheet tool to assist with modifying the MPPT, VBAT_OV and VBAT_OK resistors for
your application.
accuracy and ±1% resistor tolerance but excludes effects of output ripple
OK_HYST indication toggles high when VSTOR ramps up - min and max 2.70 2.79 2.88 V
values include ±2% set point accuracy and ±1% resistor tolerance
OK_PROG indication toggles low when VSTOR ramps down - min and max 2.89 2.99 3.09 V
values include ±2% set point accuracy and ±1% resistor tolerance
Voltage
minimum recommended equivalent battery capacitance.
If changing the board resistors or the capacitor on VREF_SAMP (C2), it is
important to remember that residual solder flux on a board has a resistivity in
the 1–20 MΩ range. Therefore, flux remaining in parallel with changed 1–20
MΩ resistors can result in a lower effective resistances, which will produce
different operating thresholds than expected. Similarly, flux remaining in parallel
with the VREF_SAMP capacitor provides an additional leakage path, which
results in the input voltage regulation set point drooping during the 16-s MPPT
cycle. Therefore, it is highly recommended that boards be thoroughly cleaned
twice, once after removing the old components and again after installing the
new components. If possible, the boards should be cleaned until the wash
solution measures ionic contamination greater than 50 MΩ.
EVM Performance Specification Summary
MIN NOM MAX UNIT
CAUTION
3 Test and Measurement Summary
Test Setup Tips
Energy harvesting power sources are high impedance sources. A source-meter configured as a current
source with voltage compliance set to the harvester's open circuit voltage is the best way to simulate the
harvester. When simulating a Hi-Z energy harvester with low output impedance lab power supply, it is
necessary to simulate the harvester's impedance with a physical resistor between the supply, VPS, and
VIN_DC of the EVM. When the MPPT sampling circuit is active, VIN_DC = VPS = the harvester open
circuit voltage (VIN_OC) because there is no input current to create a drop across the simulated
impedance (that is, open circuit); therefore, VPS should be set to the intended harvester's open circuit
voltage. When the boost converter is running, it draws only enough current until the voltage at VIN_DC
droops to the MPPT's sampled voltage that is stored at VREF_SAMP.
The battery (storage element) can be replaced with a simulated battery. Often electronic 4 quadrant loads
give erratic results with a “battery charger” due to the charger changing states (fast-charge to termination
and refresh) while the electronic load is changing loads to maintain the “battery” voltage. The charging and
loading get out of phase and create a large signal oscillation which is due to the 4 quadrant meter. A
simple circuit can be used to simulate a battery and can be adjusted for voltage. It consists of load resistor
(~10 Ω, 2 W) to pull the output down to some minimum storage voltage (sinking current part of battery)
and a lab supply connected to the BAT pin via a diode. The lab supply biases up the battery voltage to the
desired level. It may be necessary to add more capacitance across R1.
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