TEXAS INSTRUMENTS bq24610, bq24617 Technical data

OAS
(bq24610)
OFB
(bq24617)
QFN-24
TOP VIEW
24 23 22 21 20 19
7 8 9 10 11 12
1
2
3
4
5
6
CE
ACN
ACP
ACDRV
STAT1
TS
SRN
SRP
ISET2
ACSET
GND
REGN
TTC
PG
STAT2
VREF
ISET1
VFB
VCC
BATDRV
BTST
HIDRV
PH
LODRV
bq24610 bq24617
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SLUS892 –DECEMBER 2009
Stand-Alone Synchronous Switch-Mode Li-Ion or Li-Polymer Battery Charger with System
1

FEATURES

Power Selector and Low I
Check for Samples: bq24610, bq24617
24-pin, 4×4-mm2QFN package
q
600 kHz NMOS-NMOS Synchronous Buck Energy Star Low Quiescent Current I Converter
Stand-alone Charger Support for Li-Ion or
– < 15 µA Off-State Battery Discharge current – < 1.5 mA Off-State Input Quiescent Current
Li-Polymer

5V–28V VCC Input Operating Range and APPLICATIONS Support 1-6 Battery Cells (bq24610)

5V–24V VCC Input Operating Range and Support 1-5 Battery Cells (bq24617)
Up to 10A Charge Current and Adapter Current
High-Accuracy Voltage and Current Regulation – ±0.5% Charge Voltage Accuracy – ±3% Charge Current Accuracy
Netbook, Mobile Internet Device and Ultra-Mobile PC
Personal Digital Assistants
Handheld Terminals
Industrial and Medical Equipment
Portable Equipment

DESCRIPTION

– ±3% Adapter Current Accuracy
Integration – Automatic System Power Selection from
Adapter or Battery – Internal Loop Compensation – Internal Soft Start – Dynamic Power Management
Safety Protection – Input Over-Voltage Protection – Battery Thermistor Sense Hot/Cold Charge
Suspend – Battery Detection – Reverse Protection Input FET – Programmable Safety Timer – Charge Over-Current Protection – Battery Short Protection
The bq24610/7 is highly integrated Li-ion or Li-polymer switch-mode battery charge controller. It offers a constant-frequency synchronous switching PWM controller with high accuracy charge current and voltage regulation, charge preconditioning, termination, adapter current regulation and charge status monitoring.
The bq24610/7 charges the battery in three phases: preconditioning, constant current, and constant voltage. Charge is terminated when the current reaches a minimum user-selectable level. A programmable charge timer provides a safety backup. The bq24610/7 automatically restarts the charge cycle if the battery voltage falls below an internal threshold, and enters a low-quiescent current sleep mode when the input voltage falls below the battery voltage.
PACKAGE AND PIN-OUT
– Battery Over-Voltage Protection – Thermal Shutdown
Status Outputs – Adapter Present – Charger Operation Status
Charge Enable Pin
6V Gate Drive for Synchronous Buck Converter
30ns Driver Dead-time and 99.5% Max Effective Duty Cycle
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
q
RAC
0.010 W
Q1 (ACFET)
N
P
ACN
ACP
ISET2
ACSET
VREF
CE
VFB
TS
VCC
HIDRV
N
PH
BTST
REGN
LODRV
GND
SRP
SRN
P
PACK+
PACK-
SYSTEM
ADAPTER+
ADAPTER-
C4
0.1 µF
C2
0.1 µF
C3 C7
Q4
Q5
C6
L1
6.8µH*
D1
BAT54
C5
C10
0.1
µF
TTC
CTTC
VREF
STAT2
Pack
Thermistor
Sense
BATDRV
ACDRV
bq24610 bq24617
P
Q2 (ACFET)
Q3 (BATFET)
VREF
ISET1
STAT1
VBAT
R9
9.31kW
R10
430kW
R1
100
kW
PG
ADAPTER +
Cff 22 pF
0.1 µF
1µF
C8
10 µF
1 µF
1 µF
RSR
0.010
W
C11
0.1
µF
C12
10 µF*
C13
10 µF*
R2
500 kΩ
R1210kW
R1110
kW
R1310kW
R3
100 kW
R4
32.4 kW
R5
100 kW
R6
10kW
R7
100 kW
R8
22.1 kW
R14
100 kW
C14
0.1 mF
R15
100
kW
C15
0.1
µF
PwrPad
0.056 Fμ
R16 100
W
C1
0.1 Fμ
103AT
SI7617DN
SI7616DN
SIS412DN
SIS412DN
SI7617DN
C9
10 μF
R17 10Ω
R20
C16
2.2μF
R18 1kΩ
R19 1kΩ
D2
D3
D4
bq24610 bq24617
SLUS892 –DECEMBER 2009
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DESCRIPTION (CONTINUED)

The bq24610/7 controls external switches to prevent battery discharge back to the input, connect the adapter to the system, and to connect the battery to the system using 6-V gate drives for better system efficiency. The bq24610/7 features Dynamic Power Management (DPM). These features reduce battery charge current when the input power limit is reached to avoid overloading the AC adapter when supplying the load and the battery charger simultaneously. A highly-accurate current-sense amplifier enables precise measurement of input current from the AC adapter to monitor the overall system power.

TYPICAL APPLICATION

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VIN=19V, 3-cell, I
adapter_limit
PART NUMBER IC MARKING PACKAGE QUANTITY
bq24610 OAS
2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
bq24617 OFB
=4A, I
=3A, I
charge
Figure 1. Typical System Schematic
ORDERING INFORMATION
= I
pre-charge
=0.3A, 5 hour saftey timer
term
24-PIN 4×4 mm2QFN
Product Folder Link(s): bq24610 bq24617
ODERING NUMBER
(Tape andReel)
bq24610RGER 3000 bq24610RGET 250 bq24617RGER 3000 bq24617RGET 250
bq24610 bq24617
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PACKAGE THERMAL DATA
PACKAGE θ
QFN – RGE
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. This is
connected to the ground plane by a 2×2 via matrix. θJAhas 5% improvement by 3x3 via matrix.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(1)(2)
JP
4°C/W 43°C/W 2.3 W 0.023 W/°C
θ
JA
TA= 25°C DERATING FACTOR
POWER RATING ABOVE TA= 25°C

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
VCC, ACP, ACN, SRP, SRN, BATDRV, ACDRV, CE, STAT1, STAT2, PG –0.3 to 33 V PH –2 to 36 V
Voltage range
Maximum difference ACP–ACN, SRP–SRN –0.5 to 0.5 V voltage
T
Junction temperature range –40 to 155 °C
J
T
Storage temperature range –55 to 155 °C
stg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging
Section of the data book for thermal limitations and considerations of packages.
(3) Must have a series resistor between battery pack to VFB if Battery Pack voltage is expected to be greater than 16V. Usually the resistor
divider top resistor will take care of this.
VFB –0.3 to 16 V REGN, LODRV, ACSET, TS, TTC –0.3 to 7 V BTST, HIDRV with respect to GND –0.3 to 39 V VREF, ISET1, ISET2 –0.3 to 3.6 V
(1) (2) (3)
SLUS892 –DECEMBER 2009
VALUE UNIT

RECOMMENDED OPERATING CONDITIONS

VALUE UNIT
VCC, ACP, ACN, SRP, SRN, BATDRV, ACDRV, CE, STAT1, STAT2, PG –0.3 to 28 V PH –2 to 30 V VFB –0.3 to 14 V
Voltage range REGN, LODRV, ACSET, TS, TTC –0.3 to 6.5 V
BTST, HIDRV with respect to GND –0.3 to 34 V ISET1, ISET2 –0.3 to 3.3 V VREF 3.3 V
Maximum difference ACP–ACN, SRP–SRN –0.2 to 0.2 V voltage
T
Junction temperature range 0 to 125 °C
J
T
Storage temperature range –55 to 155 °C
stg
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SLUS892 –DECEMBER 2009

ELECTRICAL CHARACTERISTICS

5.0V V(VCC) 28V, 0°C < TJ< +125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OPERATING CONDITIONS
V
VCC_OP
QUIESCENT CURRENTS
I
BAT
I
AC
CHARGE VOLTAGE REGULATION
V
FB
I
VFB
CURRENT REGULATION – FAST CHARGE
V
ISET1
V
IREG_CHG
K
ISET1
I
ISET1
CURRENT REGULATION – PRECHARGE
V
ISET2
K
ISET2
I
ISET2
VCC input voltage operating range(610) 5.0 28.0 VCC input voltage operating range(617) 5.0 24.0
Total battery discharge current (sum of currents into VCC, BTST, PH, ACP, V ACN, SRP, SRN, VFB), VFB 2.1 V
Battery discharge current (sum of currents into BTST, PH, SRP, SRN, VFB), VFB 2.1 V
Adapter supply current (current into V VCC,ACP,ACN pin) done
< V
> V > V
> V
> V
> V
SRN
SRN SRN
SRN
SRN
SRN
, V
, V , V
, V
, V
, V
VCC
V
VCC
V
VCC
done V
VCC
current)
VCC
V
VCC
Qg_total = 20 nC
> V
VCC
UVLO
> V
VCC
UVLO
> V
VCC
VCCLOW
> V
VCC
UVLO
VCC>VVCCLOW
VCC>VVCCLOW
(SLEEP) 15 μA
CE = LOW 5 µA
CE = HIGH, Charge
CE = LOW (IC quiescent
, CE = HIGH, charge
, CE = HIGH, Charging,
1 1.5
2 5 mA
25
Feedback regulation voltage 2.1 V
Charge voltage regulation accuracy
TJ= 0°C to 85°C –0.5% 0.5% TJ= -40°C to 125°C –0.7% 0.7%
Leakage current into VFB pin VFB = 2.1 V 100 nA
ISET1 voltage range 2 V SRP-SRN current sense voltage range V Charge current set factor (amps of
charge current per volt on ISET1 pin)
Charge current regulation accuracy
Leakage current into ISET1 pin V
R V
V V V
= V
IREG_CHG
= 10 m 5 A/V
SENSE
IREG_CHG IREG_CHG IREG_CHG IREG_CHG
= 2 V 100 nA
ISET1
– V
SRP
SRN
= 40 mV –3% 3% = 20 mV –4% 4% = 5 mV –25% 25% = 1.5 mV (V
> 3.1V) –40% 40%
SRN
ISET2 voltage range 2 V Precharge current set factor (amps of
precharge current per volt on ISET2 pin)
Precharge current regulation accuracy V
Leakage current into ISET2 pin V
R
= 10 m 1 A/V
SENSE
V
IREG_PRECH IREG_PRECH
V
IREG_PRECH ISET2
= 20 mV –4% 4% = 5 mV –25% 25% = 1.5 mV (V
< 3.1V) –55% 55%
SRN
= 2V 100 nA
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5 µA
100 mV
V
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ELECTRICAL CHARACTERISTICS (continued)
5.0V V(VCC) 28V, 0°C < TJ< +125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CHARGE TERMINATION
K
TERM
t
QUAL
I
QUAL
INPUT CURRENT REGULATION
V
ACSET
V
IREG_DPM
K
ACSET
I
ACSET
I
ISET1
INPUT UNDER-VOLTAGE LOCK-OUT COMPARATOR (UVLO)
V
UVLO
V
UVLO_HYS
VCC LOWV COMPARATOR
SLEEP COMPARATOR (REVERSE DISCHARGING PROTECTION)
V
SLEEP _FALL
V
SLEEP_HYS
ACN / SRN COMPARATOR
V
ACN-SRN_FALL
V
ACN-SRN_HYS
BAT LOWV COMPARATOR
V
LOWV
V
LOWV_HYS
RECHARGE COMPARATOR
V
RECHG
Termination current set factor (Amps of termination current per volt on ISET2 R pin)
Termination current accuracy V
= 10 m 1 A/V
SENSE
V
= 20 mV –4% 4%
ITERM
= 5 mV –25% 25%
ITERM
V
= 1.5 mV –45% 45%
ITERM
Deglitch time for termination (both edge) 100 ms Termination qualification time V
BAT>VRECH
and I
CHG<ITERM
Termination qualification current Discharge current once termination is detected 2 mA
ACSET Voltage Range 2 V ACP-ACN Current Sense Voltage
Range Input current set factor (amps of input
current per volt on ACSET pin)
Input current regulation accuracy leakage current in to ACSET pin
Leakage current in to ACSET pin V
V
R V
V V
= V
IREG_DPM
= 10 m 5 A/V
SENSE
IREG_DPM IREG_DPM IREG_DPM
= 2 V 100 nA
ACSET
– V
ACP
ACN
= 40 mV –3% 3% = 20 mV –4% 4% = 5 mV –25% 25%
AC Under-voltage rising threshold Measure on VCC 3.65 3.85 4 V AC Under-voltage hysteresis, falling 350 mV
Falling threshold, disable charge Measure on VCC 4.1 V Rising threshold, resume charge 4.35 4.5 V
SLEEP falling threshold V
VCC
– V
to enter SLEEP 40 100 150 mV
SRN
SLEEP hysteresis 500 mV SLEEP rising delay VCC falling below SRN, Delay to turn off ACFET 1 μs SLEEP falling delay VCC rising above SRN, Delay to turn on ACFET 30 μs SLEEP rising shutdown deglitch VCC falling below SRN, Delay to enter SLEEP mode 100 ms SLEEP falling powerup deglitch VCC rising above SRN, Delay to exit SLEEP mode 30 ms
ACN to SRN falling threshold V
ACN
– V
to turn on BATFET 100 200 310 mV
SRN
ACN to SRN rising hysteresis 100 mV ACN to SRN rising deglitch V ACN to SRN falling deglitch V
Precharge to fastcharge transition (LOWV threshold)
– V – V
SRN SRN
> V
ACN-SRN_RISE
< V
ACN-SRN_FALL
ACN ACN
Measured on VFB pin, Rising 1.534 1.55 1.566 V
LOWV hysteresis 100 mV LOWV rising deglitch VFB falling below V LOWV falling deglitch VFB rising above V
Recharge threshold (with-respect-to V
)
REG
Measured on VFB pin, Falling 35 50 65 mV
Recharge rising deglitch VFB decreasing below V Recharge falling deglitch VFB decreasing above V
LOWV
LOWV
+ V
RECHG
RECHG
LOWV_HYS
SLUS892 –DECEMBER 2009
250 ms
100 mV
2 ms
50 μs
25 ms 25 ms
10 ms 10 ms
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SLUS892 –DECEMBER 2009
ELECTRICAL CHARACTERISTICS (continued)
5.0V V(VCC) 28V, 0°C < TJ< +125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BAT OVER-VOLTAGE COMPARATOR
V
OV_RISE
V
OV_FALL
INPUT OVER-VOLTAGE COMPARATOR (ACOV)
V
ACOV
V
ACOV_HYS
V
ACOV
V
ACOV_HYS
THERMAL SHUTDOWN COMPARATOR
T
SHUT
T
SHUT_HYS
THERMISTOR COMPARATOR
V
LTF
V
LTF_HYS
V
HTF
V
TCO
CHARGE OVER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
V
OC
CHARGE UNDER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
V
ISYNSET
BATTERY SHORTED COMPARATOR (BATSHORT)
V
BATSHT
V
BATSHT_HYS
V
BATSHT_DEG
LOW CHARGE CURRENT COMPARATOR
V
LC
V
LC_HYS
V
LC_DEG
VREF REGULATOR
V
VREF_REG
I
VREF_LIM
Over-voltage rising threshold As percentage of V Over-voltage falling threshold As percentage of V
AC over-voltage rising threshold on VCC (bq24610)
AC over-voltage falling hysteresis (bq24610)
AC over-voltage rising threshold on VCC (bq24617)
AC over-voltage falling hysteresis(bq24617)
FB FB
31.04 32 32.96 V
25.22 26 26.78 V
104% 102%
1 V
820 mV
AC over-voltage deglitch (both edge) Delay to changing the STAT pins 1 ms AC over-voltage rising deglitch Delay to disable charge 1 ms AC over-voltage falling deglitch Delay to resume charge 20 ms
Thermal shutdown rising temperature Temperature increasing 145 °C Thermal shutdown hysteresis 15 °C Thermal shutdown rising deglitch Temperature increasing 100 μs Thermal shutdown falling deglitch Temperature decreasing 10 ms
Cold temperature rising threshold As Percentage to V Rising hysteresis As Percentage to V Hot temperature rising threshold As Percentage to V Cut-off temperature rising threshold As Percentage to V Deglitch time for temperature out of
range detection Deglitch time for temperature in valid
range detection
VTS> V
VTS< V
LTF
LTF
, or VTS< V
– V
LTF_HYS
VREF VREF VREF VREF
TCO
or VTS>V
, or VTS< V
TCO
HTF
, or VTS> V
HTF
Current rising, in non-synchronous mode, mesure on
Charge over-current falling threshold
V Current rising, as percentage of V
synchronous mode, V
Charge over-current threshold floor 50 mV
Charge over-current threshold ceiling 180 mV
Minimum OCP threshold in synchronous mode, measure on V
Maximum OCP threshold in synchronous mode, measure on V
Charge under-current falling threshold Switch from SYNCH to NON-SYNCH, V
BAT Short falling threshold, forced non-syn mode
V
, V
(SRP-SRN)
falling 2 V
SRP
< 2 V
SRP
(SRP-SRN)
(SRP-SRN)
SRP
, V
, V
> 2.2V
SRP
SRP
> 2.2V
> 2.2V
(IREG_CHG)
SRP
, in
> 2.2V 1 5 9 mV
72.5% 73.5% 74.5%
0.2% 0.4% 0.6%
36.2% 37% 37.8%
33.7% 34.4% 35.1% 400 ms
20 ms
45.5 mV
160%
BAT short rising hysteresis 200 mV Deglitch on both edge 1 μs
Low charge current (average) falling threshold to force into non-synchronous Measure on V mode
(SRP-SRN)
1.25 mV
Low charge current rising hysteresis 1.25 mV Deglitch on both edge 1 μs
VREF regulator voltage V VREF current limit V
VCC VREF
> V
, (0-35mA load) 3.267 3.3 3.333 V
UVLO
= 0V, V
VCC
> V
UVLO
35 mA
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ELECTRICAL CHARACTERISTICS (continued)
5.0V V(VCC) 28V, 0°C < TJ< +125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REGN REGULATOR
V
REGN_REG
I
REGN_LIM
TTC INPUT AND SAFETY TIMER
T
PRECHG
T
CHARGE
K
TTC
BATTERY SWITCH (BATFET) DRIVER
R
DS_BAT_OFF
R
DS_BAT_ON
V
BATDRV_REG
AC SWITCH (ACFET) DRIVER
R
DS_AC_OFF
R
DS_AC_ON
V
ACDRV_REG
AC / BAT MOSFET DRIVERS TIMING
BATTERY DETECTION
t
WAKE
I
WAKE
t
DISCHARGE
I
DISCHARGE
I
FAULT
V
WAKE
V
DISCH
PWM HIGH SIDE DRIVER (HIDRV)
R
DS_HI_ON
R
DS_HI_OFF
V
BTST_REFRESH
PWM LOW SIDE DRIVER (LODRV)
R
DS_LO_ON
R
DS_LO_OFF
(1) Verified by design
REGN regulator voltage V REGN current limit V
Precharge safety timer range Fast charge saftey timer range, with +/-
10% accuracy
(1)
Fast charge timer accuracy
(1)
(1)
> 10V, CE = HIGH, (0-40mA load) 5.7 6.0 6.3 V
VCC REGN
= 0V, V
VCC
> V
, CE = HIGH 40 mA
UVLO
Precharge time before fault occurs 1440 1800 2160 sec Tchg = C
0.01 μF C
× K
TTC
TTC
0.11 μF –10% 10%
TTC
Timer multiplier 5.6 min/nF
V
below this threshold disables the safety timer and
TTC low threshold 0.4 V
TTC
termination TTC oscillator high threshold 1.5 V TTC oscillator low threshold 1 V TTC source/sink current 45 50 55 μA
BATFET turn-off resistance V BATFET turn-on resistance V
BATFET drive voltage 4.2 7 V
ACFET turn-off resistance V ACFET turn-on resistance V
ACFET drive voltage 4.2 7 V
> 5V 150
ACN
> 5V 20 k
ACN
V
BATDRV_REG
BATFET is on
VCC VCC
V
ACDRV_REG
ACFET is on
= V
ACN
– V
BATDRV
when V
ACN
> 5V and
> 5V 30 > 5V 20 k
= V
VCC
– V
ACDRV
when V
VCC
> 5V and
Driver dead time Dead time when switching between AC and BAT 10 μs
Wake time Max time charge is enabled 500 ms Wake current R
= 10m 50 125 200 mA
SENSE
Discharge time Max time discharge current is applied 1 sec Discharge current 8 mA Fault current after a timeout fault 2 mA Wake threshold (with-respect-to V
Discharge threshold 1.55 V
High side driver (HSD) turn-on resistance
High side driver turn-off resistance V Bootstrap refresh comparator threshold
voltage
) Voltage on VFB to detect battery absent during Wake 50 mV
REG
Voltage on VFB to detect battery absent during
discharge
V
– VPH= 5.5 V 3.3 6
BTST
– VPH= 5.5 V 1 1.3
BTST
V
– VPHwhen low side refresh pulse is requested 4.0 4.2 V
BTST
Low side driver (LSD) turn-on resistance 4.1 7 Low side driver turn-off resistance 1 1.4
SLUS892 –DECEMBER 2009
1 10 Hr
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SLUS892 –DECEMBER 2009
ELECTRICAL CHARACTERISTICS (continued)
5.0V V(VCC) 28V, 0°C < TJ< +125°C, typical values are at TA= 25°C, with respect to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PWM DRIVERS TIMING
Driver dead time 30 ns
PWM OSCILLATOR
V
RAMP_HEIGHT
INTERNAL SOFT START (8 steps to regulation current ICHG)
CHARGER SECTION POWER-UP SEQUENCING
LOGIC IO PIN CHARACTERISTICS (CE, STAT1, STAT2, PG)
V
IN_LO
V
IN_HI
V
BIAS_CE
V
OUT_LO
I
OUT_HI
PWM ramp height As percentage of VCC 7 % PWM switching frequency
Soft start steps 8 step Soft start step time 1.6 ms
Charge-enable delay after power-up Delay from CE=1 to charger is allowed to turn on 1.5 s
CE input low threshold voltage 0.8 V CE input high threshold voltage 2.1 CE input bias current V = 3.3V (CE has internal 1Mpulldown resistor) 6 μA STAT1, STAT2, PG output low
saturation voltage Leakage current V = 32 V 1.2 µA
(2)
(2) Verified by design
Dead time when switching between LSD and HSD, no
load at LSD and HSD
510 600 690 kHz
Sink Current = 5 mA 0.5 V
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VCC
/PG
VREF
REGN
t − Time=4ms/div
5V/div
2V/div
10V/div
2V/div
t − Time=200ms/div
PH
LODRV
IBAT
CE
5V/div
5V/div
10V/div
2 A/div
t − Time=4ms/div
CE
PH
LODRV
IBAT
5V/div
5V/div
10V/div
2 A/div
t − Time=2 s/divμ
CE
PH
LODRV
IL
5V/div
5V/div
10V/div
2 A/div
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SLUS892 –DECEMBER 2009

TYPICAL CHARACTERISTICS

Table 1. Table of Graphs
Figure
REF REGN and PG Power Up (CE=1) Figure 2 Charge Enable Figure 3 Current Soft-Start (CE=1) Figure 4 Charge Disable Figure 5 Continuous Conduction Mode Switching Waveforms Figure 6 Cycle-by-Cycle Synchronous to Nonsynchronous Figure 7 100% Duty and Refresh Pulse Figure 8 Transient System Load (DPM) Figure 9 Battery Insertion Figure 10 Battery to Ground Short Protection Figure 11 Battery to ground Short Transition Figure 12 Efficiency vs Output Current Figure 13
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Figure 2. REF REGN and PG Power Up (CE=1) Figure 3. Charge Enable
Figure 4. Current Soft-Start (CE=1) Figure 5. Charge Disable
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t − Time=100ns/div
HIDRV
PH
LODRV
IL
2 A/div
20V/div
20V/div
5V/div
t − Time=100ns/div
PH
LODRV
IL
1 A/div
5V/div
5V/div
t − Time=400ns/div
PH
LODRV
IL
0.5 A/div
10V/div
5V/div
t − Time=200 s/divμ
IIN
ISYS
IBAT
2 A/div
2 A/div
2 A/div
t − Time=200ms/div
PH
IL
VBAT
2 A/div
5V/div
10V/div
t − Time=4ms/div
PH
IL
VBAT
LODRV
20V/div
5V/div
10V/div
2 A/div
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SLUS892 –DECEMBER 2009
Figure 6. Continuous Conduction Mode Switching Waveform Figure 7. Cycle-by-Cycle Synchronous to Nonsynchronous
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Figure 8. 100% Duty and Refresh Pulse Figure 9. Transient System Load (DPM)
Figure 10. Battery Insertion Figure 11. Battery to GND Short Protection
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t − Time=10 s/divμ
PH
IL
VBAT
LODRV
20V/div
5V/div
10V/div
2 A/div
80
82
84
86
88
90
92
94
96
98
0 1 2 3
4
5
6
7
8
IBAT-OutputCurrent- A
Efficiency-%
12Vin,1cell
12Vin,2cell
20Vin,3cell
20Vin,4cell
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SLUS892 –DECEMBER 2009
Figure 12. Battery to GND Short Transition Figure 13. Efficiency vs Output Current
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