Differential Output Voltage With
100-Ω Load . . . 1.5 V Typ
D
Ultra-Low Power Dissipation
– dc, 0.3 mW Max
– 32 MHz All Channels (No Load),
385 mW Typ
D
Accepts 5-V Logic Inputs With a 3.3-V
Supply
D
Low-Voltage Pin-to-Pin Compatible
Replacement for AM26C31, AM26LS31,
MB571
D
High Output Impedance in Power-Off
Condition
D
Driver Output Short-Protection Circuit
D
Package Options Include Plastic
Small-Outline (D, NS) Packages
D OR NS PACKAGE
(TOP VIEW)
1A
1
1Y
2
3
1Z
4
G
5
2Z
6
2Y
7
2A
GND
The D package is available taped
and reeled. The NS package is only
available taped and reeled. Add the
suffix R to device type (e.g.,
AM26LV31CDR).
8
16
15
14
13
12
11
10
V
CC
4A
4Y
4Z
G
3Z
3Y
9
3A
description
The AM26L V31 is a BiCMOS quadruple dif ferential line driver with 3-state outputs. It is designed to be similar
to TIA/EIA-422-B and ITU Recommendation V.11 drivers with reduced supply-voltage range.
The device is optimized for balanced-bus transmission at switching rates up to 32 MHz. The outputs have very
high current capability for driving balanced lines such as twisted-pair transmission lines and provide a high
impedance in the power-off condition. The enable function is common to all four drivers and offers the choice
of active-high or active-low enable inputs. The AM26LV31 is designed using Texas Instruments (TI)
proprietary LinIMPACT-C60 technology, facilitating ultra-low power consumption without sacrificing speed.
This device offers optimum performance when used with the AM26LV32 quadruple line receivers.
The AM26LV31C is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUT
A
HHXHL
LHXLH
HXLHL
LXLLH
XLHZZ
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ENABLESOUTPUTS
GGYZ
LinIMP ACT-C60 and TI are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
AM26LV31
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
logic symbol
4
G
12
G
1
1A
7
2A
9
3A
15
4A
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
†
≥1
G
EN
schematic (each driver)
EQUIVALENT OF EACH INPUT (A, G, OR G
)
10
11
14
13
logic diagram (positive logic)
4
G
12
G
1
1A
2
1Y
3
1Z
6
2Y
5
2Z
3Y
3Z
4Y
4Z
7
2A
9
3A
15
4A
TYPICAL OF ALL OUTPUTS (Y AND Z)
10
11
14
13
2
1Y
3
1Z
6
2Y
5
2Z
3Y
3Z
4Y
4Z
V
CC
100 Ω
Input
GND
All resistor values are nominal.
40 kΩ
6 Ω
V
CC
Output
GND
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV31
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
MINNOMMAXUNIT
Supply voltage, V
High-level input voltage, V
Low-level input voltage, V
High-level output current, I
Low-level output current, I
Operating free-air temperature, T
CC
IH
IL
OH
OL
A
33.33.6V
2V
0.8V
–30mA
30mA
070°C
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
AM26LV31
R
L
100 Ω
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
electrical characteristics over recommended operating supply-voltage and free-air temperature
ranges (unless otherwise noted)
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
V
IK
V
OH
V
OL
|VOD|Differential output voltage
V
OC
∆|VOC|
I
O
I
OZ
I
IH
I
IL
I
OS
I
CC
C
pd
†
All typical values are at VCC = 3.3 V and TA = 25°C.
‡
∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.
§
Cpd determines the no-load dynamic current consumption. IS = Cpd × VCC × f + I
common-mode output voltage
Output current with power offVO = –0.25 V or 6 V, VCC = 0±100µA
Off-state (high-impedance state)
output current
High-level input currentVCC = 0 or 3 V,VI = 5.5 V10µA
Low-level input currentVCC = 3.6 V,VI = 0–10µA
Short-circuit output current
Supply current (all drivers)VI = VCC or GND,No load100µA
Power dissipation capacitance (all drivers)§No load160pF
‡
=
VO = –0.25 V or 6 V, G = 0.8 V or G = 2 V±100µA
VCC = 3.6 V,VO = 0–200mA
CC
0.951.5V
1.31.551.8V
±0.2V
switching characteristics, V
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
t
PLH
t
PHL
t
t
SRSlew rate, single-ended output voltageSee Note 3 and Figure 20.31V/ns
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(p)
t
sk(o)
t
sk(lim)
NOTES: 3. Slew rate is defined by:
Propagation delay time, low- to high-level output4812ns
Propagation delay time, high- to low-level output
Transition time (tr or tf)3ns
Output-enable time to high levelSee Figure 31020ns
Output-enable time to low levelSee Figure 41020ns
Output-disable time from high levelSee Figure 31020ns
Output-disable time from low levelSee Figure 41020ns
Pulse skewf = 32 MHz,See Note 40.51.5ns
5. Skew limit is the difference between any two outputs of the same device switching in the same direction.
6. Skew limit (device to device) is the maximum difference in propagation delay times between any two channels of any two devices.
OL
= 3.3 V, TA = 25°C
CC
Ǔ
*
10%ǒVOH*
t
r
PLH
– t
PHL
See Figure 2
Ǔ
V
OL
, the differential slew rate of VODis 2SR.
| of each channel of the same device.
4812ns
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AM26LV31
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
Generator
(see Note B)
G
V
CC
G
Y
A
G
G
Z
V
OD2
RL/2
RL/2
V
OC
Figure 1. Differential and Common-Mode Output Voltages
Input
A
A
50 Ω
Y
Z
RL = 100 Ω
TEST CIRCUIT
50%50%
CL = 15 pF
(see Note A)
V
0 V
V
V
CC
O
V
OD
O
t
PLH
Output, V
Output, V
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 32 MHz, ZO ≈ 50 Ω, 50% duty cycle,
tr and tf ≤ 2 ns.
Z
O
Y
Y
t
r
O
t
f
Z
Figure 2. Test Circuit and Voltage Waveforms, t
PROPAGATION DELAY TIMES
90%90%
10%10%
90%90%
10%10%
RISE AND FALL TIMES
t
f
t
r
PHL
t
PHL
and t
V
OH
V
OL
V
OH
V
OL
PLH
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
AM26LV31
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
V
CC
A
S1
Y
Z
Output
Generator
(see Note B)
Input
Output
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, ZO = 50 Ω, 50% duty cycle,
tr and tf (10% to 90%) ≤ 2 ns.
C. To test the active-low enable G
50 Ω
V
CC
(see Note C)
t
PZH
, ground G and apply an inverted waveform to G.
G
G
TEST CIRCUIT
50%50%
50%
VOLTAGE WAVEFORMS
CL = 15 pF
(see Note A)
V
0 V
t
PHZ
0.3 V
V
V
CC
OH
off
RL = 110 Ω
≈ 0
Figure 3. Test Circuit and Voltage Waveforms, t
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PZH
and t
PHZ
AM26LV31
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS201E – MAY 1995 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
V
CC
Generator
(see Note B)
Output
Input
V
CC
50 Ω
(see Note C)
t
PZL
A
G
G
V
CC
TEST CIRCUIT
50%50%
50%
VOLTAGE WAVEFORMS
V
OL
≈ V
RL = 110 Ω
Output
CC
S1
Y
Z
CL = 15 pF
(see Note A)
V
CC
0 V
t
PLZ
V
off
0.3 V
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, ZO = 50 Ω, 50% duty cycle,
tr and tf (10% to 90%) ≤ 2 ns.
C. To test the active-low enable G
, ground G and apply an inverted waveform to G.
Figure 4. Test Circuit and Voltage Waveforms, t
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PZL
and t
PLZ
7
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCTOR PRODUCTS MA Y INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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