Texas Instruments ADS8860EVM-PDK User Manual

User's Guide

SBAU213–September 2013

ADS8860EVM-PDK

This user's guide describes the operation and use of the ADS8860 evaluation module (EVM). The ADS8860 is a 16-bit, pseudo-differential, unipolar, successive approximation register (SAR), analog-todigital converter (ADC) with a maximum throughput of 1 MSPS. The device is a very low-power ADC with excellent noise and distortion performance for ac or dc signals. The performance demonstration kit (PDK) eases EVM evaluation with additional hardware and software for computer connectivity through a universal serial bus (USB). The ADS8860EVM-PDK includes the ADS8860EVM as a daughter card, MMB0 motherboard, A-to-B USB cable, and 6-V wall-adapter power supply. This user's guide covers circuit description, schematic diagram, and bill of materials for the ADS8860EVM daughter card.

ADS8860EVM-PDK

Contents

1 Related Documentation .................................................................................................... 2

2 ADS8860EVM-PDK Overview ............................................................................................. 3

3 EVM Analog Interface ...................................................................................................... 4

4 EVM Digital Interface ....................................................................................................... 6

5 EVM Power-Supply Inputs ................................................................................................. 7

6 EVM Digital Configuration ................................................................................................. 8

7 PDK Kit Setup ............................................................................................................... 9

8 PDK Kit Operation ......................................................................................................... 11

9 Bill of Materials, Schematics, and Layout .............................................................................. 14

ADCPro is a trademark of Texas Instruments. Windows is a registered trademark of Microsoft Corporation. I2C is a trademark of NXP Semiconductors. Samtec is a trademark of Samtec, Inc. All other trademarks are the property of their respective owners.

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1 Related Documentation

Table 1 lists the related documents that are available for download from Texas Instruments at www.ti.com.

Table 1. Related Documentation

Device Literature Number

ADS8860 SBAS547

OPA333 SBOS351 OPA376 SBOS406

OPA836 SLOS712 REF5045 SBOS410 THS4281 SLOS432

TPS78833 SLVS382

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2 ADS8860EVM-PDK Overview

The ADS8860EVM is an evaluation module built to the TI Modular EVM system specifications. The EVM by itself has no microprocessor and cannot run software. Thus, the EVM is available as part of the ADS8860EVM-PDK kit that combines the ADS8860EVM as a daughter board with the digital signal processor (DSP)-based MMB0 motherboard using ADCPro™ software as a graphical user interface (GUI).

ADCPro software collects, records, and analyzes data from ADC evaluation boards. ADCPro also runs different plug-in programs to easily expand testing and data collection capabilities. In combination with the ADS8860EVM plug-in program, ADCPro offers a comprehensive evaluation environment for the ADS8860. For more details on ADCPro, see the ADCPro Analog-to-Digital Converter Evaluation Software

User's Guide (SBAU128), available for download from www.ti.com.

ADS8860EVM Daughter Board Features:

• Includes support circuitry as a design example to match ADC performance

• 3.3-V slave serial peripheral interface (SPI)

• Serial interface header for easy connection to TI DSP-based communication systems

• Compatible with the TI Modular EVM system

• Designed for 5-V analog supply

• Onboard 4.5-V voltage reference

• Bipolar (–2.15 V to 2.15 V) or unipolar (0.1 V to 4.4 V) input range

ADS8860EVM-PDK Kit Additional Features:

• USB port for computer interfacing

• Regulated 5-V and 3.3-V supplies for powering EVM daughter board

• Easy-to-use evaluation software for Windows®operating system

• Data collection to text files

• Built-in analysis tools including scope, FFT, and histogram displays

• Easily expandable with new analysis plug-in tools from Texas Instruments

ADS8860EVM-PDK Overview

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AINP

AINN

10000pF

4.7

1k

OPA836

+1.125V

-2.15V

+2.15V

1k

A0(-)

JP4 (CLOSED)

Transfer Function:

AINP = 2.25V ± A0(-)

0.1V

4.4V

2.25V

EVM Analog Interface

3 EVM Analog Interface

The ADS8860EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow the EVM to have input signals connected through coaxial cables. In addition, the Samtec™ connector provides a convenient 10-pin, dual-row, header and socket combination at J1. Consult Samtec at

www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. The analog inputs

are buffered by an OPA836 high-speed operational amplifier in order to properly drive the ADS8860 ADC input.

Use appropriate caution when handling these pins. Table 2 summarizes the pinout for analog interface J1.

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Table 2. Analog Inputs

Connector Number Signal Description

Samtec 10 x 2 J1.10 A0(-) CH0 inverted EVM input

SMA J4 A0(-) CH0 inverted EVM input

3.1 Unipolar Input Signal Configuration

With JP4 closed, the OPA836 positive input is biased with +1.125 V, created by diving the 4.5-V onboard reference by four. This bias becomes a 2.25-V offset at the output of the OPA836 that allows input signals with a 0-V common mode. To keep the OPA836 distortion as low as possible, the input signal swing is limited from –2.15 V to +2.15 V, as shown in Figure 1.

Figure 1. Differential Input Example

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0.22

1k

1µF

OPA333

THS4281

10µF

1µF

20k

1k

1µF

Vref

4.5V from REF5045

AINP

AINN

10000pF

4.7

1k

OPA836

+2.25V

0.1V

+4.4V

1k

2.25V

A0(-)

JP4 (OPEN)

Transfer Function:

AINP = 4.5V ± A0(-)

0.1V

4.4V

2.25V

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3.2 Bipolar Input Signal Configuration

With JP4 open, the OPA836 positive input is biased with +2.25 V, created by diving the 4.5-V onboard reference by two. This bias becomes a 4.5-V offset at the output of the OPA836 that allows input signals with a 2.25-V common mode. To keep the OPA836 distortion as low as possible, the input signal swing is limited from +0.1 V to +4.4 V, as shown in Figure 2.

Figure 2. Single-Ended Signal Example

3.3 Voltage Reference

Because the EVM is powered by a 5-V analog supply, the reference should be a value below 5 V. This EVM uses 4.5 V, created by the onboard REF5045, as shown in Figure 3. Then, the EVM is filtered by an RC filter with a 160-Hz cutoff frequency to minimize noise contribution. Finally, the EVM is buffered by the THS4281, which can drive the 10 μF required at the ADC reference (with a 2-MHz effective bandwidth and 22-μVrms total noise). The OPA333 and the additional feedback is optional, but does complement the THS4281, minimizing offset and drift.

EVM Analog Interface

Figure 3. THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction

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EVM Digital Interface

4 EVM Digital Interface

Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide a convenient 10-pin, dualrow, header and socket combinations at P1. The header and socket provide access to the ADC digital control pins. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options.

Table 3 summarizes the pinouts for digital interface J2.

Pin Number Signal Description

J2.1 CS or CONVST J2.3 SCLK Serial clock input

J2.7 CS or CONVST J2:13 SDO or MISO SDO or MISO output J2.15 INT

J2.17 CONVST

J2.4, J2.10, and J2.18 GND Digital ground connections

J2.16, J2.20 I2C™ bus

J2.2, J2.5-6, J2.8-9,

J2.11-12, J2.14, and Unused Unused

J2:19

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Table 3. J2: Serial Interface Header

Chip-select input that can be used as a convert start

Chip-select input that can be used as a convert start meant for the MMB0 motherboard

20-kΩ pull-up resistor for detecting falling edges at the end of conversion

Direct connection to the convert start pin if JP3 is installed

I2C bus; used only to program the U4 EEPROM on the EVM board

4.1 Serial Interface (SPI)

The ADS8860 ADC uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with high-speed clocks higher than 30 MHz; for slower clocks, mode 0 is used (CPOL = 0, CPHA = 0). Because the serial clock (SCLK) frequency can be as fast as 80 MHz, the ADS8860EVM offers 47-Ω resistors between the SPI signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges can cause overshoot; these 47-Ω resistors slow down the signal edges in order to minimize signal overshoot.

4.2 I2C Bus for Onboard EEPROM

The ADS8860EVM has an I2C bus that records the board name and assembly date to communicate with the onboard EEPROM. The bus is not used in any form by the ADS8860 converter.

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Texas Instruments ADS8860EVM-PDK User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

ADS8860EVM-PDK

1 Related Documentation

2 ADS8860EVM-PDK Overview

3 EVM Analog Interface

3.1 Unipolar Input Signal Configuration

3.2 Bipolar Input Signal Configuration

3.3 Voltage Reference

4 EVM Digital Interface

4.1 Serial Interface (SPI)

4.2 I2C Bus for Onboard EEPROM