OPERATION
54ACT16863, 74ACT16863
18-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS162B – JUNE 1990 – REVISED NOVEMBER 1996
D
Members of the Texas Instruments
Widebus
D
Inputs Are TTL-Voltage Compatible
D
3-State Outputs Drive Bus Lines Directly
D
Flow-Through Architecture Optimizes
Family
PCB Layout
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
500-mA Typical Latch-Up Immunity at
125°C
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The ’ACT16863 are 18-bit noninverting
transceivers designed for asynchronous
communication between data buses. The
control-function implementation minimizes
external timing requirements.
The ’ACT16863 can be used as two 9-bit
transceivers or one 18-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic
level at the output-enable (OEAB
inputs.
or OEBA)
54ACT16863 . . . WD PACKAGE
74ACT16863 . . . DL PACKAGE
1OEAB
2OEAB
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
1B7
GND
1B8
1B9
GND
GND
2B1
2B2
GND
2B3
2B4
2B5
V
CC
2B6
2B7
GND
2B8
2B9
(TOP VIEW)
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
1OEBA
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
1A7
GND
1A8
1A9
GND
GND
2A1
2A2
GND
2A3
2A4
2A5
V
CC
2A6
2A7
GND
2A8
2A9
2OEBA
The 74ACT16863 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count
and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16863 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16863 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 9-bit section)
INPUTS
OEAB OEBA
H L B data to A bus
L H A data to B bus
H H Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1996, Texas Instruments Incorporated
1
54ACT16863, 74ACT16863
g
18-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS162B – JUNE 1990 – REVISED NOVEMBER 1996
logic symbol
†
1OEBA
1OEAB
2OEBA
2OEAB
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
56
1
29
28
55
54
52
51
49
48
47
45
44
41
40
38
37
36
34
33
31
30
EN1
EN2
EN3
EN4
11
31
1 2
14
10
12
13
16
17
19
20
21
23
24
26
27
2
1B1
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
1B7
1B8
1B9
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1A1
56
1
To Eight Other Channels
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2OEBA
2OEAB
255
1B1
1OEBA
1OEAB
2
2A1
29
28
ht Other Channels
To Ei
1641
2B1
UNIT
54ACT16863, 74ACT16863
18-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS162B – JUNE 1990 – REVISED NOVEMBER 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
Continuous current through VCC or GND ±450 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum package power dissipation at TA = 55°C (in still air) (see Note 2): DL package 1.4 W. . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 2)
54ACT16863 74ACT16863
MIN NOM MAX MIN NOM MAX
V
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 10 0 10 ns/V
T
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 V
I
Output voltage 0 V
O
High-level output current –24 –24 mA
Low-level output current 24 24 mA
Operating free-air temperature –55 125 –40 85 °C
A
CC
CC
0 V
0 V
CC
CC
V
V
†
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
54ACT16863, 74ACT16863
PARAMETER
TEST CONDITIONS
V
UNIT
I
A
VOHI
mA
V
I
A
VOLI
mA
V
PARAMETER
UNIT
A or B
B or A
ns
OEBA
OEAB
A or B
ns
OEBA
OEAB
A or B
ns
18-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS162B – JUNE 1990 – REVISED NOVEMBER 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
= –50 µ
OH
= –24
OH
IOH = –50 mA
IOH = –75 mA
= 50 µ
OL
= 24
OL
IOL = 50 mA
IOL = 75 mA
I
I
I
OZ
I
CC
∆I
C
C
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡
For I/O ports, the parameter IOZ includes the input leakage current.
§
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
Control inputs VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA
‡
A or B ports VO = VCC or GND 5.5 V ±0.5 ±10 ±5 µA
VI = VCC or GND, IO = 0 5.5 V 8 160 80 µA
§
CC
Control inputs VI = VCC or GND 5 V 4.5 pF
i
A or B ports VO = VCC or GND 5 V 17 pF
io
One input at 3.4 V ,
Other inputs at VCC or GND
†
†
†
†
4.5 V 4.4 4.4 4.4
5.5 V 5.4 5.4 5.4
4.5 V 3.94 3.7 3.8
5.5 V 4.94 4.7 4.8
5.5 V 3.85
5.5 V 3.85
4.5 V 0.1 0.1 0.1
5.5 V 0.1 0.1 0.1
4.5 V 0.36 0.5 0.44
5.5 V 0.36 0.5 0.44
5.5 V 1.65
5.5 V 1.65
5.5 V 0.9 1 1 mA
TA = 25°C 54ACT16863 74ACT16863
MIN TYP MAX MIN MAX MIN MAX
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
TA = 25°C 54ACT16863 74ACT16863
MIN TYP MAX MIN MAX MIN MAX
4.1 7 9.9 4.1 12.1 4.1 11.1
3.1 6.4 10.6 3.1 12.5 3.1 11.8
3 5.9 9.6 3 11.5 3 10.6
3.9 7.4 12.3 3.9 14.7 3.9 13.6
5.7 8.2 10.6 5.7 12.3 5.7 11.6
5.4 7.7 10 5.4 11.6 5.4 11
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
FROM TO
(INPUT) (OUTPUT)
or
or
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Power dissipation capacitance per transceiver Outputs enabled CL = 50 pF, f = 1 MHz 62 pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
CL = 50 pF
(see Note A)
54ACT16863, 74ACT16863
18-BIT BUS TRANSCEIVERS
SCAS162B – JUNE 1990 – REVISED NOVEMBER 1996
PARAMETER MEASUREMENT INFORMATION
2 × V
500 Ω
500 Ω
S1
CC
Open
GND
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
WITH 3-STATE OUTPUTS
Open
2 × V
CC
GND
LOAD CIRCUIT
Input
t
PLH
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
1.5 V 1.5 V
50% V
CC
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
Figure 1. Load Circuit and Voltage Waveforms
t
PHL
50% V
V
CC
V
3 V
0 V
OH
OL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
CC
t
PZL
t
PZH
1.5 V
t
PLZ
50% V
t
PHZ
50% V
CC
CC
1.5 V
20% V
80% V
CC
CC
3 V
0 V
[
V
V
[
V
OL
OH
0 V
CC
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
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Copyright 1998, Texas Instruments Incorporated
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