Texas Instruments 74AC11138PWR, 74AC11138PWLE, 74AC11138N, 74AC11138DR, 74AC11138D Datasheet
74AC11138
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS042B – MAY 1988 – REVISED APRIL 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
D
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
D
Incorporates Three Enable Inputs to
Simplify Cascading and/or Data Reception
D
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
500-mA Typical Latch-Up Immunity at
125°C
D
Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 300-mil DIPs (N)
description
The 74AC11138 circuit is designed to be used in high-performance memory-decoding or data-routing
applications requiring very short propagation delay times. In high-performance memory systems, this decoder
can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing
a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than
the typical access time of the memory . This means that the effective system delay introduced by the decoder
is negligible.
The conditions at the binary-select (A, B, C) inputs and the three enable (G1, G2A, G2B) inputs select one of
eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or
inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line
decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
The 74AC11138 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
ENABLE INPUTS
SELECT INPUTS OUTPUTS
G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X H X X X X H H H H H H H H
X XHXXXHHHHHHHH
L XXXXXHHHHHHHH
H LLLLLLHHHHHHH
H LLLLHHLHHHHHH
H LLLHLHHLHHHHH
H LLLHHHHHLHHHH
H LLHLLHHHHLHHH
H LLHLHHHHHHLHH
H LLHHLHHHHHHLH
H L L H H H H H H H H H H L
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y1
Y2
Y3
GND
Y4
Y5
Y6
Y7
Y0
A
B
C
V
CC
G1
G2A
G2B
D, N, OR PW PACKAGE
(TOP VIEW)
74AC11138
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS042B – MAY 1988 – REVISED APRIL 1996
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
logic symbols (alternatives)
†
BIN/OCT
1
15
A
2
14
B
4
13
C
10
9
11
G1
Y0
16
0
&
EN
Y1
1
1
Y2
2
2
Y3
3
3
Y4
5
4
Y5
6
5
Y6
7
6
Y7
8
7
DMUX
0
15
A
14
B
2
13
C
10
9
11
G1
Y0
16
0
&
Y1
1
1
Y2
2
2
Y3
3
3
Y4
5
4
Y5
6
5
Y6
7
6
Y7
8
7
G
7
0
G2A
G2B
G2A
G2B
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
G1
G2B
G2A
C
B
A
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Data
Outputs
Select
Inputs
Enable
Inputs
15
14
13
10
9
11
16
1
2
3
5
6
7
8
74AC11138
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS042B – MAY 1988 – REVISED APRIL 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2):D package 1.3 W. . . . . . . . . . . . . . . . . . . .
N package 1.1 W. . . . . . . . . . . . . . . . . . . .
PW package 0.5 W. . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
recommended operating conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 3 5 5.5 V
VCC = 3 V 2.1
V
IH
High-level input voltage
VCC = 4.5 V
3.15
V
VCC = 5.5 V 3.85
VCC = 3 V 0.9
V
IL
Low-level input voltage
VCC = 4.5 V
1.35
V
VCC = 5.5 V 1.65
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
VCC = 3 V –4
I
OH
High-level output current
VCC = 4.5 V
–24
mA
VCC = 5.5 V –24
VCC = 3 V 12
I
OL
Low-level output current
VCC = 4.5 V
24
mA
VCC = 5.5 V 24
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
A
Operating free-air temperature –40 85 °C
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