Texas Instruments CY74FCT244CTSOC, CY74FCT244CTQCT, CY74FCT244CTQC, CY74FCT244ATSOCT, CY74FCT244ATSOC Datasheet

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8-Bit Buffers/Line Drivers
CY54/74FCT240T
CY54/74FCT244T
SCCS017 - May 1994 - Revised February 2000
Copyright © 2000, Texas Instruments Incorporated
Features
Function, pinout, and drive compatible with FCT and
F logic
FCT-C speed at 4.1 ns max. (Com’l), FCT-A speed at 4.8 ns max. (Com’l)
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
ESD > 2000V
Matched rise and fall times
Fully compatible with TTL input and output logic levels
Extended commercial range of 40˚C to +85˚C
• Sink current 64 mA (Com’l), 48 mA (Mil) Source current 32 mA (Com’l), 12 mA (Mil)
Functional Description
The FCT240T and FCT244T are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers. The devices provide speed and drive capabilities equivalent to their fastest bipolar logic counterparts while reducing power consumption. The input and output v oltage le v els allow direct interface with TTL, NMOS, and CMOS devices without e xternal components.
The outputs are designed with a power-off disable feature to allow for live insertion of boards.
Logic Block Diagram
FCT240T–2
4
8 9 10 11 12
765
1516 17 18
3 2 1
20
13
14
19
DA
3
OB2OB
1
DB
0
OA
2
OA
0
DB
3
V
CC
GND
DB
1
Top View
DA
1
LCC
OE
A
FCT240T–1
DA
0
OB
0
OB
3
DB
2
OA
3
1 2 3 4 5 6 7 8 9 10
11
12
16
17
18
19
20
13
14
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
DA
3
GND
V
CC
FCT240T–3
15
DIP/SOIC/QSOP
Top View
OA
1
DA
2
OE
B
OB
2
OB
3
OE
B
OA
0
OA
2
DB
2
DB
3
OA
3
DB
0
OA
1
DB
1
OE
B
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
DA
3
OB
2
OB
3
OA
0
OA
2
DB
2
DB
3
OA
3
DB
0
OA
1
DB
1
Pin Configurations
4
8 9 10 11 12
765
1516 17 18
3 2 1
20
13
14
19
DA
3
OB2OB
1
DB
0
OA
2
OA
0
DB
3
V
CC
GND
DB
1
Top View
DA
1
LCC
OE
A
DA
0
OB
0
OB
3
DB
2
OA
3
1 2 3 4 5 6 7 8 9 10
11
12
16
17
18
19
20
13
14
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
DA
3
GND
V
CC
15
DIP/SOIC/QSOP
Top View
OA
1
DA
2
OE
B
OB
2
OB
3
OE
B
OA
0
OA
2
DB
2
DB
3
OA
3
DB
0
OA
1
DB
1
OE
B
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
DA
3
OB
2
OB
3
OA
0
OA
2
DB
2
DB
3
OA
3
DB
0
OA
1
DB
1
FCT240T–4
FCT240T–5 FCT240T–6
FCT240T
FCT240T
FCT244T
FCT244T
FCT240T
FCT244T
CY54/74FCT240T
CY54/74FCT244T
2
] ]
Maximum Ratings
[2, 3]
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Voltage to Ground Potential...............–0.5V to +7.0V
DC Input Voltage............................................–0.5V to +7.0V
DC Output Voltage.........................................–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Function Table FCT240T
[1]
Inputs
OutputOE
A
OE
B
D
L L
H
L L
H
L H X
H
L
Z
Function Table FCT244T
[1]
Inputs
OutputOE
A
OE
B
D
L L
H
L L
H
L H X
L H Z
Operating Range
Range Speed
Ambient
Temperature V
CC
Commercial DT 0°C to +70°C 5V ± 5% Commercial T, AT, CT –40°C to +85°C 5V ± 5% Military
[4]
All –55°C to +125°C 5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
[5]
Max. Unit
V
OH
Output HIGH Voltage VCC=Min., IOH=–32 mA Com’l 2.0 V
VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V VCC=Min., IOH=–12 mA Mil 2.4 3.3 V
V
OL
Output LOW Voltage VCC=Min., IOL=64 mA Com’l 0.3 0.55 V
VCC=Min., IOL=48mA Mil 0.3 0.55 V
V
IH
Input HIGH Voltage 2.0 V
V
IL
Input LOW Voltage 0.8 V
V
H
Hysteresis
[6]
All inputs 0.2 V
V
IK
Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V
I
I
Input HIGH Current VCC=Max., VIN=V
CC
5 µA
I
IH
Input HIGH Current VCC=Max., VIN=2.7V ±1 µA
I
IL
Input LOW Current VCC=Max., VIN=0.5V ±1 µA
I
OZH
Off State HIGH-Level Output Current
VCC= Max., V
OUT
= 2.7V 10 µA
I
OZL
Off State LOW-Level Output Current
VCC = Max., V
OUT
= 0.5V –10 µA
I
OS
Output Short Circuit Current
[7]
VCC=Max., V
OUT
=0.0V –60 –120 –225 mA
I
OFF
Power-Off Disable VCC=0V, V
OUT
=4.5V ±1 µA
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
4. T
A
is the “instant on” case temperature.
5. Typical values are at V
CC
=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I
OS
tests should be performed last.
CY54/74FCT240T
CY54/74FCT244T
3
]
Capacitance
[6]
Parameter Description Typ.
[5]
Max. Unit
C
IN
Input Capacitance 5 10 pF
C
OUT
Output Capacitance 9 12 pF
Power Supply Characteristics
Parameter Description Test Conditions Typ.
[5]
Max. Unit
I
CC
Quiescent Power Supply Current VCC=Max., VIN≤0.2V,
V
IN≥VCC
–0.2V
0.1 0.2 mA
I
CC
Quiescent Power Supply Current (TTL inputs)
VCC=Max., VIN=3.4V,
[8]
f1=0, Outputs Open
0.5 2.0 mA
I
CCD
Dynamic Power Supply Current
[9]
VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open,
OE1=OE2=GND,
V
IN
0.2V or VIN≥VCC–0.2V
0.06 0.12 mA/MHz
I
C
Total Power Supply Current
[10]
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f
1
=10 MHz,
OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
0.7 1.4 mA
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f
1
=10 MHz,
OE1=OE2=GND, VIN=3.4V or VIN=GND
1.0 2.4 mA
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f
1
=2.5 MHz,
OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
1.3 2.6
[11]
mA
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f
1
=2.5 MHz,
OE1=OE2=GND, VIN=3.4V or VIN=GND
3.3 10.6
[11]
mA
Notes:
8. Per TTL driven input (V
IN
=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
IC=ICC+ICCDHNT+I
CCD(f0
/2 + f1N1)
I
CC
= Quiescent Current with CMOS input levels
I
CC
= Power Supply Current for a TTL HIGH input (VIN=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
f
1
= Input signal frequency
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
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