The UC1525A/1527A series of pulse width modulator integrated circuits are de
signed to offer improved performance and lowered external parts count when
used in designing all types of switching power supplies. The on-chip +5.1V ref
erence is trimmed to±1% and the input common-mode range of the error ampli
fier includes the reference voltage, eliminating external resistors. A sync input to
the oscillator allows multiple units to be slaved or a single unit to be synchro
nized to an external system clock. A single resistor between the C
charge terminals provides a wide range of dead-time adjustment. These
devices also feature built-in soft-start circuitry with only an external timing ca
pacitor required. A shutdown terminal controls both the soft-start circuitry and
the output stages, providing instantaneous turn off through the PWM latch with
pulsed shutdown, as well as soft-start recycle with longer shutdown commands.
These functions are also controlled by an undervoltage lockout which keeps the
outputs off and the soft-start capacitor discharged for sub-normal input volt
ages. This lockout circuitry includes approximately 500mV of hysteresis for jit
ter-free operation. Another feature of these PWM circuits is a latch following the
comparator. Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each
clock pulse. The output stages are totem-pole designs capable of sourcing or
sinking in excess of 200mA. The UC1525A output stage features NOR logic,
giving a LOW output for an OFF state. The UC1527A utilizes OR logic which
results in a HIGH output level when OFF.
= 20V, and over operating temperature, unless otherwise specified, TA=T
IN
.
J
PARAMETERTEST CONDITIONS
UC1525A/UC2525A
UC1527A/UC2527A
UC3525A
UC3527A
MINTYPMAXMINTYPMAX
Reference Section
Output VoltageT
Line RegulationV
Load RegulationI
= 25°C5.055.105.155.005.105.20V
J
= 8 to 35V10201020mV
IN
= 0 to 20mA20502050mV
L
Temperature Stability (Note 5)Over Operating Range20502050
Total Output Variation (Note 5)Line, Load, and Temperature5.005.204.955.25V
Shorter Circuit CurrentV
Output Noise Voltage (Note 5)
Long Term Stability (Note 5)T
=0,TJ= 25°C8010080100mA
REF
≤°
10Hz 10kHz, T = 25 C
= 125°C20502050mV
J
J
4020040200
Oscillator Section(Note 6)
Initial Accuracy (Notes5&6)T
Voltage Stability (Notes5&6)V
Temperature Stability (Note 5)Over Operating Range
Minimum FrequencyR
Maximum FrequencyR
Current MirrorI
For single-ended supplies, the driver outputs are
grounded. The V
totem-pole source transistors on alternate oscillator
cycles.
The low source impedance of the output drivers provides
rapid charging of power FET Input capacitance while
minimizing external components.
terminal is switched to ground by the
C
In conventional push-pull bipolar designs, forward base
drive is controlled by R1-R3. Rapid turn-off times for the
power devices are achieved with speed-up capacitors
C1 and C2.
Low power transformers can be driven by the UC1525A.
Automatic reset occurs during dead time, when both
ends of the primary winding are switched to ground.
5
UC1525A/27A
UC2525A/27A
UC3525A/27A
UC1525A oscillator schematic.
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTIC SHUTDOWN OPTIONS
(See Block Diagram)
Since both the compensation and soft-start terminals
(Pins 9 and 8) have current source pull-ups, either can
readily accept a pull-down signal which only has to sink a
maximum of 100µA to turn off the outputs. This is subject
to the added requirement of discharging whatever exter
nal capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry
of Pin 10 which has been improved to enhance the avail
able shutdown options. Activating this circuit by applying
a positive signal on Pin 10 performs two functions; the
PWM latch is immediately set providing the fastest
turn-off signal to the outputs; and a 150µA-current sink
begins to discharge the external soft-start capacitor. If the
shutdown command is short, the PWM signal is terminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient
implementation of pulse-by-pulse current limiting. Holding
Pin 10 high for a longer duration, however, will ultimately
discharge this external capacitor, recycling slow turn-on
upon release.
Pin 10 should not be left floating as noise pickup could
conceivably interrupt normal operation. All transitions of
the voltage on pin 10 should be within the time frame of
one clock cycle and not repeated at a frequency higher
than 10 clock cycles.
Oscillator Charge Time vs RTand C
.Oscillator Discharge Time vs R
T
6
and CT.
D
UC1525A/27A
UC2525A/27A
UC3525A/27A
RLis impedance from pin 9 to ground. Values below 30kΩ
will begin to limit the maximum duty cycle.
Maximum value RDvs minimum value RT.
Error amplifier voltage gain and phase vs frequency.
Lab test fixture.
7
REVISION HISTORY
REVISIONDATECHANGE
SLUS191B6/28/05Updated pin 10 description in the Principles of Operation and Typical
UC1525A/27A
UC2525A/27A
UC3525A/27A
Characteristics Shutdown Options Section.
8
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