TelCom Semiconductor Inc TC500COE, TC500ACPE, TC500ACOE, TC510CPF, TC510COG Datasheet

...
PRECISION ANALOG FRONT ENDS
EVALUATION
KIT
AVAILABLE
TC500
TC500A
TC510 TC514
1

FEATURES

Precision (up to 17 Bits) A/D Converter "Front End"
Flexible: User Can Trade-Off Conversion Speed
for Resolution
Single Supply Operation (TC510/514)
4 Input, Differential Analog MUX (TC514)
Automatic Input Voltage Polarity Detection
Low Power Dissipation ...........TC500/500A: 10mW
TC510/514: 18mW
Wide Analog Input Range .......±4.2V (TC500A/510)
Directly Accepts Bipolar and Differential Input
Signals

ORDERING INFORMATION

Part No. Package Temp. Range
TC500ACOE 16-Pin SOIC 0°C to +70°C T
C500ACPE 16-Pin Plastic DIP (Narrow) 0°C to +70°C
TC500COE 16-Pin SOIC 0°C to +70°C TC500CPE 16-Pin Plastic DIP (Narrow) 0°C to +70°C
TC510COG 24-Pin SOIC 0°C to +70°C TC510CPF 24-Pin Plastic DIP (300 Mil.) 0°C to +70°C TC514COI 28-Pin SOIC 0°C to +70°C TC514CPJ 28-Pin Plastic DIP (300 Mil.) 0°C to +70°C
TC500EV Evaluation Kit for TC500/500A/510/514

FUNCTIONAL BLOCK DIAGRAM

C
REF
CH1 CH2 CH3 CH4 CH1 CH2 CH3 CH4
ACOM
OSC
+
C
+
REF
SW
SW
SW
V
REF
SW
I
SW
Z
SW
I
A1
A0
+ + + + – – – –
V
S
DIF.
MUX
(TC514)
V
REF
SW
R
R
+
SW
RI
RI
+
SW
RI
RI
SW
1
DC-TO-DC
CONVERTER
(TC510 & TC514)
C
REF
BUFFER
– +

GENERAL DESCRIPTION

The TC500/500A/510/514 family are precision analog front ends that implement dual slope A/D converters having a maximum resolution of 17 bits plus sign. As a minimum, each device contains the integrator, zero crossing compara­tor and processor interface logic. The TC500 is the base (16 bit max) device and requires both positive and negative power supplies. The TC500A is identical to the TC500, except it has improved linearity allowing it to operate to a maximum resolution of 17 bits. The TC510 adds an on­board negative power supply converter for single supply operation. The TC514 adds both a negative power supply converter and a 4 input differential analog multiplexer.
Each device has the same processor control interface consisting of 3 wires: control inputs A and B and zero­crossing comparator output (CMPTR). The processor ma­nipulates A, B to sequence the TC5xx through four phases of conversion: Auto Zero, Integrate, Deintegrate and Inte­grator Zero. During the Auto Zero phase, offset voltages in the TC5xx are corrected by a closed-loop feedback mecha­nism. The input voltage is applied to the integrator during the Integrate phase. This causes an integrator output dv/dt directly proportional to the magnitude of the input voltage. The higher the input voltage, the greater the magnitude of the voltage stored on the integrator during this phase. At the start of the Deintegrate phase, an external voltage reference is applied to the integrator, and at the same time, the external host processor starts its on-board timer.
CONTROL LOGIC
A B 0 0 ZERO INTEGRATOR OUTPUT 0 1 AUTO-ZERO 1 0 SIGNAL INTEGRATE 1 1 DEINTEGRATE
CMPTR 2 –
+
POLARITY
DETECTION
PHASE
DECODING
LOGIC
SW
INT
AZ
Z
C
INT
C
AZ
INTEGRATOR
+
CONTROL
CAP
CAP
C
INT
CMPTR 1 +
ANALOG
SWITCH
SIGNALS
+
R
C
BUF
SW
IZ
V
OUT
CONVERTER STATE
TC500
TC500A
TC510 TC514
LEVEL
SHIFT
The processor main-
CMPTR OUTPUT
DGND
2
3
4
5
6
7
TELCOM SEMICONDUCTOR, INC.
1.0µF
C
OUT
1.0µF
V
SS
(TC500 TC500A)
CONTROL LOGIC
BA
8
TC500/A/510/514-3 10/3/96
3-19
TC500 TC500A TC510 TC514
PRECISION ANALOG FRONT ENDS

GENERAL DESCRIPTION (Cont.)

tains this state until a transition occurs on the CMPTR output, at which time the processor halts its timer. The resulting timer count is the converted analog data. Integrator Zero (the final phase of conversion) removes any residue remain­ing in the integrator in preparation for the next conversion.
The TC500/500A/510/514 offer high resolution (up to 17 bits) superior 50Hz/60Hz noise rejection, low power opera­tion, minimum I/O connections, low input bias currents and lower cost compared to other converter technologies having similar conversion speeds.
ABSOLUTE MAXIMUM RATINGS
*
TC510/514 Positive Supply Voltage
(VDD to GND) .................................................. +10.5V
TC500/500A Supply Voltage
(V
to VSS) ....................................................... +18V
DD
TC500/500A Positive Supply Voltage
(VDD to GND) ..................................................... +12V
ELECTRICAL CHARACTERISTICS: TC510/514: V
specified. CAZ = C
TC500/500A Negative Supply Voltage
(VSS to GND) ...................................................... – 8V
Analog Input Voltage (V
+
IN
_
or V
) ....................VDD to V
IN
Logic Input Voltage .................. VDD +0.3V to GND – 0.3V
Voltage on OSC ..... – 0.3V to (VDD +0.3V) for VDD < 5.5V
Ambient Operating Temperature Range ...... 0°C to +70°C
Storage Temperature Range ................ – 65°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
* Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause perma­nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
= +5V, TC500/500A: V
DD
= 0.47 µF
REF
= ±5V unless otherwise
S
SS
TA = +25°C TA = 0°C to +70°C
Symbol Parameter Test Conditions Min Typ Max Min Typ Max Unit Analog
Resolution Note 1 60 µV
ZSE Zero-Scale Error TC500/510/514 0.005 0.005 0.012 % F.S.
with Auto Zero Phase TC500A 0.003 0.003 0.009
ENL End Point Linearity
NL Best Case Straight
Line Linearity
ZS
TC
SYE Full-Scale Symmetry Note 3 0.01 0.03 % F.S.
FS
TC
I
IN
V
CMR
V
REF
Zero-Scale Over Operating 1 2 µV/°C Temperature Temperature Range Coefficient
Error (Roll-Over Error) Full-Scale Temperature Over Operating 10
Coefficient Temperature Range
Input Current VIN = 0V 6 pA Common-Mode VSS +1.5 VDD – 1.5 V
Voltage Range Integrator Output Swing VSS +0.9 VDD – 0.9 VSS +0.9 VSS +0.9 V Analog Input Signal RangeACOM = GND = 0V VSS +1.5 VDD – 1.5 V Voltage Reference Range V
TC500/510/514, Notes 1, 2, TC500A
TC500/510/514, Notes 1, 2, TC500A
External Reference TC = 0ppm/°C
_
+
V
REF
REF
0.005 0.015 0.015 0.060 — 0.010 0.010 0.045
0.003 0.008 — — 0.005
+1.5 VDD – 1.5 V
SS
+1.5 V
SS
V
+1 VDD – 1 V
SS
+1 VDD – 1 V
SS
+1.5 V
SS
% F.S. % F.S.
% F.S. % F.S.
ppm/°C
3-20
TELCOM SEMICONDUCTOR, INC.
PRECISION ANALOG FRONT ENDS

ELECTRICAL CHARACTERISTICS: (Cont.)

TC500
TC500A
TC510 TC514
1
T
Symbol Parameter Test Conditions Min Typ Max Min Typ Max Unit Digital
V
OH
V
OL
V
IH
V
IL
I
L
t
D
Multiplexer (TC514 Only)
R
DS
ON
Power (TC510/514 Only)
I
S
P
D
V
DD
R
OUT
I
OUT
Power (TC500/500A Only)
I
S
P
D
V
DD
V
SS
NOTES: 1. Integrate time 66msec, auto-zero time 66msec, V
Comparator Logic 1, I Output High
Comparator Logic 0, I Output Low
Logic 1, Input High Voltage 3.5 3.5 V Logic 0, Input Low Voltage 1 1 V Logic Input Current Logic 1 or 0 0.3 µA Comparator Delay 2 3 µsec
Maximum Input Voltage VDD = 5V – 2.5 2.5 – 2.5 2.5 V Drain/Source ON Resistance VDD = 5V 6 10 k
Supply Current VDD = 5V, A = 1, B = 1 1.8 2.4 3.5 mA Power Dissipation VDD = 5V 18 mW Positive Supply 4.5 5.5 4.5 5.5 V
Operating Voltage Range Operating Source Resistance I Oscillator Frequency (Note 3) 100 kHz Maximum Current Out VDD = 5V – 10 – 10 mA
Supply Current VS = ±5V, A = B = 1 1 1.5 2.5 mA Power Dissipation V Positive Supply 4.5 7.5 4.5 7.5 V
Operating Voltage Range Negative Supply – 4.5 – 7.5 – 4.5 – 7.5 V
Operating Voltage Range
2. End point linearity at ±1/4, ±1 /2, ±3/4 F.S. after full-scale adjustment.
3. Roll-over error is related to C
INT
, C
REF
= 400µA4——4V
SOURCE
= 2.1mA 0.4 0.4 V
SINK
= 10mA 60 85 100
OUT
= 5V, VSS = – 5V 10 mW
DD
(peak) 4V.
INT
, CAZ characteristics.
= +25°C TA = 0°C to +70°C
A
2
3
4
5
6
TELCOM SEMICONDUCTOR, INC.
7
8
3-21
TC500 TC500A TC510 TC514

PIN CONFIGURATIONS

PRECISION ANALOG FRONT ENDS
C
V C
ACOM
C
REF
C
REF
V
REF
V
OUT
C
INT
C
AZ
BUF
ACOM
C
REF
+
C
REF
V
REF +
V
REF
N/C N/C N/C
INT
– + –
SS AZ
1 2 3 4 5 6 7 8
1 2 3 4 5 6
TC510CPF
7 8
9 10 11 12
TC500/
TC500A
CPE
V
16
DD
15
DIGITAL GND
14
CMPTR OUT B
13BUF 12
A
+
V
11
IN
V
10
IN
+
V
9
REF
24
CAP
23
DGND
22
CAP V
21
DD
20
OSC
CMPTR OUT
19
A
18 17
B
+
V
16
IN
15
V
IN
14
N/C
13
N/C
C
INT
V
SS
C
AZ
BUF
ACOM
C
REF
+
C
REF
V
REF
+
V
C
OUT
INT
C
AZ
BUF
ACOM
C
REF +
C
REF
V
REF +
V
REF
N/C N/C N/C
1 2 3 4 5 6 7 8 9
10 11 12
1 2
3 4
TC500/
5
TC500A
COE
6 7 8
TC510COG
16 15 14
13 12
11
10
9
24 23 22 21 20 19 18 17 16 15 14 13
V
DD
DIGITAL GND CMPTR OUT B A
+
V
IN
V
IN
+
V
REF
CAP DGND
+
CAP V
DD OSC CMPTR OUT
A
B
+
V
IN
V
IN
N/C
N/C
3-22
V
OUT
C
INT
C
AZ
BUF
ACOM
C
REF
+
C
REF
V
REF +
V
REF
CH4
CH3
CH2
CH1
N/C
– – –
1 2 3 4 5 6 7 8
9 10 11
12 13 14
TC514CPJ
28
CAP
27
DGND
26
CAP V
25
DD
24
OSC CMPTR OUT
23
A
22
B
21
A0
20
A1
19 18
CH1
17
CH2
16
CH3
CH4
15
+
+ +
+
+
V
OUT
C
INT
C
AZ
BUF
ACOM
C
REF
+
C
REF –
V
REF +
V
REF
CH4 CH3 CH2
CH1
N/C
1 2 3 4 5 6
TC514COI
7 8 9
10
11
12
13 14
28 27 26 25 24 23 22 21 20 19 18 17
16 15
CAP DGND
+
CAP V
DD OSC CMPTR OUT
A B A0
A1
+
CH1
+
CH2
+
CH3
+
CH4
TELCOM SEMICONDUCTOR, INC.
PRECISION ANALOG FRONT ENDS
PIN DESCRIPTION
TC500
TC500A
TC510 TC514
1
Pin No Pin No Pin No
(TC500, 500A) (TC510) (TC514) Symbol Description
122C 2 Not Used Not Used V 333CAZAuto-zero input. The Auto-zero capacitor connection. 4 4 4 BUF Buffer output. The Integrator capacitor connection. 5 5 5 ACOM This pin is grounded in most applications. It is recommended that
666C 777C 888V
999V 10 15 Not Used V 11 16 Not Used V 12 18 22 A Input. Converter phase control MSB. (See input B.) 13 17 21 B Input. Converter phase control LSB. The states of A, B place the
14 19 23 CMPTR OUT Zero crossing comparator output. CMPTR is HIGH during the
15 23 27 DGND Input. Digital ground. 16 21 25 V
22 26 CAP 24 28 CAP
11V
20 24 OSC Oscillator control input. The negative power supply converter normally
18 CH1 13 CH1 17 CH2 12 CH2 16 CH3 11 CH3 15 CH4
INT SS
– REF
+ REF
– REF
+ REF
– IN
+ IN
DD
OUT
Integrator output. Integrator capacitor connection. Negative power supply input (TC500/500A only).
or C
ACOM and the input common pin (V analog common mode range (CMR).
Input. Negative reference capacitor connection. Input. Positive reference capacitor connection. Input. External voltage reference (–) connection. Input. External voltage reference (+) connection. Negative analog input. Positive analog input.
TC5xx in one of four required phases. A conversion is complete when all four phases have been executed:
Phase control input pins: AB =
Integration phase when a and is LOW when a negative input voltage is being integrated. A HIGH-to-LOW transition on CMPTR signals the processor that the Deintegrate phase is completed. CMPTR is undefined during the Auto-Zero phase. It should be monitored to time the Integrator Zero phase (see text).
Input. Power supply positive connection.
+
Input. Negative power supply converter capacitor (+) connection.
Input. Negative power supply converter capacitor (–) connection. Output. Negative power supply converter output and reservoir
capacitor connection. This output can be used to power other devices in the circuit requiring a negative bias voltage.
runs at a frequency of 100kHz. The converter oscillator frequency can be slowed down (to reduce quiescent current) by connecting an external capacitor between this pin and VDD. (See Typical Character­istics Curves).
+
Positive analog input pin. MUX channel 1.
Negative analog input pin. MUX channel 1.
+
Positive analog input pin. MUX channel 2.
Negative analog input pin. MUX channel 2.
+
Positive analog input pin. MUX channel 3.
Negative analog input pin. MUX channel 3.
+
Positive analog input pin. MUX channel 4.
positive input voltage is being integrated
IN
00: Integrator Zero 01: Auto Zero 10: Integrate 11: Deintegrate
) be within the
HN
2
3
4
5
6
7
8
TELCOM SEMICONDUCTOR, INC.
3-23
TC500 TC500A TC510 TC514

PIN DESCRIPTION (Cont.)

Pin No Pin No Pin No
(TC500/A) (TC510) (TC514) Symbol Description
10 CH4 20 A0 Multiplexer input channel select input LSB. (See A1). 19 A1 Multiplexer input channel select input MSB.
GENERAL THEORY OF OPERATION Dual-Slope Conversion Principles (Figure 2)
Actual data conversion is accomplished in two phases:
input signal Integration and reference voltage Deintegration.
The integrator output is initialized to 0V prior to the start of Integration. During Integration, analog switch S1 con­nects VIN to the integrator input where it is maintained for a fixed time period (t integrator output to depart 0V at a rate determined by the
magnitude of
VIN, and a direction determined by the of VIN. The Deintegration phase is initiated immediately at the expiration of t
). The application of VIN causes the
INT
.
INT
Negative analog input pin. MUX channel 4
Phase control input pins: A1, A0 =
polarity
PRECISION ANALOG FRONT ENDS
00 = Channel 1 01 = Channel 2 10 = Channel 3 11 = Channel 4
During Deintegration, S1 connects a reference voltage (having a polarity opposite that of VIN) to the integrator input. At the same time, an external precision timer is started. The Deintegration phase is maintained until the comparator output changes state, indicating the integrator has returned to its starting point of 0V. When this occurs, the precision timer is stopped. The Deintegration time period (t measured by the precision timer, is directly proportional to the magnitude of the applied input voltage.
A simple mathematical equation relates the Input Signal, Reference Voltage and Integration time:
DEINT
), as
ANALOG
INPUT
(VIN)
OUTPUT
INTEGRATOR
T
INT
VOLTAGE
T
DEINT
REF
±
V V
IN IN
S1
' V ' 1/2 V
C
INT
R
INT
FULL SCALE
FULL SCALE
Figure 2. Basic Dual-Slope Converter
INTEGRATOR
+
SWITCH DRIVER
POLARITY CONTROL
V
SUPPLY
V
INT
V
INT
+
PHASE
CONTROL
TC510
COMPARATOR
CONTROL
LOGIC
AB
I/O
MICROCOMPUTER
ROM RAM
TIMER
COUNTER
CMPTR OUT
3-24
TELCOM SEMICONDUCTOR, INC.
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