Tektronix TLA704 Data Sheet

Page 1
DATA SHEET
TFT COLOR LCD MODULE
NL6448AC33-18
26 cm (10.4 type), 640 × 480 pixels, 262144 colors,
incorporated two-lamp/edge-light type backlight

DESCRIPTION

NL6448AC33-18 is a TFT (thin film transistor) active matrix color liquid crystal display (LCD) comprising amorphous silicon TFT attached to each signal electrode, a driving circuit and a backlight. NL6448AC33-18 has a built-in backlight. Backlight includes long life CCFLs and the tubes are replaceable.
The 26 cm diagonal display area contains 640 × 480 pixels and can display 262144 colors simultaneously.
NL6448AC33-18 is suitable for factory automation use, because luminance is higher, and viewing direction is selectable by switching display scan direction.

FEATURES

• Backlight tube replaceable (refer to the tube replace manual for NL6448AC33-18)
• High luminance (200 cd/m2 TYP.)
• Display up side/down side reverse function (user set up)
• Low reflection
• 6-bit digital RGB signals
• 3.3 V operation (5.0 V available)
• Incorporated edge type backlight (Two lamps, with inverter, bright/dark selectable)
• Data enable function (DE/Fixed mode select: user set up)
• Smooth polarizer surface (No antiglare treatment)

APPLICATIONS

• Personal computers (PC) for factory automation
• Display terminals for control system
• Monitors for process controller
Document No. EN0195EJ2V0DS00 Date Published January 1997 P Printed in Japan
The information in this document is subject to change without notice.
©
1996
Page 2
NL6448AC33-18

STRUCTURE AND FUNCTIONS

A TFT color LCD module comprises a TFT LCD panel, LSIs for driving liquid crystal, and the backlight. The TFT LCD panel is composed of a TFT array glass substrate superimposed on a color filter glass substrate with liquid crystal filled in the narrow gap between two substrates. The backlight apparatus is located on the backside of the LCD panel.
RGB (Red, Green, Blue) data signals are sent to LCD panel drivers after modulation into suitable forms for active matrix addressing through signal processor.
Each of the liquid crystal cells acts as an electro-optical switch that controls the light transmission from the backlight by a signal applied to a signal electrode through the TFT switch.

BLOCK DIAGRAM

H-driver
R0–R5 G0–G5 B0–B5
CLK Hsync Vsync
DE
V
CC
V
DDB
BRTHL
GND (SG) Frame GNDB
Digital signal processor
LCD timing controller
SW5
DE/Fixed mode select
Power supply circuit
Inverter
Level shift
Scan select SW1 - SW 4
LSls Drivers
V-driver
1920 lines
TFT LCD panel
H : 640 × 3 (R, G, B) V : 480
480 lines
Backlight
2
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NL6448AC33-18

OUTLINE OF CHARACTERISTICS (at room temperature)

Display area 211.2 (H) × 158.4 (V) mm Drive system a-Si TFT active matrix Display colors 262144 colors Number of pixels 640 × 480 pixels Pixel arrangement RGB vertical stripe Pixel pitch 0.33 (H) × 0.33 (V) mm Module size 243.0 (H) × 185.1 (V) × 11.0 max. (D) mm Weight 470 g (typ.) + 15 g (typ., inverter) Contrast ratio 150:1 (typ.) Viewing angle (more than the contrast ratio of 10:1)
Horizontal : 45˚ (typ. left side, right side) Vertical : 30˚ (typ. up side), 20˚ (typ. down side)
Designed viewing direction • Wider viewing angle with contrast ratio
: up side (12 o’clock, normal scan) : down side (6 o’clock, reverse scan)
• Wider viewing angle without image reversal : down side (6 o’clock, normal scan) : up side (12 o’clock, reverse scan)
• Optimum grayscale (γ = 2.2): perpendicular
Color gamut 56 % (typ. center, to NTSC) Response time 40 ms (max.), “white” to “black”
2
Luminance 200 cd/m Signal system 6-bit digital signals for each of RGB primary colors, synchronous signals
(Hsync, Vsync), dot clock (CLK), DE signal Supply voltages 3.3 V [5.0 V], 12 V Backlight Edge light type, two cold cathode fluorescent lamp Power consumption 6.8 W (typ. at 3.3 V, 12.0 V)
(typ., lamp current: 5.0 mA (per one lamp))

GENERAL SPECIFICATIONS

Item Specification Unit Module size 243.0 ± 0.5 (H) × 185.1 ± 0.5 (V) × 11.0 max. (D) mm Invertor size 25.0 ± 0.5 (H) × 100 Display area 211.2 (H) × 158.4 (V) mm Number of pixels 640 (H) × 480 (V) pixel Dot pitch 0.11 (H) × 0.33 (V) mm Pixel pitch 0.33 (H) × 0.33 (V) mm Pixel arrangement RGB (Red, Green, Blue) vertical stripe Display colors 262144 color Weight Module: 480 (max.) + Inverter: 20 (max.) g
+0.7
(V) × 10.2 max. (D) mm
–0.3
3
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NL6448AC33-18

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Rating Unit Remarks Supply voltage VCC –0.3 to 6.5 V Ta = 25 ˚C Input voltage VI –0.3 to 6.5 V VI – VCC < 3.0 Storage temp. TST –20 to 60 ˚C Operating temp. TOP 0 to 50 ˚C Module surface* Humidity 95 % relative humidity Ta 40 ˚C No condensation
85 % relative humidity
Absolute humidity shall not Ta > 50 ˚C exceed Ta = 50 ˚C, 85 % relative humidity level
* Measured at the display area

ELECTRICAL CHARACTERISTICS

(1) Logic, LCD driving
Parameter Symbol Min. Typ. Max. Unit Remarks Supply voltage VCC 3.0 3.3 3.6 V VCC = 3.3 V
(4.75) (5.0) (5.25) (VCC = 5.0 V) Logic input “L” voltage VIL 0–VCC × 0.3 V Logic input “H” voltage VIH VCC × 0.7 VCC V Supply current ICC *1 300 *2 400 mA VCC = 3.3 V
*1 (200) *2 (300) mA VCC = 5.0 V
40 < Ta 50 ˚C
Ta = 25 ˚C
*1. Checker flag pattern (in EIAJ ED-2522) *2. Theoretical maximum current pattern
(2) Backlight
Parameter Symbol Min. Typ. Max. Unit Remarks Supply voltage VDDB 11.4 12.0 12.6 V – Supply current IDDB 480 mA 200cd/m
2

SUPPLY VOLTAGE SEQUENCE

*1 The supply voltage for input signals should
be same as VCC.
*2 Apply V
DDB within the LCD operation pe-
riod. When the backlight turns on before LCD operation or the LCD operation turns off before the backlight turns off, the dis­play may momentarily become white.
*3 When the power is off, please keep whole
signals (Hsync, Vsync, CLK, data) low level or high impedance.
V
Signals
Backlight
3.0 (4.75 V) 3.0 (4.75 V)
CC
0s<t<35 ms 0s<t<35 ms
2tv 0<
Ta = 25 ˚C
4
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INTERFACE PIN CONNECTION

(1) Interface signals, power supply
Module side connector Mating connector CN1 ··· DF9C-31P-1V (No. 1 to 31) DF9-31S-1V or DF9M-31S-1R
Supplier: HIROSE ELECTRIC CO., LTD.
NL6448AC33-18
Pin No. Symbol Function
1 GND Ground 2 CLK Dot clock 3 Hsync Horizontal sync. 4 Vsync Vertical sync. 5 GND Ground 6 R0 Red data (LSB) 7 R1 Red data 8 R2 Red data
9 R3 Red data 10 R4 Red data 11 R5 Red data (MSB) 12 GND Ground 13 G0 Green data (LSB) 14 G1 Green data 15 G2 Green data 16 G3 Green data 17 G4 Green data 18 G5 Green data (MSB)
Pin No. Symbol Function
19 GND Ground 20 B0 Blue data (LSB) 21 B1 Blue data 22 B2 Blue data 23 B3 Blue data 24 B4 Blue data 25 B5 Blue data (MSB) 26 GND Ground 27 DE Data enable 28 VCC Power supply 29 VCC Power supply 30 N. C. Non-connection 31 N. C. Non-connection
LSB : Least Significant Bit MSB : Most Significant Bit
Notes 1. VCC: All VCC terminals should be connected to 3.3 V or 5.0 V.
2. DE/Fixed mode select is set by SW5 on the rear side.
• DE mode (factory set) SW5 SW1 SW2 SW3 SW4
• Fixed mode SW5 SW1 SW2 SW3 SW4
out of relation
DE/Fixed mode set up switch
out of relation
DE/Fixed mode set up switch
5
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(2) Backlight
Inverter side connector Mating connector CN2 ··· LZ-5P-SL-SMT LZ-5S-SC3 Supplier: Japan Aviation Electronics Industry Limited (JAE)
<Connector location>
Pin No. Symbol Function
1VDDB Backlight power supply 2VDDB Backlight power supply 3 GNDB Backlight ground 4 GNDB Backlight ground 5 BRTHL Backlight luminance select *
1
Note 1. High luminance (100 %) : High level or open
Low luminance (60 %, TYP.) : Low level
NL6448AC33-18
upper side
CN2
NL6448AC33-18
<Rear view>
Inverter
CN3
lower side
1 2 3 4 5
<pin arrangement of CN3>
CN1
1
3
·
·
·
·
· 31
<pin arrangement of CN1>
2
·
·
· 30
4
·
·
Note 1. CN2 is not connected each other at shipment. It should be connected, when LCD is operated.
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DISPLAY COLORS vs. INPUT DATA SIGNALS

NL6448AC33-18
Display colors
Black 000000 000000 000000
Blue 000000 000000 111111
Red 111111 000000 000000
Basic colors Magenta 111111 000000 111111
Green 000000 111111 000000
Cyan 000000 111111 111111
Yellow 111111 111111 000000
White 111111 111111 111111 Black 000000 000000 000000
dark 000010 000000 000000
Red grayscale | | |
Green grayscale | | |
Blue grayscale | | |
↑ ↓ |||
bright 111101 000000 000000
Red 111111 000000 000000
Black 000000 000000 000000
dark 000000 000010 000000
↑ ↓ |||
bright 000000 111101 000000
Green 000000 111111 000000
Black 000000 000000 000000
dark 000000 000000 000010
↑ ↓ |||
bright 000000 000000 111101
Blue 000000 000000 111111
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
000001 000000 000000
|||
111110 000000 000000
000000 000001 000000
|||
000000 111110 000000
000000 000000 000001
|||
000000 000000 111110
Data signal (0: Low level, 1: High level)
Note Colors are developed in combination with 6 bit signals (64 steps in grayscale) of each primary red, green,
and blue color. This process can result in up to 262144 (64 × 64 × 64) colors.
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Page 8

INPUT SIGNAL TIMING

(1) Input signal specifications
NL6448AC33-18
Parameter
CLK Frequency 1/tC 21.0 25.175 29.0 MHz 39.722 ns (Typ.)
Duty tch/tC 0.4 0.5 0.6 – Rise, fall tcrf 10 ns
Hsync Period th 30.0 31.778 33.6
Display period thd 640 CLK – Front-porch thf 16 CLK Fixed timing mode
Pulse width thp* 10 96 CLK Fixed timing mode
Back-porch thb* 4 48 CLK Fixed timing mode
CLK-Hsync timing thch 12 ns – Hsync-CLK timing thcs 8 ns – Hsync-Vsync timing tvh 1 CLK 1CLK = 39.722 ns (Typ.) Vsync-Hsync timing tvs 30 ns – Rise, fall thrf 10 ns
Vsync Period tv 16.1 16.683 17.2 ms 59.94 Hz (Typ.)
Display period tvd 480 H – Front-porch tvf 12 H Fixed timing mode
Pulse width tvp* 1 2 H Fixed timing mode
Back-porch tvb* 4 31 H Fixed timing mode
Rise, fall 10 ns
DATA R0 - R5 G0 - G5 B0 - B5
DE DE-CLK timing tes 8 ns DE mode
CLK-DATA timing tds 8 ns – DATA-CLK timing tdh 12 ns – Rise, fall tdrf 10 ns
CLK-DE timing teh 12 ns Rise, fall terf 10 ns
Symbol
thp + thb* 144 CLK Fixed timing mode
tvp + tvb* 33 H Fixed timing mode
Min. Typ. Max. Unit Remarks
µ
s 31.469 kHz (Typ.)
800 CLK
2 16 CLK DE mode
10 96 CLK DE mode
4 48 CLK DE mode
14 144 CLK DE mode
525 H
1 12 H DE mode
1 2 H DE mode
4 31 H DE mode
5 33 H DE mode
All of parameters should be kept in the specified range.
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Page 9
(2) Definition of input signal timing
<Vertical>
Vsync
NL6448AC33-18
tv
tvp
Display period
<Horizontal>
DE
Hsync
Note
thp
tvb
thb
tvf
tvd
th
thf
Display period
DE
Note
Note These do not exist as signals.
thd
9
Page 10
CLK
NL6448AC33-18
tC
tch
0.7 VCC
0.5 VCC
0.3 VCC
tcrf
DATA
(R0 - R5) 0.7 VCC
(G0 - G5) 0.5 VCC (B0 - B5) 0.3 V
0.7 VCC
DE
0.5 VCC
0.3 VCC
CLK
Hsync
0.5 VCC
0.7 VCC
0.5 VCC
0.3 VCC
tdhtds
INVALID
CC
tdrftdrf
terf
thcsthch
thrf
terf
INVALID
testehtesteh
10
Hsync
Vsync
0.5 VCC
tvhtvh
0.7 VCC
0.5 VCC
0.3 VCC tvrf
Page 11
(3) Input signal timing chart
(
)
a) Fixed timing mode
Vsync
NL6448AC33-18
Hsync
Hsync
R0 - R5
G0 - G5
B0 - B5
Hsync
1H (min.)
INVALID
1H (min.)
33H (fixed)
321
34
35 513 514 515
D (X, 0) D (X, Y) D (X, 478) D (X, 479)
33
34
1H
480H (fixed) 12H
513
514
INVALID (Note: X = 0 to 639)
R0 - R5
G0 - G5
B0 - B5
Hsync
10CLK (min.)
CLK
R0 - R5
G0 - G5
B0 - B5
INVALID
12 145144
INVALID
D (0, Y) D (1, Y) D (638, Y) D (639, Y)
4CLK (min.)
144CLK (fixed)
D (X, Y)
1CLK
D (0, Y) D (1, Y)
INVALID
640CLK (fixed) 16CLK
784 785 800 1
D (639, Y)
Note: Y = 0 to 479
INVALID
11
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b) DE mode
(
)
Vsync
NL6448AC33-18
1H
Hsync
DE
R0 - R5
G0 - G5
B0 - B5
DE
R0 - R5 G0 - G5
B0 - B5
INVALID
INVALID
321
D (X, 0)
tvb
D (X, Y) D (X, 479)
D (0, Y) D (1, Y) D (638, Y) D (639, Y)
480H (fixed)
D (X, Y)
tvp tvf
1
INVALID (Note: X = 0 to 639)
INVALID
12
Hsync
CLK
DE
R0 - R5
G0 - G5
B0 - B5
thp
12
INVALID
thb
1CLK
640CLK (fixed)
144 145 784 785 800
D (0, Y) D (1, Y)
D (639, Y)
thf
INVALID
Note: Y = 0 to 479
1
Page 13
(4) Display position of input data
Normal scan (factory set)
D (0, 0) D (1, 0) -- - D (X, 0) - - - D (638, 0) D (639, 0) D (0, 1) D (1, 1) -- - D (X, 1) - - - D (638, 1) D (639, 1)
---
D (0, Y) D (1, Y) -- - D (X, Y) - - - D (638, Y) D (639, Y)
---
D (0, 478) D (1, 478) - - - D (X, 478) - - - D (638, 478) D (639, 478) D (0, 479) D (1, 479) - - - D (X, 479) - - - D (638, 479) D (639, 479)
---
---
Reverse scan
D (639, 479) D (638, 479) - - - D (X, 479) - - - D (1, 479) D (0, 479) D (639, 478) D (638, 478) - - - D (X, 478) - - - D (1, 478) D (0, 478)
---
D (639, Y) D (638, Y) - - - D (X, Y) - - - D (1, Y) D (0, Y)
---
D (639, 1) D (638, 1) - - - D (X, 1) - - - D (1, 1) D (0, 1) D (639, 0) D (638, 0) - - - D (X, 0) - - - D (1, 0) D (0, 0)
---
---
--- ---
---
--- ---
---
--- ---
---
--- ---
---
---
---
---
---
---
---
---
---
NL6448AC33-18
---
---
---
---
---
---
---
---
Note 1. The scan direction is set up by switches on the rear side.
Normal scan
SW5 SW1 SW2 SW3 SW4
rotary switches
Reverse scan
SW5 SW1 SW2 SW3 SW4
rotary switchesdip switch dip switch
*SW5 is not related for setting up the scan direction.
Note 2. Below drawings shows relation between the scan direction and viewing direction.
C
D (0, 0) D (639, 0)
C N 1
D (0, 479) D (639, 479)
down side view up side view
N 2
C N 2
D (0, 0) D (639, 0)
D (0, 479) D (639, 479)
C N 1
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Page 14
NL6448AC33-18

GENERAL CAUTION

(1) Caution when taking out the module
1) Pick the pouch only, when taking out module from a shipping package.
(2) Cautions for handling the module
1) As the electrostatic discharges may break the LCD module, handle the LCD module with care. Peel a protection sheet off from the LCD panel surface as slowly as possible.
2) As the LCD panel and back-light element are made from fragile glass material, impulse and pressure to the LCD module should be avoided.
3) As the surface of polarizer is very soft and easily scratched, use a soft dry cloth without chemicals for cleaning.
4) Do not pull the interface connectors in or out while the LCD module is operating.
5) Put the module display side down on a flat horizontal plane.
6) Handle connectors and cables with care.
7) The torque to mounting screw should never exceed 0.294 N·m (3 Kgf·cm).
(3) Cautions for the operation
1) When the module is operating, do not lose CLK, Hsync or Vsync signals. If any one of these signals is lost, the LCD panel would be damaged.
2) Obey the supply voltage sequence. If wrong sequence is applied, the module would be damaged.
(4) Cautions for the atmosphere
1) Dew drop atmosphere should be avoided.
2) Do not store and/or operate the LCD module in a high temperature and/or humidity atmosphere. Storage in an electro-conductive polymer packing pouch and under relatively low temperature atmosphere is recommended.
3) This module uses cold cathode fluorescent lamps. Therfore, the life time of lamps becomes short conspicuously at low temperature.
(5) Cautions for the module characteristics
1) Do not apply fixed pattern data signal to the LCD module at product aging. Applying fixed pattern for a long time may cause image sticking.
(6) Other cautions
1) Do not disassemble and/or re-assemble LCD module. (except for backlight lamp)
2) Do not re-adjust variable resistor or switch etc. (except for scan select switches)
3) When returning the module for repair or etc., please pack the module not to be broken. We recommend to use the original shipping packages.
4) Turn off the power supply to avoid electrical shock while backlight lamp is replaced, and refer to the backlight replace manual.
Liquid Crystal Display has the following specific characteristics. These are not defects or malfunctions. The display condition of LCD module may be affected by the ambient temperature. The LCD module uses cold cathode tubes for backlighting. Optical characteristics, like luminance or uniformity, will change during time. Uneven brightness and/or small spots may be noticed depending on different display patterns.
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Page 15

OUTLINE DRAWING: Front View (Unit in mm)

(62.2)
φ
5 ±0.3
2- 2.5
2.5 ±0.2
10.5 TYP
(13) (82)
(5)
104PWBJ1
5 ±0.3
2.5 ±0.2
NL6448AC33-18
7.5 TYP
(4.8)
(12.9)
7.2 ±0.3
(9.3)
(3.9)(2.9)
(8.1)
14.6 ±0.3
(4.7)
2-R1.75
HIGH VOLTAGE
CAUTION
+0.7
100
–0.3
(161.8) (Bezel opening)
(158.4) (Display erea)
132.6 ±0.3
(3.15)
(1.8)
(4.7)
Display erea center
(15)
25 ±0.3
LZ-5P-SL-SMT (JAE)
(8.1)
(3.9)(2.9)
10.5 TYP
243 ±0.5
235 ±0.3
(211.2) (Display erea)
(215.4) (Bezel opening)
(4)
(5.7)
(2.8)
5 ±0.3
2.5 ±0.2
10.5TYP
(29.4)
(5.1)
17 ±0.3
2.9
(88.3)
Module center
166.6 ±0.3
185.1 ±0.5
(16.4) (21.6)
(3.7)
4-CPIMS×M2×L4
φ
2- 3.5
(5.1)
(5.7)
7.5 TYP
(4)(2.8)
5 ±0.3
2.5 ±0.2
7.5 TYP
15
Page 16

OUTLINE DRAWING: Rear View (Unit in mm)

NL6448AC33-18
(5.3) (5)
(5.6) (2.4)
∗∗∗−∗
S
Name 104DLM-17
Pal No
83.3 ±0.5 (16.4) (21.6)
2.3 ±0.5
4.0 ± 0.5
THE TEF COLOR LCD
PANEL CONTAINS COLD CATHODE
FLOURESCENT LAMPS. PLEASE
FOLLOW LOCAL ORDINANCES
OR REGULATIONS FOR ITS
DISPOSAL
(HIROSE)
DF9-31P-1V
(5.3)(5)
(6.6) (2.4)
MADE IN JAPAN
ES2228421
A100100100100
NL6448AC33-18
K2000A762402
(3.4) (4.0)
60 ±10
BHR-03VS-1 (JST)
1PIN: COLD.2.3PIN: HOT
HIGH VOLTAGE
CAUTION
(8)
(6.8)
(54.4)
(48.95)
(43.2)
(37.45)
(31.7)
(4.45)
(6.8)
104PWBJ1
(0.25)
(8)
SW4
SW3
(3.4) (3.4)
SW2
SW1
(4.5)
SW5
16
Page 17
[MEMO]
NL6448AC33-18
17
Page 18
NL6448AC33-18
No part of this document may be copied in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or of others. The information in this document is subject to change without notice. Contact your nearest NEC representative for the latest specifications before designing this device into your system.
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