The information in this User’s Manual has been carefully reviewed and is believed to be
accurate. The vendor assumes no responsibility for any inaccuracies that may be contained
in this document, makes no commitment to update or to keep current the information in this
manual, or to notify any person or organization of the updates. Please Note: For the most
up-to-date version of this manual, please see our web site at www.supermicro.com.
SUPER MICRO COMPUTER reserves the right to make changes to the product described in
this manual at any time and without notice. This product, including software, if any, and
documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.
IN NO EVENT WILL SUPER MICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM
THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO
COMPUTER SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA
STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE,
OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa
Clara shall be the exclusive venue for the resolution of any such disputes. Super Micro’s total
liability for all claims will not exceed the price paid for the hardware product.
This equipment has been tested and found to comply with the limits for a Class B digital
device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates,
uses, and can radiate radio frequency energy and, if not installed and used in accordance with
the manufacturer’s instruction manual, may cause interference with radio communications.
However, there is no guarantee that interference will not occur in a particular installation. If this
equipment does cause harmful interference to radio or television reception, which can be
determined by turning the equipment off and on, you are encouraged to try to correct the
interference by one or more of the following measures: · Reorient or relocate the receiving
antenna. · Increase the separation between the equipment and the receiver. · Connect the
equipment into an outlet on a circuit different from that to which the receiver is connected.
· Consult the dealer or an experienced radio/television technician for help.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to the
State of California to cause birth defects and other reproduc-
tive harm.
Revision Number: Rev. 1.1
Release Date: June 12, 2007
Unless you request and receive written permission from SUPER MICRO COMPUTER, you
may not copy any part of this document.
Information in this document is subject to change without notice. Other products and
companies referred to herein are trademarks or registered trademarks of their respective
companies or mark holders.
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use
of the X6DAL-B2/X6DAL-TB2 motherboard. The X6DALB2/X6DAL-TB2 supports single or dual Intel® Xeon NoconaTM processors at
a 800 MHz front side bus. Based upon Intel's NetBurst microarchitecture,
the Xeon EM64T (Nocona) processor supports IA-32 and IA-64 software
and includes features found in the XeonTM processor such as Hyper
Pipelined Technology, which includes a multi-stage pipeline, allowing the
processor to operate at much higher core frequencies. Packaged in a 604pin Flip Chip Micro Pin Grid Array(FC-mPGA4) platform in a Zero Insertion
Force(ZIF) socket (mPGA 604), the Xeon EM64T Processor (800 MHz) supports Hyper-Threading Technology and is ideal for high performance workstation and server environments with up to two processors on one system
bus. Please refer to the motherboard specifications pages on our web site
(http://www.supermicro.com/products/motherboard/)for updates on supported processors. This product is intended to be professionally installed.
Manual Organization
Chapter 1 begins with a checklist of what should be included in your
mainboard box, describes the features, specifications and performance of
the motherboard and provides detailed information about the chipset.
Preface
Chapter 2 begins with instructions on handling static-sensitive devices.
Read this chapter when you want to install the processor and DIMM memory
modules and when mounting the mainboard in the chassis. Also refer to
this chapter to connect the floppy and hard disk drives, SCSI drives, the IDE
interfaces, the parallel and serial ports, the keyboard and mouse, the power
supply and various control panel buttons and indicators.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for the video, the memory and the setup configuration
stored in CMOS. For quick reference, a general FAQ [Frequently Asked
Questions] section is provided.
Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility.
Appendix A lists BIOS Error Beep Codes and DS LED POST Codes.
Appendix B provides BIOS POST codes.
Appendix C provides software installation instructions.
Appendix D provides installation instructions on the Adaptec SATA
HostRAID Driver based on Marvell's chip.
iii
X6DAL-B2/X6DAL-TB2 User's Manual
Table of Contents
Preface
About This Manual ...................................................................................................... iii
Manual Organization ................................................................................................... ii i
Appendix A: BIOS Error Beep Codes and DS7/DS8 LED POST Codes ......... A-1
Appendix B: BIOS POST Codes .............................................................................B-1
Appendix C: Installing Software Drivers and the Operating System ..............C-1
Appendix D: The Adaptec SATA HostRAID Configuration ................................ D-1
vi
1-1Overview
Chapter 1: Introduction
Chapter 1
Introduction
Checklist
Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with
the utmost attention to detail to provide you with the highest standards in
quality and performance. Check that the following items have all been included with your motherboard. If anything listed here is damaged or missing, contact your retailer. All included with Retail Box.
One (1) Supermicro Mainboard
One (1) ribbon cable for IDE devices (CBL-036)
One (1) floppy ribbon cable (CBL-022)
One (1) SATA cable (CBL-044) (*X6DAL-B2)
Four (4) SATA cables (CBL-044) (*X6DAL-TB2)
One (1) CPU mounting plate (SKT-159)
Two (2) CPU retention brackets (SKT-158: pre-installed)
One (1) I/O backpanel shield (CSE-PT2)
One (1) Supermicro CD containing drivers and utilities (CDR_INTC)
Introduction
One (1) User's/BIOS Manual
1-1
X6DAL-B2/X6DAL-TB2 User's Manual
Contacting Supermicro
Introduction
Headquarters
Address:SuperMicro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel:+1 (408) 503-8000
Fax:+1 (408) 503-8008
Email:marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Web Site:www.supermicro.com
Chung-Ho 235, TaipeiHsien, Taiwan, R.O.C.
Tel:+886-(2) 8226-3990
Fax:+886-(2) 8226-3991
Web Site:www.supermicro.com.tw
Technical Support:
Email:support@supermicro.com.tw
Tel:886-2-8228-1366, ext.132 or 139
1-2
Chapter 1: Introduction
Figure 1-1. X6DAL-B2/X6DAL-TB2 Image
Introduction
(*The difference between the X6DAL-B2 and the X6DALTB2 is that the X6DAL-TB2 model has an additional
Marvell's 4-port SATA Controller.)
1-3
X6DAL-B2/X6DAL-TB2 User's Manual
Introduction
Figure 1-2. SUPER X6DAL-B2/X6DAL-TB2 Motherboard Layout
J2
J3
COM1
J4
COM2
J5
LAN1
LAN2
LAN
CTRL
Fan5
BIOS
Notes:
Mouse
KB/
DS1
USB
0/1
LAN
CTRL
PW3
PCI-E #6 (x16)
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Spkr
Printer
AlMRset
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
J13
J15
Enable
Battery
PW LED/KL
JWOL
(not drawn to scale)
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
PW1
Marvell SATA
Enable
Chassis
Intrusion
Marvell
ATX PWR
J7
J27
SMB PW
SMB data toPCIEn.
SMBCLKtoPCI En.
JF2
Spkr
SATA
CTRL
JL1
JWD
C
2
SATA I
(*X6DAL-TB2)
Watch Dog
JPS1
Clear
CMOS
FAN1
J35
JSLED
LED
SATA
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
CPU1
CPU2
H-SATA0/1
SAT A3
SAT A2
USB2/3
J42
DS8
JS1
JS0
DS2
DS5
DS7
Fan4
Fan2
Fan3
DS9
IDE #2
JF1
FP Ctlr
IDE #1
1. " " indicates Pin 1.
2. The differences between the X6DAL-B2 and the X6DAL-TB2
are:
* Marvell's SATA controller is available on the X6DAL-TB2 only.
* There are additional four SATA ports (using Marvell's SATA
controller) on the X6DAL-TB2.
3. All images, layouts and contents included in this manual were based
upon the latest PCB revision available at the time of publishing. The
motherboard you've received may or may not look exactly the same as
the ones shown in this manual.
1-4
Chapter 1: Introduction
Quick Reference ( X6DAL-B2/X6DAL-TB2)
JumperDescriptionDefault Setting
CN1Alarm ResetOpen (Disabled)
J13SMB Data to PCI EnableClosed (Enabled)
J15SMB Clock to PCI EnableClosed (Enabled)
JBT1Clear CMOSSee Chapter 2
JPL1/JPL2LAN1/LAN2 EnablePins 1-2 (Enabled)
JPS14-Port SATA Enable (*X6DAL-TB2) Pins 1-2 (Enabled)
JWDWatch Dog EnablePins 1-2 (Reset)
ConnectorDescription
ATX PWRPrimary 24-pin ATX PWR Connector
PWR2/PWR 312V 8-pin CPU PWR/12V 4-pin PWR Connectors
COM1(J4)/COM2 (J5)COM1/COM2 Serial Port Connectors
DS1,2,3,5,9Onboard System Indicators (*See Chapter 2)
DS7, DS8POST Code LED (*See Appendix A)
FAN #1-#6CPU/Chassis Fans Headers
DIMM#1A-#3BMemory (DIMM) Slots#(1A,1B, 2A,2B, 3A,3B)
GLAN 1/2G-bit Ethernet Ports
IDE1, IDE2IDE1/2 Hard Disk Drive Connectors
J2Keyboard/Mouse
J7Power Fault Header
J24Floppy Disk Drive Connector
J27Power System Management
J35SATA SMB (I2C) Header (*X6DAL-TB2 Only)
JF1Front Panel Control (*See Chapter 2)
JF2Speaker, PWR LED, Keylock (*See Chapter 2)
JL1Chassis Intrusion Header
JSLEDSATA LED Header
JWOL(WOL)Wake-on-LAN
ParallelParallel (Printer) Port
PCI-#4/PCI-#5PCI 32-bit slots
PCI-X-#2/PCI-X-#3PCI-X 64-bit 66MHz slots
PCI-E#6PCI-Express x16 @4GB/s slot
I-SATA 0/1(JS0/JS1)Intel's Hance Rapids-Serial ATA Ports 0/1
M-SATA0-3 (SATA0-3) 4-Port Serial ATA Connections 0/1/2/3 (X6DAL-
TB2 Only)
WOR(JWOR)Wake-on-Ring Header
USB 0/1Back Panel USB (Universal Serial Bus) Ports
USB 2/3 (J42)Front Panel USB (Universal Serial Bus) Ports
Introduction
1-5
X6DAL-B2/X6DAL-TB2 User's Manual
Motherboard Features
CPU
Introduction
• Single or dual Intel® 604-pin Xeon E-64MT (NoconaTM) processors at
800 MHz front side (system) bus speed.
Notes: 1. Interleaved memory; requires memory modules to be installed in pairs. See Section 23 for details.
Chipset
• Intel E7525 (Tumwater) chipset
Expansion Slots
• One PCI-E (x16@4GB/sec)
• Two 64-bit 66MHz PCI-X
• Two 32-bit 33MHz PCI slots
BIOS
• 8 Mb AMI® Flash ROM
• APM 1.2, DMI 2.3, PCI 2.2, ACPI 1.0, Plug and Play (PnP), SMBIOS 2.3
PC Health Monitoring
• Onboard voltage monitors for CPU cores, chipset voltage, 3.3V, +5V,
+12V, +5V standby, +3.3V standby, -12V and DIMM voltage.
• Fan status monitor with fan speed control via BIOS
• CPU/chassis temperature monitors
• Environmental temperature monitor and control via Supero Doctor III
• CPU fan auto-off in sleep mode
• CPU slow-down on temperature overheat
• CPU thermal trip support for processor protection, +5V standby alert
LED
• Power-up mode control for recovery from AC power loss
• Auto-switching voltage regulator for CPU core
• System overheat LED and control
• Chassis intrusion detection
• System resource alert via Super Doctor III
1-6
Chapter 1: Introduction
ACPI Features
• Microsoft OnNow
• Slow blinking LED for suspend state indicator
• Main switch override mechanism
Onboard I/O
• Two Broadcom BCM5721 Gigabit Ethernet controllers
• 2 EIDE Ultra DMA/100 bus master interfaces
• 1 floppy port interface (up to 2.88 MB)
• 1 EPP/ECP Parallel Port Header
• PS/2 mouse and PS/2 keyboard ports
• Up to four USB 2.0 (Universal Serial Bus) (2 ports-back panel, 2
Headers-front panel)
• 2 Hance Rapids Serial ATA Ports
• 4-Port (Mavell) Serial ATA Connections (*X6DL-TB2 only)
• Super I/O
• 2 serial ports
Other
• Internal/external modem ring-on
• Wake-on-Ring (WOR)
• Wake-on-LAN (WOL)
• Console redirection
Introduction
CD/Diskette Utilities
• BIOS flash upgrade utility and device drivers
Dimensions
• ATX 12" x 10" (304.8 x 254 mm)
1-7
X6DAL-B2/X6DAL-TB2 User's Manual
6
Introduction
LAN
RJ45
LAN
RJ45
2
H
E7525
DDR
2 400MHz
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2 400MHz
BCM5721BCM5721
Serial Port
2
PCI-X 66MHz Slot
LPC
Front
Front
Rear
Rear
USB
USB
USB
USB
USB0
PCI-X 66MHz Slot 3
ESB6300
USB1
USB2
USB3
/
PCI 32/33 5V Slot 4
PCI 32/33 5V Slot 5
SATA
Secondary ATA-100
Primary ATA-100
SATA
Figure 1-9. Block Diagram of the E7525 Tumwater Chipset
Note: This is a general block diagram. Please see the previous Motherboard
Features pages for details on the features of each motherboard.
1-8
Chapter 1: Introduction
1-2Chipset Overview
Built upon the functionality and the capability of the E7525 Tumwater
chipset, the X6DAL-B2/X6DAL-TB2 motherboard provides the performance
and feature set required for dual processor-based servers, with configuration options optimized for communications, presentation, storage, computation or database applications. The Intel E7525 Tumwater chipset consists
of the following components: the E7525 Tumwater Memory Controller Hub
(MCH), and the 6300ESB (Hance Rapids) I/O Controller Hub (Hance Rapids
ICH).
The E7525 Tumwater MCH supports single or dual Xeon EM64T (Nocona)
processors with Front Side Bus speeds of 800 MHz. Its memory controller
provides direct connection to two channels of registered DDRII 400 with a
marched system bus address and data bandwidths of up to 2.67 GB/s per
channel. The E7525 Tumwater also supports the new PCI Express high
speed serial I/O interface for superior I/O bandwidth. These interfaces
support connection of the MCH to a variety of other bridges that are compliant with the PCI Express Interface Specification. The MCH interfaces
with the 6300ESB (Hance Rapids) ICH I/O Controller Hub via HI 1.5 Hub
Interface. The 6300ESB provides two PCI bus interfaces that can be configured for standard PCI 2.2 protocol, as well as the enhanced high-frequency PCI-X protocol.
Introduction
6300ESB (Hance Rapids) ICH System Features
In addition to providing the I/O subsystem with access to the rest of the
system, the Hance Rapids ICH I/O Controller Hub integrates many I/O
functions.
The Hance Rapids ICH I/O Controller Hub integrates: 2-channel Ultra ATA/
100 Bus Master IDE Controller, two Serial ATA (SATA) Host Controllers,
SMBus 2.0 Controller, LPC/Flash BIOS Interface, PCI-X (66MHz)/PCI-Express
(x16 at 4GB/s) Interface, PCI 2.2 Interface and System Management Controller.
1-9
X6DAL-B2/X6DAL-TB2 User's Manual
1-3Special Features
Recovery from AC Power Loss
Introduction
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a poweron state. See the Power Lost Control setting in the Advanced BIOS Setup
section to change this setting. The default setting is Last State.
1-4PC Health Monitoring
This section describes the PC health monitoring features of the X6DAL-B2/
X6DAL-TB2. All have an onboard System Hardware Monitor chip that supports PC health monitoring.
Onboard Voltage Monitors for the CPU Cores, Chipset
Voltage, +3.3V, +5V, +12V, -12v, +3.3V Standby, +1.8V (for
DRAM), +1.5V Standby, +1.2V
An onboard voltage monitor will scan these voltages continuously. Once a
voltage becomes unstable, a warning is given or an error message is sent
to the screen (only when SuperDoctorIII is installed and configured). Users
can adjust the voltage thresholds in SuperDoctorIII.
Environmental Temperature Control via Supero DoctorIII
The thermal control sensor monitors the CPU temperature in real time and
will increase the speed of the thermal control fan whenever the CPU temperature exceeds a user-defined threshold. The overheat circuitry runs
independently from the CPU. It can continue to monitor for overheat conditions even when the CPU is in sleep mode. Once it detects that the CPU
temperature is too high, it will automatically increase the speed of the thermal control fan to prevent any overheat damage to the CPU. The onboard
chassis thermal circuitry can monitor the overall system temperature and
alert users when the chassis temperature is too high.
1-10
Chapter 1: Introduction
TM2/CPU VRM Overheat
When the CPU reaches 700 C and above (Overheating), the CPU will slow
down and CPU Voltage will decrease to reduce CPU power consumption
and CPU VRM heat dissipation.
CPU Overheat LED and Control
This feature is available when the user enables the CPU overheat warning
function in the BIOS. This allows the user to define an overheat temperature. When the temperature goes beyond the predefined threshold, the
warning LED is triggered and the fans will speed up.
Auto-Switching Voltage Regulator for the CPU Core
The auto-switching voltage regulator for the CPU core can support up to
120W current and auto-sense voltage IDs ranging from .8375V to 1.6V.
This will allow the regulator to run cooler, and thus make the system more
stable.
1-5 ACPI Features
ACPI stands for Advanced Configuration and Power Interface. The ACPI
specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout
a PC system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals
such as CD-ROMs, network cards, hard disk drives and printers. This also
includes consumer devices connected to the PC such as VCRs, TVs, telephones and stereos.
Introduction
In addition to enabling the operating system-directed power management,
ACPI provides a generic system event mechanism for Plug and Play and an
operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures, while providing a processor architecture-independent implementation that is compatible with the Windows 2000, Windows XP and Windows 2003 operating systems.
1-11
X6DAL-B2/X6DAL-TB2 User's Manual
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start
Introduction
blinking to indicate that the CPU is in suspend mode. When the user presses
any key, the CPU will wake-up and the LED will automatically stop blinking
and remain on.
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a
system suspend button to make the system enter a SoftOff state. The
monitor will be suspended and the hard drive will spin down. Pressing the
power button again will cause the whole system to wake-up. During the
SoftOff state, the ATX power supply provides power to keep the required
circuitry in the system alive. In case the system malfunctions and you want
to turn off the power, just press and hold the power button for 4 seconds.
This option can be set in the Power section of the BIOS Setup routine.
External Modem Ring-On (WOR)
Wake-up events can be triggered by a device such as the external modem
ringing when the system is in the SoftOff state. Note that external modem
ring-on can only be used with an ATX 2.02 (or above) compliant power
supply.
1-6Power Supply
As with all computer products, a stable power source is necessary for
proper and reliable operation. It is even more important for processors that
have high CPU clock rates.
The X6DAL-B2/X6DAL-TB2 accommodates ATX power supplies. Although
most power supplies generally meet the specifications required by the CPU,
some are inadequate. You should use one that will supply at least 420 W of
power. In addition, a +12V, 8-pin CPU power supply and a +12V, 4-pin Aux.
power supply are also required for high-load configurations. Also your
power supply must supply 1.5A for the Ethernet ports.
NOTE: In addition to the 24-pin main power, a 12V 8-pin power connector (PW2) is required to support Intel Xeon CPUs, and a 12V 4pin power connector (Aux. PWR) is also required for system power
1-12
Chapter 1: Introduction
consumption. Failure to provide this extra power will result in instability of the CPU after only a few minutes of operation. See
Section 2-5 for details on connecting the power supply.
It is strongly recommended that you use a high quality power supply that
meets ATX power supply Specification 2.02 or above. It must also be SSI
compliant (Refer to the website at http://www.ssiforum.org/ for more details). Additionally, in areas where noisy power transmission is present,
you may choose to install a line filter to shield the computer from noise. It is
recommended that you also install a power surge protector to help avoid
problems caused by power surges.
1-7Super I/O
The disk drive adapter functions of the Super I/O chip include a floppy disk
drive controller that is compatible with industry standard 82077/765, a data
separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA
logic. The wide range of functions integrated onto the Super I/O greatly
reduces the number of components required for interfacing with floppy disk
drives. The Super I/O supports 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk
drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s. It also
provides two high-speed, 16550 compatible serial communication ports
(UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system.
Introduction
Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as
well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s,
which support higher speed modems.
The Super I/O supports one PC-compatible printer port (SPP), Bi-directional
Printer Port (BPP), Enhanced Parallel Port (EPP) or Extended Capabilities Port
(ECP).
The Super I/O provides functions that comply with ACPI (Advanced Configuration and Power Interface), which includes support of legacy and ACPI
power management through an SMI or SCI function pin. It also features auto
power management to reduce power consumption.
1-13
X6DAL-B2/X6DAL-TB2 User's Manual
Introduction
Notes
1-14
Chapter 2: Installation
Chapter 2
Installation
2-1Static-Sensitive Devices
Electric-Static-Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully.
The following measures are generally sufficient to protect your equipment
from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic bag.
• Handle the board by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when
not in use.
• For grounding purposes, make sure your computer chassis provides excellent conductivity between the power supply, the case, the mounting
fasteners and the motherboard.
• Use only the correct type of onboard CMOS battery as specified by the
manufacturer. Do not install the onboard battery upside down to avoid
possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage.
When unpacking the board, make sure the person handling it is static protected.
2-1
X6DAL-B2/X6DAL-TB2 User's Manual
2-2Xeon EM64T Processor and Heatsink Installation
When handling the processor package, avoid placing direct
pressure on the label area of the fan. Also, do not place the
!
motherboard on a conductive surface, which can damage the
BIOS battery and prevent the system from booting up.
IMPORTANT: Always connect the power cord last and always remove it
before adding, removing or changing any hardware components. Make
sure that you install the processor into the CPU socket before you install
the CPU heatsink. Note that for the X6DAL-B2/X6DAL-TB2 you need to
install the Xeon mounting plate under the board.
Installing the CPU Mounting Plate
(*Note: CPU Retention Brackets are
pre-installed.)
1. Place the CPU retention bracket
on top of the CPU mounting plate.
2. Install the CPU mounting plate
below the retention bracket on the
reverse side of the motherboard.
3. Properly place the CPU on top of
the CPU socket. Align Pin 1 on the
CPU with Pin 1 on the CPU socket.
CPU Socket
Motherboard
Mounting Plate
CPU Installation
Mounting Holes
w/Standoffs
Xeon CPU
CPU Socket
CPU Retention
Bracket
CPU Mounting
Plate
Heatsink
Mounting
Holes
Heatsink
CPU
1. Lift the lever on the CPU socket:
lift the lever completely as shown
on the picture on the right;
otherwise, you will damage the
CPU socket when power is
applied. (Install CPU1 first.)
Socket lever
2-2
2. Insert the CPU in the socket,
making sure that pin 1 of the CPU
aligns with pin 1 of the socket
(both corners are marked with a
triangle). When using only one
CPU, install it into CPU socket #1
(Socket #2 is automatically disabled
if only one CPU is used).
3. Press the lever down until
you hear the *click* so you
can be sure that the CPU is
securely installed in the CPU
socket.
Heatsink Installation
1. Do not apply any thermal grease to
the heatsink or the CPU die; the required
amount of thermal grease has already
been applied.
2. Place the heatsink on top of the
CPU so that the four mounting holes
are aligned with those on the retention
mechanism.
3. Screw in two diagonal screws (ie
the #1 and the #2 screws) until just
snug (-do not fully tighten the screws
to avoid possible damage to the CPU.)
Chapter 2: Installation
Pin1
Socket lever in the
locking Position
CEK Heatsink
Screw#1
Screw#1
Screw#2
4. Finish the installation by fully
tightening all four screws.
To Un-install the Heatsink
(Caution! We do not recommend that the
CPU or the heatsink be removed. However,
if you do need to un-install the heatsink,
please follow the instructions below to
uninstall the heatsink to prevent damage
done to the CPU or the CPU socket. )
2-3
Screw#2
X6DAL-B2/X6DAL-TB2 User's Manual
1. Unscrew and remove the heatsink
screws from the motherboard in the
sequence as showin the second
picture on the right.
2. Hold the heatsink as showin the
picture on the right and gently wriggle
the heatsink to loosen it from the CPU.
(Do not use excessive force when
wriggling the heatsink!!)
3. Once the CPU is loosened from the
heatsink, remove the heatsink from the
CPU socket.
4. Clean the surface of the CPU and
the heatsink to get rid of the old
thermal grease. Reapply the proper
amount of thermal grease on the
surface before you re-install the CPU
and the heatsink.
Figure 2-1. PGA604 Socket: Empty and with Processor Installed
Empty socket
!
Lever
Warning! Make
sure you lift the
lever completely
when installing the
CPU. If the lever is
only partly raised,
damage to the
socket or CPU may
result.
2-4
Triangle
Processor
(installed)
Triangle
Chapter 2: Installation
Mounting the Motherboard in the Chassis
All motherboards have standard mounting holes to fit different types of
chassis. Make sure that the locations of all the mounting holes for both the
motherboard and the chassis match. Although a chassis may have both
plastic and metal mounting fasteners, metal ones are highly recommended
because they ground the motherboard to the chassis. Make sure the metal
standoffs click in or are screwed in tightly. Then use a screwdriver to
secure the motherboard onto the motherboard tray.
2-3Installing DIMMs
Note: Check the Supermicro web site for recommended memory modules.
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage. Also note that the
memory is interleaved to improve performance (see step 1).
DIMM Installation (See Figure 2-2)
1. Insert the desired number of DIMMs into the memory slots, starting with
DIMM #1A. The memory scheme is interleaved so you must install two
modules at a time, beginning with DIMM #1A, then DIMM #1B, and so on.
2. Insert each DIMM module vertically into its slot. Pay attention to the
notch along the bottom of the module to prevent inserting the DIMM
module incorrectly.
3. Gently press down on the DIMM module until it snaps into place in the
slot. Repeat for all modules (see step 1 above).
Memory Support
The X6DAL-B2/X6DAL-TB2 supports up to 12GB of Reg. ECC DDRII 400
memory.
2-5
X6DAL-B2/X6DAL-TB2 User's Manual
Figure 2-2. Installing and Removing DIMMs
II
To Install:
Insert module
vertically and
press down until
it snaps into
place. Pay
attention to the
alignment notch
at the bottom.
To Remove:
Use your
thumbs to
gently push near
the edge of both
ends of the
module. This
should release it
from the slot.
Notch
Release
Tab
DIMM
Note: Notch
should align
with the
receptive point
on the slot
Notch
Release
Tab
II
2-4I/OPorts/Control Panel Connectors
The I/O ports are color coded in conformance with the PC 99 specification.
See Figure 2-3 below for the colors and locations of the various I/O ports.
2
Figure 2-3. I/O Port Locations and Definitions
2-6
Chapter 2: Installation
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro server chassis. See
Figure 2-4 for the descriptions of the various control panel buttons and LED
indicators. Refer to the following section for descriptions and pin definitions.
Figure 2-4. JF1 Header Pins
1920
Ground
NMI
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
Power Fail LED
Ground
Ground
X
2
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2-7
X6DAL-B2/X6DAL-TB2 User's Manual
2-5Connecting Cables
ATX Power Connector
There are a 24-pin main power
supply connector(PW1) and a 4pin 12V PWR connector (PW3) on
the board. (Both connections are
required.) These power connectors meet the SSI EPS 12V specification. See the table on the right
for pin definitions. For CPU PWR
(PW2), please refer to the item
listed below.
Processor Power
Connector
In addition to the power connectors indicated above, the 12v 8-pin
Processor connector at PW2 must
also be connected to your power
supply. See the table on the right
for pin definitions.
The non-maskable interrupt button
header is located on pins 19 and
20 of JF1. Refer to the table on
the right for pin definitions.
Chapter 2: Installation
NMI Button Pin
Definitions (JF1)
Pin
Number
Definition
19
20
Control
Ground
Power LED
The Power LED connection is located on pins 15 and 16 of JF1.
Refer to the table on the right for
pin definitions.
PW1
COM2
COM1
J5
LAN1
LAN2
J2
J3
J4
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
JPL1
JPL2
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
WOR
SI/O
Printer
ATX PWR
AlMRset
DS1
PW
J7
Fault
J27
SMB PW
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PCI-E #6 (x16)
LAN
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Enable
PCI-#5 (33MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
JWOL
JF2
Spkr
DS3
CN1
Tumwater
(North Bridge)
Floppy
8-pin
PW2
E7525
Marvell SATA
Enable
Chassis
Intrusion
Marvell
SATA
CTRL
FAN1
CPU1
CPU2
Fan2
JSLED
SATA
ESB6300
Hance
Rapids
SATA0
Fan3
DS2
DS5
LED
USB2/3
DS9
J42
DS7
DS8
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SATA3
SATA1
SATA2
C
2
J35
SATA I
(*X6DAL-TB2)
Watch Dog
JWD
JPS1
Clear
JBT1
M-SATA0-3
CMOS
JL1
IDE #1
PWR_LED Pin Definitions
(JF1)
Pin
Number
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
Power Fail LED
JF1
FP Ctlr
Ground
Ground
Definition
15
16
Control
1920
Vcc
NMIPWR LED
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2
2-9
X6DAL-B2/X6DAL-TB2 User's Manual
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach
the hard drive LED cable here to
display disk activity (for any hard
drives on the system, including
SCSI, Serial ATA and IDE). See
the table on the right for pin definitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Controller) LED connections for the
GLAN port1/GLAN port2 are located on pins 11, 12 (GLAN1) and
9,10 (GLAN2) of JF1. Attach the
NIC LED cable to display network
activity. Refer to the tables on the
right for pin definitions.
HDD LED Pin
Definitions
Pin
Number
13
14
NIC1 LED Pin
Definitions
(JF1)
Pin
Number
11
12
NIC2 LED Pin
Definitions
(JF1)
Pin
Number
9
10
(JF1)
Definition
HD Active
Definition
Vcc
GND
Definition
Vcc
GND
Vcc
COM2
COM1
J5
LAN1
LAN2
J2
J3
J4
Fan5
BIOS
LAN
CTRL
Mouse
KB/
USB
0/1
LAN
CTRL
Fan6
WOR
SI/O
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
J13
JPL1
J15
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
Printer
JWOL
ATX PWR
DS3
8-pin
CN1
PW2
J7
J27
SMB PW
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
PW1
Marvell SATA
Enable
Marvell
SATA
CTRL
JL1
Chassis
Intrusion
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN1
J35
(*X6DAL-TB2)
JSLED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA0
HDD LED
NIC1 LED
NIC2 LED
CPU1
Ground
X
Power LED
CPU2
HDD LED
NIC1 LED
NIC2 LED
Fan2
Fan3
DS2
DS5
JF1
LED
SATA1
SATA2
FP Ctlr
USB2/3
DS9
J42
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SATA3
OH/Fan Fail LED
Power Fail LED
Ground
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2
2-10
Chapter 2: Installation
Overheat/Fan Fail LED
Connect an LED to the OH/Fan Fail
connection on pins 7 and 8 of JF1
to provide advanced warning of
chassis overheating. Refer to the
table on the right for pin definitions
and signal messages.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1.
Refer to the table on the right for
pin definitions.
Overheat/Fan Fail
LED Pin Definitions
(JF1)
Pin
Number
Definition
7
Vcc
8
GND
Overheat/Fan Fail
LED
State
Message
Solid
Overheat
Blink
Fan Fail
Power Fail LED Pin
Definitions
(JF1)
Pin
Number
Definition
5
Vcc
6
GND
COM2
COM1
LAN2
J5
LAN1
J2
J3
J4
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Printer
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PCI-E #6 (x16)
LAN
J13
J15
Enable
Battery
Spkr
PW LED/KL
JWOL
ATX PWR
DS3
8-pin
CN1
PW2
J7
J27
SMB PW
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
PW1
Marvell SATA
Enable
Marvell
SATA
CTRL
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
JPS1
Clear
CMOS
J35
JSLED
Watch Dog
ESB6300
JBT1
M-SATA0-3
Hance
Rapids
SATA0
FAN1
CPU1
OH/Fan Fail LED
PWR Fail LED
Ground
X
Power LED
HDD LED
CPU2
NIC1 LED
NIC2 LED
Fan2
Fan3
DS2
DS5
JF1
LED
SATA
SATA1
SATA2
FP Ctlr
USB2/3
DS9
J42
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SATA3
OH/Fan Fail LED
Power Fail LED
Ground
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2
2-11
X6DAL-B2/X6DAL-TB2 User's Manual
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to the hardware reset
switch on the computer case.
Refer to the table on the right for
pin definitions.
Power Button
The Power Button connection is
located on pins 1 and 2 of JF1.
Momentarily contacting both pins
will power on/off the system. To
turn off the power when set to
suspend mode, press the button
for at least 4 seconds. Refer to
the table on the right for pin definitions.
Reset Pin
Definitions
(JF1)
Pin
Number
3
4
Power Button
Connector
Pin Defini tions
Pin
Number
1
2
Definition
Reset
Ground
(JF1)
Definition
PW_ON
Ground
COM2
COM1
J5
LAN1
LAN2
J2
J3
J4
Fan5
BIOS
LAN
CTRL
Mouse
KB/
USB
0/1
LAN
CTRL
Fan6
WOR
SI/O
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
J13
JPL1
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
Printer
JWOL
ATX PWR
DS3
CN1
J7
J27
SMB PW
(North Bridge)
SMB data toPCIEn.
J15
SMBCLKtoPCI En.
JF2
Spkr
8-pin
PW2
E7525
Tumwater
Floppy
PW1
Marvell SATA
Enable
Marvell
SATA
CTRL
JL1
Chassis
Intrusion
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN1
J35
(*X6DAL-TB2)
JSLED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA0
Reset
PWR
CPU1
X
Power LED
HDD LED
Ground
CPU2
NIC1 LED
NIC2 LED
FP Ctlr
OH/Fan Fail LED
Power Fail LED
Ground
Ground
Fan2
Fan3
DS2
DS5
JF1
LED
USB2/3
DS9
J42
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SATA3
SATA1
SATA2
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2
2-12
Chapter 2: Installation
t
Chassis Intrusion
A Chassis Intrusion header is located at JL1. Attach the appropriate cable to inform you of a chassis intrusion.
Universal Serial Bus (USB)
There are two Universal Serial
Bus ports(USB 0/1) located on the
I/O panel and additional two USB
ports(USB 2/3) next to the IDE2 on
the motherboard. These two FP
USB ports can be used to provide
front side chassis access (cables
not included). See the tables on
the right for pin definitions.
USB 0/1
J2
J3
COM1
J4
COM2
J5
LAN1
LAN2
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Printer
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PCI-E #6 (x16)
LAN
Enable
Spkr
PW LED/KL
JWOL
ATX PWR
DS3
CN1
J7
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
JF2
Spkr
PW1
8-pin
PW2
E7525
Tumwater
(North Bridge)
Marvell SATA
Enable
Floppy
Marvell
SATA
CTRL
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
JPS1
Clear
CMOS
J35
JSLED
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA 0
Chassis Intrusion
Pin Definitions
Pin
1
2
Definition
Intrusion Inpu
Ground
Number
USB Pin Definition
USB O/1 (Back Panel USB)
Pin# Definition
1 +5V
2 P0-
3 P0+
4 Ground
USB 2/3 (Front Panel USB)
Pin
Definition
Number
FAN1
CPU1
CPU2
Fan2
Fan3
DS2
DS5
LED
SATA
SATA 2
SATA 1
JF1
FP Ctlr
USB2/3
DS9
J42
USB 2/3
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
Chassis Intrusion
JS1
Fan4
JS0
SATA 3
+5V
1
PO-
3
PO+
5
Ground
7
Pin
Number
2
4
6
8
10
Definition
+5V
PO-
PO+
Ground
Ground
2-13
X6DAL-B2/X6DAL-TB2 User's Manual
ATX PS/2 Keyboard and
PS/2 Mouse Ports
The ATX PS/2 keyboard and the
PS/2 mouse are located at J2. See
the table on the right for pin definitions. (The mouse port is above
the keyboard port. See the table
on the right for pin definitions.)
Fan Headers
There are six fan headers (Fan 1
to Fan 6) on the X6DAL-B2/TB2.
See the table on the right for pin
definitions. (*Note: These fan
headers are 4-pin fans. Pins#1-#3
of the fan headers are backward
compatible with the traditional 3pin fans.)(*The onboard fan speed
is controlled by Thermal Management via Hardware Monitoring in
the Advanced BIOS Setting. Note:
Default: Disabled, When using
Thermal Management setting,
please use all 3-pin fans or all 4pin fans on the motherboard.
Please do not use 3-pin fans and
4-pin fans on the same board.)
Marvell
SATA
CTRL
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
JPS1
Clear
CMOS
Fan 1
J35
JSLED
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
FAN1
LED
SATA
SATA 0
SATA 1
SATA 2
KB/Mouse
J2
Mouse
KB/
J3
USB
0/1
COM1
J4
COM2
J5
LAN1
LAN2
LAN
CTRL
LAN
CTRL
Fan5
Fan6
BIOS
WOR
SI/O
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
J13
JPL1
J15
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
Printer
JWOL
ATX PWR
DS3
8-pin
CN1
PW2
J7
J27
SMB PW
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
PW1
Marvell SATA
Enable
CPU1
CPU2
USB2/3
J42
H-SATA0/1
JS1
JS0
SATA 3
Fan2
Fan3
DS2
DS5
DS9
DS7
DS8
IDE #2
Fan4
Caution: These fan headers use DC power.
Fan 2
Fan 3
JF1
FP Ctlr
/Fan 6
Fan 5
IDE #1
Fan4
PS/2 Keyboard
and Mouse Port
Pin Definitions
(J2)
Pin
Number
Definition
1
Data
2
NC
3
Ground
4
VCC
5
Clock
6
NC
4-pin Fan Header Pin Definitions
(CPU and Chassis Fans )
Pin#
1
2
3
4PWM_Control
Definition
Ground (black)
+12V (red)
Tachometer
2-14
Chapter 2: Installation
Serial Ports
The COM1 (J4) and COM2 (J5) serial ports are located under the
parallel port (see Figure 2-3). See
the table on the right for pin definitions.
Wake-On-Ring (JWOR)
The Wake-On-Ring header is designated WOR. This function allows
your computer to receive and be
"woken-up" by an incoming call to
the modem when in suspend state.
See the table on the right for pin
definitions. You must have a
Wake-On-Ring card and cable to
use this feature.
Serial P o rt P i n D e f init io n s
Pin Number Definition
1DCD
2DSR
3Serial In
4RTS
5Serial O u t
(COM1 , C O M 2 )
Wake-on-Ring
Pin Definitions
Pin
Number
1
2
Pin Number De finition
6CTS
7DTR
8RI
9Ground
10NC
(WOR)
Definition
Ground
Wake-up
COM1
COM2
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
Fan5
BIOS
LAN
CTRL
Mouse
KB/
USB
0/1
LAN
CTRL
Fan6
WOR
SI/O
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
J13
JPL1
J15
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
Printer
JWOL
ATX PWR
DS3
8-pin
CN1
PW2
J7
J27
SMB PW
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
PW1
Marvell SATA
Enable
Chassis
Intrusion
Marvell
SATA
CTRL
JL1
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN1
J35
(*X6DAL-TB2)
JSLED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA 0
SATA 1
CPU1
CPU2
Fan2
Fan3
DS2
DS5
LED
SATA 2
JF1
FP Ctlr
USB2/3
DS9
J42
DS7
DS8
WOR
IDE #1
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SATA 3
2-15
X6DAL-B2/X6DAL-TB2 User's Manual
Wake-On-LAN
The Wake-On-LAN header is designated JWOL on the motherboard.
See the table on the right for pin
definitions. You must enable the
LAN Wake-Up setting in the BIOS
to use this function. (You must
also have a LAN card with a
Wake-On-LAN connector and
cable to use this feature.)
GLAN (Giga-bit Ethernet)
Ports
Two G-bit Ethernet ports are located beside the COM2 port on the
IO backplane.These ports accept
RJ45 type cables.
Wake-On-LAN Pin
Definitions (JWOL)
Pin
Number
1
2
3
Definition
+5V Standby
Ground
Wake-up
GLAN1
GLAN2
J2
J3
COM1
J4
COM2
J5
LAN1
LAN2
Fan5
BIOS
KB/
LAN
CTRL
USB
Fan6
SI/O
Mouse
0/1
LAN
CTRL
WOR
Printer
ATX PWR
AlMRset
DS1
PW
J7
Fault
J27
SMB PW
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
SMB data toPCIEn.
J13
JPL1
J15
SMBCLKtoPCI En.
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
JWOL
JF2
Spkr
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
PW1
Marvell SATA
Enable
Chassis
Intrusion
Marvell
SATA
CTRL
JL1
JWD
C
2
SATA I
(*X6DAL-TB2)
JPS1
Clear
CMOS
FAN1
J35
JSLED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
LED
SAT A2
CPU1
CPU2
USB2/3
H
-S
A
JS0
SAT A3
2-16
Fan2
Fan3
DS2
DS5
JF1
FP Ctlr
DS9
J42
DS7
DS8
IDE #1
IDE #2
T
A
0
/1
Fan4
WOL
JS1
Chapter 2: Installation
Power Fault
Connect a cable from your power
supply to the Power Fault header
(J7) to provide warnings of power
supply failure. This warning signal is passed through the
PWR_LED pin to indicate of a
power failure on the chassis. See
the table on the right for pin definitions.
SATA SMB (I2C)(*X6DALTB2 only)
A Serial ATA System Management
Bus header is located at J35.
Connect the appropriate cable
here to utilize SATA SMB on your
system.
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
Fan5
LAN
CTRL
BIOS
KB/
USB
Fan6
SI/O
PWR Fault
Mouse
AlMRset
DS1
PW
0/1
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
CTRL
PW3
PCI-E #6 (x16)
LAN
JPL1
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
Spkr
PW LED/KL
Printer
JWOL
J13
J15
Battery
PW1
ATX PWR
DS3
8-pin
CN1
PW2
J7
J27
SMB PW
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
JPS1
2
Clear
CMOS
C
SATA I
FAN1
J35
(*X6DAL-TB2)
JSLED
LED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
Power Fault
Pin Definitions
Pin
Number
1
P/S 1 Fail Signal
2
P/S 2 Fail Signal
3
P/S 3 Fail Signal
4
Reset (f rom MB)
Note: This feature is only available when using
redundant Supermicro power supplies.
SATA SMB (J35)
Pin Definitions
Pin
Number
1
2
3
CPU1
CPU2
Fan2
Fan3
DS2
SATA SMB
DS5
JF1
USB2/3
H
-S
A
JS0
SAT A3
SAT A2
FP Ctlr
DS9
J42
DS7
DS8
IDE #1
IDE #2
T
A
0/1
JS1
Fan4
Definition
Definition
Data
Ground
Clock
2-17
X6DAL-B2/X6DAL-TB2 User's Manual
SMB Power (I
2
C)
Connector
I2 C Connector (J27), located be-
tween the Alarm Reset Header
and the PWR Fault Header, monitors the status of PWR Supply,
Fan and system temperature.
Speaker/Power LED/
Keylock
On the JF2 header, pins 1/3/5/7
are for the Speaker, and Pins 2/4/
6 are for the Power LED and pins
8/9 are for Keylock. See the table
on the right for speaker pin definitions. Note: The speaker connector pins are for use with an external speaker. If you wish to use the
onboard speaker, you should
close pins 5-7 with a jumper.
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Printer
SMB PWR
AlMRset
DS1
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PCI-E #6 (x16)
LAN
Enable
Battery
Spkr
PW LED/KL
JWOL
ATX PWR
DS3
CN1
J7
J27
SMB PW
(North Bridge)
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Floppy
JF2
Spkr
PW1
8-pin
PW2
E7525
Tumwater
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
Watch Dog
JPS1
Clear
CMOS
FAN1
J35
JSLED
SATA
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
SMB PWR
Pin Definitions (J27)
Pin #
1
2
3
4
5
Speaker Connector Pin
Definitions (JF2)
Pin
Number
Function
1
+
3
Key
5
7
CPU1
CPU2
Fan2
Fan3
DS2
DS5
USB2/3
J42
DS8
-SATA0/1
JS1
JS0
JF1
FP Ctlr
DS9
DS7
IDE #1
IDE #2
Fan4
PWRLED/SKR/Keylock
LED
H
SAT A3
SAT A2
Definition
Clock
SMB Data
N/A
N/A
N/A
Definition
Red wire, Speaker data
No connection
Key
Speaker data
2-18
2-6Jumper Settings
Explanation of
Jumpers
To modify the operation of the
motherboard, jumpers can be
used to choose between
optional settings. Jumpers
create shorts between two pins
to change the function of the
connector. Pin 1 is identified
with a square solder pad on
the printed circuit board. See
the motherboard layout pages
for jumper locations.
Note: On two pin jumpers,
"Closed" means the jumper is
on and "Open" means the
jumper is off the pins.
Chapter 2: Installation
Connector
Pins
Jumper
Cap
Setting
Pin 1-2 short
3 2 1
3 2 1
LAN Enable/Disable
JPL1/JPL2 enable or disable the
Gigabit LAN ports on the motherboard. See the table on the right
for jumper settings. The default
setting is enabled.
LAN 1/LAN2 Enable
J2
Mouse
KB/
DS1
J3
USB
0/1
COM1
J4
COM2
J5
LAN1
LAN2
LAN
CTRL
PW3
PCI-E #6 (x16)
JPL1
LAN
JPL2
CTRL
PCI-#5 (33MHz)
Fan5
Fan6
PCI-#4 (33MHz)
BIOS
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Spkr
Printer
AlMRset
PW
Fault
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
Enable
PW LED/KL
JWOL
ATX PWR
DS3
CN1
J7
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
JF2
Spkr
PW1
8-pin
PW2
E7525
Tumwater
(North Bridge)
Floppy
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN1
J35
(*X6DAL-TB2)
JSLED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA0
CPU1
CPU2
LED
USB2/3
J42
DS8
H
-S
A
T
A
JS1
JS0
SATA3
SATA1
SATA2
GLAN
Enable/Disable
Jumper Settings
(JPL1/JPL2)
Jumper
Position
Pins 1-2
Pins 2-3
Fan2
Fan3
DS2
DS5
JF1
FP Ctlr
DS9
DS7
IDE #1
IDE #2
0/1
Fan4
Definition
Enabled
Disabled
2-19
X6DAL-B2/X6DAL-TB2 User's Manual
le
Alarm Reset
The system will notify you in the
event of a power supply failure.
This feature assumes that Supermicro redundant power supply
units are installed in the chassis.
If you only have a single power
supply installed, you should disable this (the default setting) with
(CN1) to prevent false alarms.
See the table on the right for
jumper settings.
Serial ATA Enable/Disable
(For Marvell's controller on
the X6DAL-TB2 only)
Jumpers JPS1 allows you to enable
or disable the Serial ATA headers.
The default setting is pins 1-2 to
enable all four headers. See the
table on the right for jumper settings.
Alarm Reset
PW1
ATX PWR
AlMRset
DS1
PW
J7
Fault
J27
SMB PW
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PW3
PCI-E #6 (x16)
LAN
J13
JPL1
J15
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
Battery
Spkr
PW LED/KL
Printer
JWOL
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
JPS1
2
Clear
CMOS
C
SATA I
COM1
COM2
J5
LAN1
LAN2
J3
J2
J4
Fan5
BIOS
KB/
LAN
CTRL
USB
Fan6
SI/O
Mouse
0/1
LAN
CTRL
WOR
FAN1
J35
(*X6DAL-TB2)
JSLED
LED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
CPU1
CPU2
H-SATA0/1
SAT A3
SAT A2
USB2/3
J42
JS1
JS0
DS8
DS7
DS2
DS5
Fan3
Fan4
Fan2
DS9
IDE #2
Alarm Reset Jumper
Settings
Jumper
Position
Open
Closed
Serial ATA Enable/Disab
(JPS1) (*For Marvell's
Jumper
Position
Pins 1-2
Pins 2-3
JF1
FP Ctlr
SATA Enable
IDE #1
Definition
Enabled
Disabled
Jumper Settings
SATA Controller)
Definition
Enabled
Disabled
2-20
Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of
contact pads to prevent the accidental clearing of CMOS. To clear CMOS,
use a metal object such as a small screwdriver to touch both pads at the
same time to short the connection. Always remove the AC power cord
from the system before clearing CMOS. Note: For an ATX power supply,
you must completely shut down the system, remove the AC power cord and
then short JBT1 to clear CMOS.
Watch Dog Enable/Disable
JWD enables the Watch Dog function. Watch Dog is a system monitor that can reboot the system
when a software application
hangs. Closing Pins 1-2 will cause
WD to reset the system if an application hangs. Close Pins 2-3 to
generate a non-maskable interrupt
signal for the application that
hangs. See the table on the right
for jumper settings. Watch Dog
can also be enabled in the BIOS.
Watch D og
Jumper Settings (JWD)
Jumper
Position
Pins 1-2
Pins 2-3
Open
Definition
WD to Reset
WD to NMI
Disabled
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
PCI-E #6 (x16)
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Spkr
Printer
AlMRset
DS1
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
Enable
JWOL
ATX PWR
PW
J7
Fault
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
PW LED/KL
JF2
Spkr
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
PW1
Marvell SATA
Enable
Chassis
Intrusion
Marvell
SATA
CTRL
JL1
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN1
J35
(*X6DAL-TB2)
JSLED
LED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
CPU1
CPU2
H-SATA0/1
SAT A3
SAT A2
2-21
USB2/3
J42
JS1
JS0
DS8
DS7
DS2
DS5
Fan4
Fan2
Fan3
DS9
IDE #2
JF1
FP Ctlr
WD
IDE #1
Clear COMS
X6DAL-B2/X6DAL-TB2 User's Manual
e
1
PW1
SMB Data to PC I Bus
SMB Clock to PCI Bus
SMB to PCI Bus and SMB
clock to PCI Bus Enable/
Disable
Jumper J13 allows you to enable or
disable SMB Data to the PCI Bus,
and Jumper J15 allows you to enable or disable the SMB Clock to the
PCI Bus. See the tables on the right
for pin definitions.
Jumper
Position
Off
On
Jumper
Position
Off
On
(J13)
Definition
(J15)
Disabled
Enabled
Definition
Disabled
Enabled
J2
KB/
J3
USB
COM1
J4
COM2
J5
LAN1
LAN2
LAN
CTRL
Fan5
Fan6
BIOS
SI/O
Mous
AlMRset
DS1
0/1
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
CTRL
PW3
PCI-E #6 (x16)
LAN
JPL1
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
Spkr
Printer
JWOL
J13
J15
ATX PWR
PW
J7
Fault
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
PW LED/KL
JF2
Spkr
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
C
2
SATA I
JPS1
Clear
CMOS
FAN
J35
(*X6DAL-TB2)
JSLED
LED
SATA
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
CPU1
CPU2
Fan2
Fan3
DS2
DS5
JF1
FP Ctlr
USB2/3
DS9
J42
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
JS1
Fan4
JS0
SAT A3
SAT A2
2-22
Chapter 2: Installation
e
1
PW1
2-7Onboard Indicators
GLAN LEDs
The Gigabit Ethernet LAN ports (located beside the COM Port2) have
two LEDs. The yellow LED indicates activity while the other LED
may be green, orange or off to indicate the speed of the connection. See the table at right for the
functions associated with the second LED.
SATA LED Header
A Serial ATA LED header is located at JSLED. See the table on
the right for speaker pin definitions. Please refer to Table 1 for
the X6DAL-TB2 board and Table 2
for the X6DAL-B2 board.
GLAN Ports
Mous
AlMRset
DS1
0/1
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
LAN
CTRL
PW3
PCI-E #6 (x16)
LAN
JPL1
Enable
JPL2
PCI-#5 (33MHz)
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
Spkr
Printer
JWOL
ATX PWR
PW
J7
Fault
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
PW LED/KL
JF2
Spkr
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
Marvell
SATA
CTRL
Marvell SATA
Enable
Chassis
Intrusion
J2
KB/
J3
USB
COM1
COM2
J5
LAN1
LAN2
J4
Fan5
BIOS
LAN
CTRL
Fan6
SI/O
RightLeft
(Back Panel View)
G-bit LAN Left LED
Indicator
LED
Color
(*Also:Off
Green
Orange
Indicator(Activity LED)
LED
Color
Amber
Table 1-SATA LED Pi n Definitions
(JSLED) (*For the X6DAL-TB2 Only)
Pin#
1
Marvell SATA HD0 Active LED
2
Marvell SATA HD1 Active LED
3
Marvell SATA HD2 Active LED
4
Marvell SATA HD3 Active LED
5
All Marvell SATA Ports Active LED
6
Hance Rapid's SATA Active LED
7
Hance Rapid's SATA Active LED
Table 2 -SATA LED Pin Definitions
(*For the X6DAL-B2 Only)
Pin#
6
Hance Rapid's SATA Active LED
7
Hance Rapid's SATA Active LED
FAN
CPU1
CPU2
Fan2
C
2
J35
SATA I
(*X6DAL-TB2)
JSLED
SATA
Watch Dog
JWD
ESB6300
Hance
Rapids
JPS1
Clear
JBT1
M-SATA0-3
CMOS
JL1
SAT A0
SAT A1
Fan3
DS2
DS5
JF1
LED
USB2/3
H
-S
A
JS0
SAT A3
SAT A2
SATA LED
FP Ctlr
DS9
J42
DS7
DS8
IDE #1
IDE #2
T
A
0
/1
JS1
Fan4
Definition
10 Mbps
Off
No Connection)
100 Mbps
1 Gbps
1 Gb LAN Right LED
Definition
Blinking
10Mbps/
100Mbps/1Gbps
Definition
(JSLED)
Definition
2-23
X6DAL-B2/X6DAL-TB2 User's Manual
Onboard LED Indicators
(DS1-DS8)
In addition to the LAN LED and
SATA Header, there are other LED
indicators (DS1-DS3, DS5, DS7DS8 ) on the X6DAL-B2/TB2. See
the table on the right for speaker
pin definitions. (*Note: Please refer to Appendix A for DS7 and
DS8 LED POST Codes.)
System Alert LED
Indicators (DS9)
In addition to the LED indicators
listed above, there is a System
Alert LED indicator (DS9) on the
X6DAL-B2/TG. See the table on
the right for speaker pin definitions.
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
Fan5
BIOS
KB/
USB
LAN
CTRL
SI/O
DS1
Mouse
DS1
0/1
LAN
CTRL
PW3
PCI-E #6 (x16)
LAN
JPL1
Enable
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
Spkr
Printer
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
ATX PWR
AlMRset
PW
J7
Fault
J27
SMB PW
SMB data toPCIEn.
J13
J15
SMBCLKtoPCI En.
Battery
PW LED/KL
JWOL
JF2
Spkr
DS3
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
Floppy
PW1
Marvell SATA
Enable
Chassis
Intrusion
Marvell
SATA
CTRL
JL1
JWD
C
2
SATA I
(*X6DAL-TB2)
Watch Dog
JPS1
Clear
CMOS
2-24
FAN1
J35
JSLED
LED
SATA
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
On board LED P in Definitions
DS#
DS1
CPU PWR good or CPU +12V P WR
DS2
DS3
DS5
DS7-8
Definition
Cable must be connected.
CPU2 VRM Overheat
CPU1 VRM Overheat
PWR LED
POST LED
System Alert LED (DS9) Pin Definitions
SAT A2
CPU1
CPU2
H
-S
SAT A3
DS9
Green
Yellow
System: Off, PWR Cable Connected
Red
Fan2
Fan3
DS2
DS5
USB2/3
DS9
J42
DS7
DS8
IDE #2
A
TA
0/1
JS1
Fan4
JS0
Definition
System: On & OK
PW R or CPU Failure
DS2
JF1
DS5
FP Ctlr
DS9
DS7
IDE #1
DS8
Chapter 2: Installation
-
2-8Parallel Port, Floppy/Hard Disk Drive and SCSI
Connections
Note the following when connecting the floppy and hard disk drive cables:
• The floppy disk drive cable has seven twisted wires.
• A red mark on a wire typically designates the location of pin 1.
• A single floppy disk drive ribbon cable has 34 wires and two connectors
to provide for two floppy disk drives. The connector with twisted wires
always connects to drive A, and the connector that does not have
twisted wires always connects to drive B.
Parallel (Printer) Port
Connector
There is a parallel (printer) port is
located on the motherboard. See
the table on the right for pin definitions. (*Note: This is a header. You
will need to have a Parallel Port
cable: CBL_081 to use this con-
nector.)
PW1
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
LAN
CTRL
Fan5
BIOS
Mouse
KB/
USB
0/1
LAN
CTRL
PW3
JPL1
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
SI/O
Printer
ATX PWR
AlMRset
DS1
PW
J7
Fault
J27
SMB PW
DIMM 1B
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
PCI-E #6 (x16)
LAN
J13
J15
Enable
Battery
Spkr
PW LED/KL
JWOL
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
JPS1
Clear
CMOS
J35
JSLED
Watch Dog
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SATA 0
FAN1
SATA
Parallel (Printer) Port Pin Definitions
Pin Number Function
1Strobe 3Data Bit 0
5Data Bit 1
7Data Bit 2
9Data Bit 3
11Data Bit 4
13Data Bit 5
15Data Bit 6
17Data Bit 7
19ACK
21BUSY
23PE
25SLCT
CPU1
CPU2
Fan2
Fan3
DS2
DS5
LED
SATA 1
SATA 2
JF1
FP Ctlr
USB2/3
DS9
J42
DS7
DS8
IDE #1
IDE #2
H
-S
A
T
A
0
/1
Fan4
Printer
JS1
JS0
SATA 3
Pin Number Function
2Auto Feed
4Error 6Init 8SLCT IN 10GND
12GND
14GND
16GND
18GND
20GND
22GND
24GND
26NC
2-25
X6DAL-B2/X6DAL-TB2 User's Manual
Floppy Connector
The floppy connector is located at
J24. See the table below for pin
definitions.
Floppy Connector Pin Definitions (J24)
Pin Number Function
1GND
3GND
5Key
7GND
9GND
11GND
13GND
15GND
17GND
19GND
21GND
23GND
25GND
27GND
29GND
31GND
33GND
The IDE Connectors are located at J44 (IDE1) and J38
(IDE 2), You do not need to
configure jumpers for these
connectors. See the table
on the right for pin definitions.
IDE Connector Pin Definitions
(J44, J38)
Pin NumberFunction
1Reset IDE
3Host Data 7
5Host Data 6
7Host Data 5
9Host Data 4
11Host Data 3
13Host Data 2
15Host Data 1
17Host Data 0
19GND
21DRQ3
23I/O Write 25I/O Read 27IOCHRDY
29DACK3 31IRQ14
33Addr 1
35Addr 0
37Chip Select 0
39Activity
Chapter 2: Installation
Pin NumberFunction
2GND
4Host Data 8
6Host Data 9
8Host Data 10
10Host Data 11
12Host Data 12
14Host Data 13
16Host Data 14
18Host Data 15
20Key
22GND
24GND
26GND
28BALE
30GND
32IOCS16 34GND
36Addr 2
38Chip Select 1 40GND
COM1
COM2
J5
LAN1
LAN2
J2
J3
J4
Fan5
LAN
CTRL
BIOS
KB/
USB
SI/O
Mouse
DS1
0/1
DIMM 1B
LAN
CTRL
PW3
PCI-E #6 (x16)
LAN
JPL1
Enable
JPL2
PCI-#5 (33MHz)
Fan6
PCI-#4 (33MHz)
PCI-X #3 (66 MHz)
PCI-X #2 (66 MHz)
WOR
Spkr
Printer
AlMRset
PW
Fault
DIMM 1A
DIMM 2B
DIMM 2A
DIMM 3B
DIMM 3A
J13
J15
Battery
PW LED/KL
JWOL
ATX PWR
J7
J27
SMB PW
PW1
DS3
8-pin
CN1
PW2
E7525
Tumwater
(North Bridge)
SMB data toPCIEn.
SMBCLKtoPCI En.
Floppy
JF2
Spkr
Marvell
SATA
CTRL
Marvell SATA
Enable
JL1
Chassis
Intrusion
JWD
C
2
SATA I
(*X6DAL-TB2)
Watch Dog
JPS1
Clear
CMOS
2-27
FAN1
J35
JSLED
LED
SATA
ESB6300
Hance
Rapids
JBT1
M-SATA0-3
SAT A0
SAT A1
SAT A2
CPU1
CPU2
H
-S
SAT A3
USB2/3
J42
A
T
JS1
JS0
DS8
A
Fan2
Fan3
DS2
DS5
JF1
FP Ctlr
DS9
IDE
DS7
IDE #1
IDE #2
0/1
Fan4
X6DAL-B2/X6DAL-TB2 User's Manual
(*Note: Please refer to Appendix C and Appendix D for software
installation instructions.)
2-28
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have
followed all of the procedures below and still need assistance, refer to the
‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’
section(s) in this chapter.
Note: Always disconnect the power cord before adding, changing
or installing any hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including those
for the keyboard and mouse.
3. Remove all add-on cards.
4. Install one CPU in socket#1 (making sure it is fully seated) and connect
the chassis speaker and the power LED to the motherboard. (Check all
jumper settings as well.)
5. Use only the correct type of onboard CMOS battery as recommended by
the Manufacturer. Do not install the onboard battery upside down to
avoid possible explosion.
No Power
1. Make sure that there are no short circuits between the motherboard and
the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still
supplies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards
and cables.
2. Use the speaker to determine if any beep codes exist. Refer to the
Appendix for details on beep codes.
3-1
X6DAL-B2/X6DAL-TB2 User's Manual
NOTE
If you are a system integrator, VAR or OEM, a POST diagnos-
tics card is recommended. For I/O port 80h codes, refer to
App. B.
Memory Errors
1. Make sure the DIMM modules are properly and fully installed.
2. Check if different speeds of DIMMs have been installed and check if the
BIOS setup is configured for the fastest speed of RAM used. It is
recommended that you use the same RAM speed for all DIMMs in the
system.
3. Make sure you are using the correct type of Registered, ECC DDRII 400
(PC3200) SDRAM (*recommended by the manufacturer.)
4. Check for bad DIMM modules or slots by swapping a single module between two slots and noting the results.
5. Make sure all memory modules are fully seated in their slots. As an
interleaved memory scheme is used, you must install two modules at a
time, beginning with DIMM #1A, then DIMM #1B, and so on (see Section
2-3).
Losing the System’s Setup Configuration
1. Make sure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup information. Refer to Section 1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still
supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fix the Setup Configuration problem, contact
your vendor for repairs.
3-2Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also,
note that as a motherboard manufacturer, Super Micro does not sell directly
to end-users, so it is best to first check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s)
with the specific system configuration that was sold to you.
3-2
Chapter 3: Troubleshooting
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently
Asked Question' (FAQ) sections in this chapter or see the FAQs on our
web site (http://www.supermicro.com/support/faqs/) before contacting
Technical Support.
2. BIOS upgrades can be downloaded from our web site at
(http://www.supermicro.com/support/bios/).
Note: Not all BIOS can be flashed depending on the modifications
to the boot block code.
3. If you still cannot resolve the problem, include the following information
when contacting Super Micro for technical support:
•Motherboard model and PCB revision number
•BIOS release date/version (this can be seen on the initial display when
your system first boots up)
•System configuration
An example of a Technical Support form is on our web site at
(http://www.supermicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can
be reached by e-mail at support@supermicro.com, by phone at:
(408) 503-8000, option 2, or by fax at (408)503-8019.
3-3Frequently Asked Questions
Question: What are the various types of memory that my motherboard can support?
Answer: The X6DAL-B2/X6DAL-TB2 has six 240-pin DIMM slots that sup-
port registered ECC DDRII 400 (PC3200) SDRAM modules. It is strongly
recommended that you do not mix memory modules of different speeds and
sizes.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are
experiencing no problems with your system. Updated BIOS files are located
on our web site at http://www.supermicro.com/support/bios/. Please
check our BIOS warning message and the information on how to update
your BIOS on our web site. Also, check the current BIOS revision and make
sure it is newer than your BIOS before downloading.
3-3
X6DAL-B2/X6DAL-TB2 User's Manual
Question: How do I recover my BIOS?
Answer:
1. Download the correct BIOS Image file from our website into a floppy disk
and name the BIOS Image file "super.rom".
2. Place the floppy disk in drive A. Press and hold <CTRL> and <Home> at
the same time. Turn on the power with these keys pressed until your floppy
drive starts reading.
3. Your screen will remain blank until the BIOS program is done. If the
system reboots correctly, then the recovery was successful. The BIOS
Recovery Procedure will not update the boot block in your BIOS.
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs
that will greatly enhance your system. We recommend that you review the
CD and install the applications you need. Applications on the CD include
chipset drivers for Windows and security and audio drivers. Note: The CD
is a bootable disc and can be used to create driver diskettes.
3-4Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is
required before any warranty service will be rendered. You can obtain
service by calling your vendor for a Returned Merchandise Authorization
(RMA) number. When returning to the manufacturer, the RMA number
should be prominently displayed on the outside of the shipping carton, and
mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse,
abuse or improper maintenance of products.
During the warranty period, contact your distributor first for any product
problems.
3-4
Chapter 4: AMI BIOS
Chapter 4
AMIBIOS
4-1Introduction
This chapter describes the AMIBIOS for the X6DAL-B2/X6DAL-TB2. The AMI
ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a
floppy disk-based program. This chapter describes the basic navigation of
the AMI BIOS Setup Utility setup screens.
Starting the BIOS Setup Utility
To enter the AMI BIOS Setup Utility screens, hit the <Delete> key while the
system is booting-up.
(*Note: In most cases, the <Delete> key is used to invoke the AMI BIOS setup
screen. There are a few cases when other keys are used, such as <F1>,
<F2>, and so on.)
Each main BIOS menu option is described in this user’s guide. The Main
BIOS setup menu screen has two main frames. The left frame displays all
the options that can be configured. “Grayed-out” options cannot be configured. Options in blue can be configured by the user. The right frame displays the key legend. Above the key legend is an area reserved for a text
message. When an option is selected in the left frame, it is highlighted in
white. Often a text message will accompany it.
(*Note: The AMI BIOS has default text messages built in. Supermicro retains
the option to include, omit, or change any of these text messages.)
The AMI BIOS setup/utility uses a key-based navigation system called hot
keys. Most of the AMI BIOS setup utility hot keys can be used at any time
during the setup navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, and so on.
(*Note: Options printed in Bold are default settings. )
4-1
X6DAL-B2/X6DAL-TB2User’s Manual
4-2 Main Setup
When you first enter the AMI BIOS Setup Utility, you will enter the Main
setup screen. You can always return to the Main setup screen by selecting
the Main tab on the top of the screen. The Main BIOS Setup screen is
shown below.
When you select the Main Setup, the following items will be automatically
displayed:
System Overview: The following BIOS information will be displayed:
AMI BIOS
Version
Built Date
ID
Processors
When you select this option, the AMI BIOS will automatically display the
status of processors as shown in the screen below:
Type
Speed
Count
4-2
Chapter 4: AMI BIOS
System Memory
This option allows the AMI BIOS to display the status of memory installed in
the system.
Size
This option allows the AMI BIOS to display the size of memory installed in
the system.
System Time/System Date
Use this option to change the system time and date. Highlight System Time
or System Date using the <Arrow> keys. Enter new values through the
keyboard. Press the <Tab> key or the <Up Arrow>, and the <Down Arrow>
keys to move between fields. The date must be entered in HH/MM/DD/YY
format. The time is entered in HH:MM:SS format.(*Note: The time is in 24-
hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30P.M. as
17:30:00.)
4-3Advanced Settings
The Advanced Settings screen and sub menus are listed below:
Warning
When you first enter the Advanced Setup screen, the Setup Warning will
be displayed. Please follow the instruction and set the correct value for
each item to prevent the system from malfunctioning.
4-3
X6DAL-B2/X6DAL-TB2User’s Manual
XX
XCPU Configuration Sub Menu
XX
Configure Advanced CPU Settings
This option allows the user to configure Advanced CPU settings for the
processor(s) installed in the system.
Ratio CMOS Setting
This option allows the user to set the ratio between the CPU Core Clock
and the FSB Frequency. (*Note: if an invalid ratio is entered, AMIBIOS will
restore the setting to the previous state.)
Max CPUID Value Limit
This feature allows the user to set the maximum CPU ID value. Enable this
function to boot legacy OS that cannot support processors with extended
CPUID functions. The options are Enabled and Disabled.
Hardware Prefetcher
Set to Enabled to allow the processor to prefetch data such as source
addresses, target addresses and comments from cache and memory and
store in a queue within the processors to increase CPU's performance. The
options are Enabled and Disabled.
Adjacent Cache Line Prefetch
The CPU fetches the cache line for 64 bytes if Disabled. The CPU
fetches both cache lines for 128 bytes as comprised if Enabled.
4-4
Chapter 4: AMI BIOS
Hyper-Threading
This setting allows you to Enable or Disable the function of hyperthreading. Enabling hyper-threading results in increased CPU
performance.
Intel(R) SpeedStep(tm) tech.
This setting allows the system to set the CPU speed. Select Maximum to
set the CPU to operate only at its maximum speed. Select Minimum to set
the CPU to only operate at its minimum speed. Select Automatic to allow
the cpu speed to be controlled by the operating system. Select Disabled
to allow the CPU to operate only at its default speed.
CPU Force PR#
If Enabled, the FORCEP# will function as an input pin. If disabled, the state
of FORCEPR# will be ignored by the CPU. The options are: Enabled and
Disabled.
Select TM2 VID
This setting allows you to set the TM2 VID value. Enter a number from
14 to 35 to select the desired voltage value (from 1.000V to 1.2625V.)
The default setting is 30(=1.2000).
4-5
X6DAL-B2/X6DAL-TB2User’s Manual
XX
XIDE Configuration Sub Menu
XX
The screen for the Primary IDE Master is shown below:
When you select this Sub Menu, the AMI BIOS automatically displays the
status of the following items:
IDE Configuration
This feature allows the user to set the IDE mode. The options are:
Disabled, P-ATA (Parallel ATA) Only, S-ATA (Serial ATA) Only, and P-
ATA & S-ATA.
P-ATA & S-ATA
Combined Mode Operation
This feature allows the user to select the IDE Combined Mode. The
options are: P-ATA (Parallel ATA) 1ST Channel and S-ATA (Serial
ATA 1st Channel).
S-ATA Ports Definition
This feature allows the user to configure Serial ATA Ports. The
options are: P0-Master/P1-Slave, P0-Slave/P1-Master.
4-6
Chapter 4: AMI BIOS
P-ATA Only
S-ATA Running Enhanced Mode
Select Yes if you want the function of Serial ATA Enhanced Mode
to be enabled at all times. Options are Yes and No.
P-ATA Channel Selection
This feature allows the user to select which channel to set the
Parallel ATA Mode. The options are: Primary, Secondary or Both.
S-ATA Ports Definition
This feature allows the user to configure Serial ATA Ports. The
options are: P0-3rd/P1-4th, P0-4th/P1-3rd.
Configuring S-ATA as RAID
Select Yes to configure Serial ATA as RAID. The options are Yes,
and No.
S-ATA Only
S-ATA Ports Definition
This feature allows the user to configure Serial ATA Ports. The
options are: P0-1st/P1-2nd, P0-2nd/P1-1st.
Primary IDE Master/Slave, Secondary IDE Master/Slave, Third
IDE Master/Slave, Fourth IDE Master/Slave Sub Menu
From the Advanced Setup screen, press <Enter> to access this sub menu
for the primary, secondary, third and fourth IDE master and slave drives.
Use this screen to select options for the Primary and Secondary IDE drives.
Use the up and down <Arrow> keys to select an item. Use the <Plus> and
<Minus> keys to change the value of the selected option.
Type
Select the type of device connected to the system. The options are Not
Installed, Auto, CDROM and ARMD.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing data on a disk
drive. In the LBA mode, the maximum drive capacity is 137 GB. For drive
capacities over 137 GB, your system must be equipped with 48-bit LBA
mode addressing. If not, contact your manufacturer or install an ATA/133
IDE controller card that supports 48-bit LBA mode. The options are Disabled or Auto.
4-7
X6DAL-B2/X6DAL-TB2User’s Manual
Block (Multi-Sector Transfer)
Block mode boosts IDE drive performance by increasing the amount of
data transferred. Only 512 bytes of data can be transferred per interrupt
if block mode is not used. Block mode allows transfers of up to 64 KB
per interrupt. Select "Disabled" to allow the data to be transferred from
and to the device one sector at a time. Select "Auto" to allows the data
transfer from and to the device occur multiple sectors at a time if the
device supports it. The options are Auto and Disabled.
PIO Mode
IDE PIO (Programmable I/O) mode programs timing cycles between the IDE
drive and the programmable IDE controller. As the PIO mode increases,
the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4" Select
Auto to allow the AMI BIOS to auto detect the PIO mode. Use this value if
the IDE disk drive support cannot be determined. Select 0 to allow the
AMI BIOS to use PIO mode 0. It has a data transfer rate of 3.3 MBs.
Select 1 to allow the AMI BIOS to use PIO mode 1. It has a data transfer
rate of 5.2 MBs. Select 2 to allow the AMI BIOS to use PIO mode 2. It has
a data transfer rate of 8.3 MBs. Select 3 to allow the AMI BIOS to use PIO
mode 3. It has a data transfer rate of 11.1 MBs. Select 4 to allow the AMI
BIOS to use PIO mode 4. It has a data transfer rate of 16.6 MBs. This
setting generally works with all hard disk drives manufactured after
1999. For other disk drives, such as IDE CD-ROM drives, check the specifications of the drive.
DMA Mode
Select Auto to allow the BIOS to auto detect the DMA mode. Use this
value if the IDE disk drive support cannot be determined. Select SWDMA0
to allow the BIOS to use Single Word DMA mode 0. It has a data transfer
rate of 2.1 MBs. Select SWDMA1 to allow the BIOS to use Single Word
DMA mode 1. It has a data transfer rate of 4.2 MBs. Select SWDMA2 to
allow the BIOS to use Single Word DMA mode 2. It has a data transfer
rate of 8.3 MBs. Select MWDMA0 to allow the BIOS to use Multi Word
DMA mode 0. It has a data transfer rate of 4.2 MBs. Select MWDMA1 to
allow the BIOS to use Multi Word DMA mode 1. It has a data transfer rate
of 13.3 MBs. Select MWDMA2 to allow the BIOS to use Multi-Word DMA
mode 2. It has a data transfer rate of 16.6 MBs. Select UDMA0 to allow
the BIOS to use Ultra DMA mode 0. It has a data transfer rate of 16.6
MBs. It has the same transfer rate as PIO mode 4 and Multi Word DMA
mode 2. Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has
a data transfer rate of 25 MBs. Select UDMA2 to allow the BIOS to use
Ultra DMA mode 2. It has a data transfer rate of 33.3 MBs. Select UDMA3
4-8
Chapter 4: AMI BIOS
the BIOS to use Ultra DMA mode 1. It has a data transfer rate of 25 MBs.
Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data
transfer rate of 33.3 MBs. Select UDMA3 to allow the BIOS to use Ultra
DMA mode 3. It has a data transfer rate of 66.6 MBs. Select UDMA4 to
allow the BIOS to use Ultra DMA mode 4 . It has a data transfer rate of
100 MBs. The options are Auto, SWDMAn, MWDMAn, and UDMAn.
S. M. A. R. T.
Self-Monitoring Analysis and Reporting Technology (SMART) can help
predict impending drive failures. Select "Auto" to allow the BIOS to auto
detect hard disk drive support. Select "Disabled" to prevent the AMI BIOS
from using the S.M.A.R.T. Select "Enabled" to allow the AMI BIOS to use
the S.M.A.R.T. to support hard drive disk. The options are Disabled,
Enabled, and Auto.
32Bit Data Transfer
Select "Enabled" to activate the function of 32-Bit data transfer. Select
"Disabled" to deactivate the function. The options are Enabled and Dis-
abled.
Hard Disk Write Protect
Select Enabled to enable the function of Hard Disk Write Protect to prevent
data from being written to HDD. The options are Enabled or Disabled.
IDE Detect Time Out
This feature allows the user to set the time-out value for detecting ATA,
ATA PI devices installed in the system. The options are 0 (sec), 5, Mode 1.0,
15, 20, 25, 30, and 35.
XX
XFloppy Configuration
XX
This option allows the user to configure the settings for the Floppy Drives
installed in the system.
Floppy A
Move the cursor to these fields via up and down <arrow> keys to select
the floppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4",
720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½". Default setting for Floppy A
drive is 1.44 MB 3½”.
OnBoard Floppy Controller
Select "Enabled" to enable the Onboard Floppy Controller. The options are
"Disabled", and "Enabled."
4-9
X6DAL-B2/X6DAL-TB2User’s Manual
XPCI/PnP Configuration
This feature allows the user to set PCI/PnP configurations for the following
items:
Plug & Play OS
Select Yes to allow the OS to configure Plug & Play devices. (*This is not
required for system boot if you system has an OS that supports Plug &
Play.) Select No to allow the AMIBIOS to configure all devices in the sys-
tem.
PCI Latency Timer
This option sets the latency of all PCI devices on the PCI bus. Select 32 to
set the PCI latency to 32 PCI clock cycles. Select 64 to set the PCI latency
to 64 PCI clock cycles. Select 96 to set the PCI latency to 96 PCI clock
cycles. Select 128 to set the PCI latency to 128 PCI clock cycles. Select 160
to set the PCI latency to 160 PCI clock cycles. Select 192 to set the PCI
latency to 192 PCI clock cycles. Select 224 to set the PCI latency to 224 PCI
clock cycles. Select 248 to set the PCI latency to 248 PCI clock cycles.
Allocate IRQ to PCI VGA
Set this value to allow or restrict the system from giving the VGA adapter
card an interrupt address. The options are Yes and No.
4-10
Chapter 4: AMI BIOS
Palette Snooping
Select Enabled to inform the PCI devices that an ISA graphics device is
installed in the system in order for the graphics card to function properly.
The options are Enabled or Disabled.
PCI IDE BusMaster
Set this value to allow or prevent the use of PCI IDE busmastering. Select
"Enabled" to allow the AMI BIOS to use PCI busmaster for reading and
writing to IDE drives. The options are "Disabled" and "Enabled".
Offboard PCI/ISA IDE Card
This option allows the user to assign a PCI slot number to an Off-board PCI/
ISA IDE card in order for it to function properly. The options are: Auto, PCI
Slot1, PCI Slot2, PCI Slot3, PCI Slot4, PCI Slot5, and PCI Slot6.
IRQ3/IRQ4/IRQ5/IRQ7/IRQ9/IRQ10/IRQ11/IRQ14/IRQ15
This feature specifies the availability of an IRQ to be used by a PCI, PnP
device. Select Reserved for the IRQ to be used by a Legacy ISA device.
The options are: Available, Reserved.
Select Available to indicate that a specific DMA channel is available to
be used by a PCI/PnP device. Select Reserved, if the DMA channel
specified is reserved for a Legacy ISA device.
Reserved Memory Size
This feature specifies the size of memory block to be reserved for Legacy
ISA devices. The options are: Disabled, 16K, 32K, 64K.
4-11
X6DAL-B2/X6DAL-TB2User’s Manual
XX
XSuper IO Configuration Sub Menu
XX
Serial Port1 Address
This option specifies the base I/O port address and Interrupt Request address of serial port 1. Select "Disabled" to prevent the serial port from
accessing any system resources. When this option is set to Disabled, the
serial port physically becomes unavailable. Select "3F8/IRQ4" to allow the
serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt
address. The options are Disabled, 3F8/IRQ4, 3E8/IRQ4, 2E8/IRQ3.
Serial Port2 Address
This option specifies the base I/O port address and Interrupt Request address of serial port 2. Select "Disabled" to prevent the serial port from
accessing any system resources. When this option is set to "Disabled", the
serial port physically becomes unavailable. Select "2F8/IRQ3" to allow the
serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt
address. The options are Disabled, 2F8/IRQ3, 3E8/IRQ4, 2E8/IRQ3.
Parallel Port Address
This option specifies the I/O address used by the parallel port. Select
Disabled to prevent the parallel port from accessing any system resources.
When the value of this option is set to Disabled, the printer port becomes
unavailable. Select 378 to allow the parallel port to use 378 as its I/O port
address. The majority of parallel ports on computer systems use IRQ7 and
I/O Port 378H as the standard setting. Select 278 to allow the parallel port to
use 278 as its I/O port address. Select 3BC to allow the parallel port to use
3BC as its I/O port address.
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Chapter 4: AMI BIOS
Parallel Port Mode
This feature specifies the parallel port mode. The options are
Normal, Bi-directional, EPP and ECP.
ECP Mode DMA Channel
This option allows the AMI BIOS to select Parallel Port's ECP Mode.
The options are DMA0, DMA1 and DMA3.
Parallel Port IRQ
This feature allows the user to select the IRQ (interrupt request) for
the parallel port. The options are IRQ5 and IRQ7.
XX
XAdvanced Chipset Settings
XX
This item allows the user to configure the Advanced Chipset settings for
the system.
XNorthBridge Configuration
This feature allows the user to configure the settings for Intel Lindenhurst
NorthBridge chipset.
Memory Remap Feature
Select Enabled to allow remapping of overlapped PCI memory above the
total physical memory. The options are Enabled and Disabled.
Memory Mirroring and Sparing
Select Enabled to enable Memory RAS (-Mirroring and Sparing) to allow
the system to create a mirror copy of data written to the memory for data
security. The options are Disabled and Enabled.
XSouthBridge Configuration
This feature allows the user to configure the settings for Intel ICH SouthBridge chipset.
CPU B.I.S.T. Enable
Select Enabled to enable the function of CPU Built In Self Test. The options
are Enabled and Disabled.
ICH Delayed Transaction
Select Enabled to enable the function of ICH Delayed Transaction to provide
back-compatibility for slower components . The options are Enabled and
Disabled.
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X6DAL-B2/X6DAL-TB2User’s Manual
ICH DCB Enable
Select Enabled to enable ICH DMA Collection Buffer. The options are Enabled and Disabled.
XX
XACPI Configuration
XX
This item allows the user to enable or disable ACPI support for the operating
system.
General ACPI Configuration
Use this feature to configure additional ACPI options. Select "Yes" if the
operating system supports ACPI. Select No if the operating system does not
support ACPI. The options are No and Yes.
Suspend Mode
This feature allows the user to select the ACPI state when the system is
on the Suspend Mode. Select S1 if you want the system to standby.
Select S3 to enable the function of Suspend to RAM, which will shorten
bootup time after poweroff. The options are S1(POS) and S1&S3 (STR).
Advanced ACPI Configuration
Use this feature to configure additional ACPI options. Select "Yes" if the
operating system supports ACPI. Select No if the operating system does not
support ACPI. The options are No and Yes.
ACPI 2.0 Features
Select Yes to allow RSDP pointers to point to the 64-bit Fixed System
Description Tables. Select No to deactivate this function. The options are
Yes and No.
ACPI APIC Support
Select Enabled to allow the ACPI APIC Table Pointer to be included in the
RSDP pointer list. The options are Enable, and Disabled.
AMI OEMB Table
Select Enabled to allow the OEMB Table Pointer to be included in the
R(x)SDT pointer lists. The options are Enabled, and Disabled.
Headless Mode
Select Enabled to activate the Headless Operation Mode through ACPI,
which will allow the system to boot up and function properly without
keyboard and monitor display. The options are Enabled, and Disabled.
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Chapter 4: AMI BIOS
X
Power Configuration
This feature allows the user to configure PnP settings.
Power Button Instant Off
If set to Enabled, the system will shut down immediately once the power
button is pressed. If Disabled, the system will shut down when the
power button is continually pressed for more than 4 seconds. The
options are Enabled and Disabled.
Restore on AC Power Loss
This setting allows you to choose how the system will react when
power returns after an unexpected loss of power. The options are
Power Off, Power On and Last State.
Watch Dog Timer
This setting is used to enable or disabled the Watch Dog Timer function. It
must be used in conjunction with the WD jumper (see Chapter 2 for details).
The options are Enabled and Disabled.
XEvent Log Configuration
Highlight this item and press <Enter> to view the contents of the event log.
View Event Log
This feature allows the user to view all unread events.
Mark All Events as Read
Highlight this item and press <Enter> to mark the DMI events as read.
Clear Event Logs
This setting will clear all event logs when set to "OK". The options are
"OK" and "Cancel".
ECC Event Log
This setting allows you to enable or disable ECC Event logging. The options
are Enabled or Disabled.
Hub Interface Event Logging
This setting allows you to enable or disable Hub Interface Event logging.
The options are Enabled or Disabled.
System Bus Event Logging
This setting allows you to enable or disable System Bus Event logging. The
options are Enabled or Disabled.
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Memory Buffer Event Logging
This setting allows you to enable or disable Memory Buffer Event logging.
The options are Enabled or Disabled.
PCI Error Logging
This setting allows you to enable or disable PCI Error logging. The options
are Enabled or Disabled.
XX
XMPS Configuration
XX
This section allows the user to configure the multi-processor table.
MPS Revision
This feature allows the user to select MPS Revision. The options are 1.1
or 1.4.
XPCI Express Configuration
This section allows the user to configure PCI Express slots.
Active State Power Management
Select Enabled to activate the function of power management for signal
transactions between PCI Express L0 and L1 Link. The options are Enabled
and Disabled.
I/O Expander Mode
This feature allows the user to set the IO Expand Mode for Hot Plug support. The options are PCA9555, Two PCA9554, One PCA9554 (Low), One
PCA9554 (High), Two PCA9554A, One PCA9554A (Low), and One
PCA9554A (High).
PCI Express Port4 (Slot 6)
This feature allows the user to configure the PCI Express slot. The options
are Enabled and Disabled.
PCI Express Compliance Mode
Select Enabled to enable MCH to activate PCI Express Compliance Mode.
The options are Disabled and Enabled.
Spread Spectrum
If Enabled, the AMI BIOS will detect and attempt to reduce the
Electromagnetic Interference caused by the components. The options are
Enabled and Disabled.
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Chapter 4: AMI BIOS
XRemote Access Configuration
You can use this screen to select options for the Remote Access Configuration. Use the up and down <Arrow> keys to select an item. Use the
<Plus> and <Minus> keys to change the value of the selected option.
Remote Access
This feature allows the user to disable the function of Remote Access. If
Disabled is not selected, then you can select a Remote Access type for
Console Redirection. The options are Enabled and Disabled. (*The
default setting is Disabled. However, if this feature is set to Enabled,
the following items will be displayed:)
Serial Port Number
This feature allows the user to select a serial port for console
redirection. Select the COM Port that the serial modem's cable is
connected to. The options are COM1 and COM2.
Serial Port Mode
This feature allows the user to configure the serial port settings for
console redirection. The options are 115200, 8, n, 1; 57600, 8, n, 1;
38400, 8, n, 1; 19200, 8, n, 1 and 09600, 8, n, 1 [bits per second,
data bits, parity, stop bits.]
Flow Control
This feature allows the user to determine how the system manage the
flow control for console redirection. The options are None, Hardware,
and Software.
Redirection after BIOS POST
This feature allows the user to decide if, and how to, continue with
Console Redirection after POST. If set to Disabled, Console
Redirection will be turned off after the BIOS POST routine. If set to
Bootup Loader, Console Redirection will be active during POST and
Bootup Loader routines. If set to Always, Console Redirection will
remain active in the OS environment if the OS is in the text mode. (If
the OS is in the graphic mode, this function will not be supported.) The
options are Disabled, Always and Bootup Loader.
Terminal Type
This feature allows the user to select the terminal type for console
redirection. The options are VT100, ANSI and VT-UTF8.
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VT-UTF8 Combination Key Support
Select Enabled to activate the VT-UTF8 Combination Key Support for
ANSI/VT 100 Terminals. The options are Enabled and Disabled.
XUSB Configuration
USB Function
Select Enabled to enable 4 USB Ports. The options are Disabled and
Enabled.
Legacy USB Support
Select "Enabled" to enable the support for USB Legacy. Disable legacy
support if there are no USB devices installed in the system. The options
are Disabled, Enabled and Auto.
USB 2.0 Controller
This setting allows you to enable or disable USB 2.0 Controller. The options
are Disabled or Enabled.
USB 2.0 Controller Mode
This setting allows you to configure USB 2.0 Controller Mode. The
options are Hi-Speed (480 Mbps) or Full Speed-12Mbps.
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Chapter 4: AMI BIOS
XSystem Health Monitor
This feature allows the AMI BIOS to automatically display the status of the
following items:
CPU Overheat Temperature
The feature allows the user to set the CPU overheat temperature
threshold. The options range from 65oC to 90oC. The default setting is
"
78oC. (*See the note below.)
If System Health Function is enabled, BIOS will automatically display the
status of the following items:
CPU1 Temperature, CPU2 Temperature, System Temperature
The AMI BIOS will automatically display the following information:
CPU1 VCORE/CPU2 VCORE (*for 2U systems), 3.3V Vcc(V), +5 Vin, 12V Vcc(V), 12V Vcc (V), DRAM VTT, 1.2V Vcc, DIMM Voltage, 1.5V Voltage, 5V Standby and
3.3V Standby.
Fan Speed Control Modes: (Fan 1 to Fan 6)
This feature allows the user to decide how the system controls the speeds
of the onboard fans. If the option is set to 3-pin Server, the fan speed is
controlled by the CPU temperature. When the CPU temperature is higher,
the fan speed will be higher as well. If this option is set to 4-pin, the
onboard fan speeds are controlled by Thermal Management via PWM. If set
to Disable, the fan speed control is disabled and the onboard fan will run
at full speed (12V) at all time. Select 3-pin if your chassis came with 3-pin
fan headers. Select 4-pin if your chassis came with 4-pin fan headers.
Select Server if your system is used as a server. Select Workstation if your
system is used a Workstation. The Options are: Disable, 3-pin Server, 3pin Workstation, 4-pin Server and 4-pin Workstation.
*Note: In the Windows environment, the Supero Doctor III settings take
precedence over the BIOS settings. When first installed, Supero Doctor III
adopts the temperature threshold settings previously set in the BIOS. Any
subsequent changes to these thresholds must be made within Supero Doctor, since the SDIII settings override the BIOS settings. For the Windows OS
to adopt the BIOS temperature threshold settings, please change the SDIII to
be the same as those set in the BIOS.
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XX
XBoot Settings Configuration
XX
This item allows the user to configure the boot settings for the system.
Quick Boot
Select Enabled to allow the AMI BIOS to skip certain test during POST in
order to shorten the time needed for the system to bootup. The options are
Enabled, and Disabled.
Quiet Boot
Set this value to allow the boot up screen options to be modified between
POST messages or OEM logo. The default setting is Enabled. Select Disabled to allow the computer system to display the POST messages. Select
Enabled to allow the computer system to display the OEM logo.
Add-On ROM Display Mode
Set this option to display add-on ROM (read-only memory) messages. The
default setting is Force BIOS. Select "Force BIOS" to allow the computer
system to force a third party BIOS to display during system boot. Select
"Keep Current" to allow the computer system to display BIOS information
during system boot. The options are Force BIOS and Keep Current.
Boot up Num-Lock
Set this value to allow the Number Lock setting to be modified during boot
up. The default setting is On. The options are On and Off.
PS/2 Mouse Support
Set this value to allow the PS/2 mouse support to be modified. The options
are Auto, Enabled and Disabled.
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Chapter 4: AMI BIOS
Wait for ‘F1’ If Error
Select Enable to activate the function of Wait for F1 if Error. The options
are Enabled and Disabled.
Hit ‘DEL’ Message Display
Select Enabled to display Setup Message when the user hits the DEL key.
The options are Enabled and Disabled.
Interrupt 19 Capture
Select Enabled to allow ROMs to trap Interrupt 19. The options are Enabled
and Disabled.
Quiet Boot-Progress Bar
Select Enabled to display a graphic representation to show the progress of
POST when the option of Quiet Boot is enabled first. The options are
Enabled and Disabled.
XBoot Device Priority
This feature allows the user to specify the sequence of priority for the Boot
Device.
The settings are "1st Floppy Drive", "CD ROM", "HDD", and "Disabled." The
default settings are:
· 1st boot device –1st Floppy Drive
· 2nd boot device – CD ROM
· 3rd boot device – HDD
· 4th boot device – MBA V7.6.3 (Slot 1)
· 5th boot device – MBA V7.6.3 (Slot 2)
X
Hard Disk Drives
This feature allows the user to specify the Boot sequence from available
Hard Drives.
1st Drive/2nd Drive
Specify the boot sequence for 1st Hard Drive. The options are HDD and
Disabled.
XRemovable Drives
This feature allows the user to specify the Boot sequence from available
Removable Drives.
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1st Drive
Specify the boot sequence for 1st Removable Drive. The options are
1st Floppy Drive and Disabled.
XCD/DVD Drives
This feature allows the user to specify the boot sequence from available
CDROM Drives.
1st Drive
Specify the boot sequence for 1st Hard Drive. The options are CD ROM
and Disabled.
4-5Security Settings
AMI BIOS provides a Supervisor and a User password. If you use both
passwords, the Supervisor password must be set first.
Change Supervisor Password
Select this option and press <Enter> to access the sub menu, and then,
type in the password.
Change User Password
Select this option and press <Enter> to access the sub menu, and then,
type in the password.
Clear User Password
Select this option and press <Enter> to access the sub menu. You can use
the sub menu to clear the user password.
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Chapter 4: AMI BIOS
Boot Sector Virus Protection
This option is near the bottom of the Security Setup screen. Select "Disabled" to deactivate the Boot Sector Virus Protection. Select "Enabled" to
enable boot sector protection. When "Enabled", the AMI BIOS displays a
warning when any program (or virus) issues a Disk Format command or
attempts to write to the boot sector of the hard disk drive. The options are
"Enabled" and "Disabled".
4-6Exit Options
Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit
the BIOS Setup screen.
Saving Changes and Exit
When you have completed the system configuration changes, select this
option to leave the BIOS Setup and reboot the computer, so the new
system configuration parameters can take effect. Select Save Changes and
Exit from the Exit menu and press <Enter>.
Discard Changes and Exit
Select this option to quit the BIOS Setup without making any permanent
changes to the system configuration and reboot the computer. Select Discard Changes and Exit from the Exit menu and press <Enter>.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to
the AMI BIOS Utility Program.
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Load Optimal Defaults
To set this feature, select Load Optimal Defaults from the Exit menu and
press <Enter>. Then, Select "OK" to allow the BIOS to automatically load
Optimal Defaults to the BIOS Settings. The Optimal settings are designed for
maximum system performance, but may not work best for all computer applications.
Load Fail-Safe Defaults
To set this feature, select Load Fail-Safe Defaults from the Exit menu and
press <Enter>. The Fail-Safe settings are designed for maximum system
stability, but not maximum performance.
4-24
Appendix A: AMIBIOS Error Beep Codes
Appendix A
BIOS Error Beep Codes and DS7/DS8 LED POST
Codes
During the POST (Power-On Self-Test) routines, which are performed
each time the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to
continue the boot-up process. The error messages normally appear on
the screen.
Fatal errors are those which will not allow the system to continue the
boot-up procedure. If a fatal error occurs, you should consult with your
system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible
beeps. The numbers on the fatal error list, on the following page,
correspond to the number of beeps for the corresponding error. All
errors listed, with the exception of Beep Code 8, are fatal errors.
POST codes may be read on the debug LEDs located beside the LAN port
on the motherboard backplane. See the description of the Debug LEDs
(LED1 and LED2) in Section 2-6.
A-1AMIBIOS Error Beep Codes
Beep CodeError MessageDescription
1 beepRefreshCircuits have been reset.
(Ready to power up.)
5 short, 1 longMemory errorNo memory detected in
system
8 beepsDisplay memory read/write errorVideo adapter missing or
with faulty memory
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X6DAL-B2/X6DAL-TB2 User’s Manual
A-2DS7/DS8 LED Post Codes
LED IndicatorsDescription/Message
DS7DS8
OnOnPWR On
OnOffSPD Read OK
Of fOnMemory Size-OK
OffOffStarting Bus Initialization
A-2
Appendix B: BIOS POST Checkpoint Codes
Appendix B
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O
port 0080h. If the computer cannot complete the boot process, diagnostic equipment
can be attached to the computer to read I/O port 0080h.
B-1Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
CheckpointCode Description
D0hThe NMI is disabled. Power on delay is starting. Next, the initialization
code checksum will be verified.
D1hInitializing the DMA controller, performing the keyboard controller
BAT test, starting memory refresh, and entering 4 GB flat mode next.
D3hStarting memory sizing next.
D4hReturning to real mode. Executing any OEM patches and setting the
Stack next.
D5hPassing control to the uncompressed code in shadow RAM at
E000:0000h. The initialization code is copied to segment 0 and control
will be transferred to segment 0.
D6hControl is in segment 0. Next, checking if <Ctrl> <Home> was pressed
and verifying the system BIOS checksum. If either <Ctrl> <Home>
was pressed or the system BIOS checksum is bad, next will go to
checkpoint code E0h. Otherwise, going to checkpoint code D7h.
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X6DAL-B2/X6DAL-TB2User’s Manual
B-2Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
CheckpointCode Description
E0hThe onboard floppy controller if available is initialized. Next,
beginning the base 512 KB memory test.
E1hInitializing the interrupt vector table next.
E2hInitializing the DMA and Interrupt controllers next.
E6hEnabling the floppy drive controller and Timer IRQs. Enabling internal
cache memory.
EdhInitializing the floppy drive.
EehLooking for a floppy diskette in drive A:. Reading the first sector of
the diskette.
EfhA read error occurred while reading the floppy drive in drive A:.
F0hNext, searching for the AMIBOOT.ROM file in the root directory.
F1hThe AMIBOOT.ROM file is not in the root directory.
F2hNext, reading and analyzing the floppy diskette FAT to find the
clusters occupied by the AMIBOOT.ROM file.
F3hNext, reading the AMIBOOT.ROM file, cluster by cluster.
F4hThe AMIBOOT.ROM file is not the correct size.
F5hNext, disabling internal cache memory.
FBhNext, detecting the type of flash ROM.
FChNext, erasing the flash ROM.
FDhNext, programming the flash ROM.
FFhFlash ROM programming was successful. Next, restarting the
system BIOS.
B-3Uncompressed Initialization Codes
The following runtime checkpoint codes are listed in order of execution.
These codes are uncompressed in F0000h shadow RAM.
CheckpointCode Description
03hThe NMI is disabled. Next, checking for a soft reset or a power on
condition.
05hThe BIOS stack has been built. Next, disabling cache memory.
06hUncompressing the POST code next.
07hNext, initializing the CPU and the CPU data area.
08hThe CMOS checksum calculation is done next.
0AhThe CMOS checksum calculation is done. Initializing the CMOS status
register for date and time next.
0BhThe CMOS status register is initialized. Next, performing any required
B-2
Appendix B: BIOS POST Checkpoint Codes
initialization before the keyboard BAT command is issued.
0ChThe keyboard controller input buffer is free. Next, issuing the BAT
command to the keyboard controller.
0EhThe keyboard controller BAT command result has been verified.
Next, performing any necessary initialization after the keyboard
controller BAT command test.
0FhThe initialization after the keyboard controller BAT command test is
done. The keyboard command byte is written next.
10hThe keyboard controller command byte is written. Next, issuing the
Pin 23 and 24 blocking and unblocking command.
11hNext, checking if <End or <Ins> keys were pressed during power on.
Initializing CMOS RAM if the Initialize CMOS RAM in every boot
AMIBIOS POST option was set in AMIBCP or the <End> key was
pressed.
12hNext, disabling DMA controllers 1 and 2 and interrupt controllers 1 and
2.
13hThe video display has been disabled. Port B has been initialized. Next,
initializing the chipset.
14hThe 8254 timer test will begin next.
19hThe 8254 timer test is over. Starting the memory refresh test next.
1AhThe memory refresh line is toggling. Checking the 15 second on/off
time next.
2BhPassing control to the video ROM to perform any required configu-
ration before the video ROM test.
2ChAll necessary processing before passing control to the video ROM
is done. Looking for the video ROM next and passing control to it.
2DhThe video ROM has returned control to BIOS POST. Performing any
required processing after the video ROM had control.
23hReading the 8042 input port and disabling the MEGAKEY Green
PC feature next. Making the BIOS code segment writable and
performing any necessary configuration before initializing the
interrupt vectors.
24hThe configuration required before interrupt vector initialization
has completed. Interrupt vector initialization is about to begin.
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X6DAL-B2/X6DAL-TB2User’s Manual
CheckpointCode Description
25hInterrupt vector initialization is done. Clearing the password if the
POST DIAG switch is on.
27hAny initialization before setting video mode will be done next.
28hInitialization before setting the video mode is complete. Configuring
the monochrome mode and color mode settings next.
2A hBus initialization system, static, output devices will be done next, if
present. See the last page for additional information.
2EhCompleted post-video ROM test processing. If the EGA/VGA
controller is not found, performing the display memory read/write
test next.
2FhThe EGA/VGA controller was not found. The display memory read/
write test is about to begin.
30hThe display memory read/write test passed. Look for retrace
checking next.
31hThe display memory read/write test or retrace checking failed.
Performing the alternate display memory read/write test next.
32hThe alternate display memory read/write test passed. Looking for
alternate display retrace checking next.
34hVideo display checking is over. Setting the display mode next.
37hThe display mode is set. Displaying the power on message next.
38hInitializing the bus input, IPL, general devices next, if present. See the
last page of this chapter for additional information.
39hDisplaying bus initialization error messages. See the last page of this
chapter for additional information.
3AhThe new cursor position has been read and saved. Displaying the
Hit <DEL> message next.
3BhThe Hit <DEL> message is displayed. The protected mode memory
test is about to start.
40hPreparing the descriptor tables next.
42hThe descriptor tables are prepared. Entering protected mode for the
memory test next.
43hEntered protected mode. Enabling interrupts for diagnostics mode
next.
44hInterrupts enabled if the diagnostics switch is on. Initializing data to
check memory wraparound at 0:0 next.
45hData initialized. Checking for memory wraparound at 0:0 and finding
the total system memory size next.
46hThe memory wraparound test is done. Memory size calculation has
been done. Writing patterns to test memory next.
47hThe memory pattern has been written to extended memory. Writing
patterns to the base 640 KB memory next.
B-4
Appendix B: BIOS POST Checkpoint Codes
CheckpointCode Description
48hPatterns written in base memory. Determining the amount of memory
below 1 MB next.
49hThe amount of memory below 1 MB has been found and verified.
Determining the amount of memory above 1 MB memory next.
4BhThe amount of memory above 1 MB has been found and verified.
Checking for a soft reset and clearing the memory below 1 MB for
the soft reset next. If this is a power on situation, going to checkpoint
4Eh next.
4ChThe memory below 1 MB has been cleared via a soft reset. Clearing
the memory above 1 MB next.
4DhThe memory above 1 MB has been cleared via a soft reset. Saving
the memory size next. Going to checkpoint 52h next.
4EhThe memory test started, but not as the result of a soft reset.
Displaying the first 64 KB memory size next.
4FhThe memory size display has started. The display is updated during
the memory test. Performing the sequential and random memory test
next.
50hThe memory below 1 MB has been tested and initialized. Adjusting
the displayed memory size for relocation and shadowing next.
51hThe memory size display was adjusted for relocation and shadow-
ing.
Testing the memory above 1 MB next.
52hThe memory above 1 MB has been tested and initialized. Saving
the memory size information next.
53hThe memory size information and the CPU registers are saved.
Entering real mode next.
54hShutdown was successful. The CPU is in real mode. Disabling the
Gate A20 line, parity, and the NMI next.
57hThe A20 address line, parity, and the NMI are disabled. Adjusting
the memory size depending on relocation and shadowing next.
58hThe memory size was adjusted for relocation and shadowing.
Clearing the Hit <DEL> message next.
59hThe Hit <DEL> message is cleared. The <WAIT...> message is
displayed. Starting the DMA and interrupt controller test next.
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X6DAL-B2/X6DAL-TB2User’s Manual
CheckpointCode Description
60hThe DMA page register test passed. Performing the DMA Controller
1 base register test next.
62hThe DMA controller 1 base register test passed. Performing the DMA
controller 2 base register test next.
65hThe DMA controller 2 base register test passed. Programming DMA
controllers 1 and 2 next.
66hCompleted programming DMA controllers 1 and 2. Initializing the 8259
interrupt controller next.
67hCompleted 8259 interrupt controller initialization.
7FhExtended NMI source enabling is in progress.
80hThe keyboard test has started. Clearing the output buffer and
checking for stuck keys. Issuing the keyboard reset command next.
81hA keyboard reset error or stuck key was found. Issuing the keyboard
controller interface test command next.
82hThe keyboard controller interface test completed. Writing the com-
mand byte and initializing the circular buffer next.
83hThe command byte was written and global data initialization has
completed. Checking for a locked key next.
84hLocked key checking is over. Checking for a memory size mismatch
with CMOS RAM data next.
85hThe memory size check is done. Displaying a soft error and checking
for a password or bypassing WINBIOS Setup next.
86hThe password was checked. Performing any required programming
before WINBIOS Setup next.
87hThe programming before WINBIOS Setup has completed.
Uncompressing the WINBIOS Setup code and executing the
AMIBIOS Setup or WINBIOS Setup utility next.
88hReturned from WINBIOS Setup and cleared the screen. Performing
any necessary programming after WINBIOS Setup next.
89hThe programming after WINBIOS Setup has completed. Displaying the
power on screen message next.
8BhThe first screen message has been displayed. The <WAIT...>
message is displayed. Performing the PS/2 mouse check and
extended BIOS data area allocation check next.
8ChProgramming the WINBIOS Setup options next.
8DhThe WINBIOS Setup options are programmed. Resetting the hard disk
controller next.
8FhThe hard disk controller has been reset. Configuring the floppy drive
controller next.
91hThe floppy drive controller has been configured. Configuring the hard
disk drive controller next.
B-6
Appendix B: BIOS POST Checkpoint Codes
CheckpointCode Description
95hInitializing the bus option ROMs from C800 next. See the last page of
this chapter for additional information.
96hInitializing before passing control to the adaptor ROM at C800.
97hInitialization before the C800 adaptor ROM gains control has com-
pleted. The adaptor ROM check is next.
98hThe adaptor ROM had control and has now returned control to BIOS
POST. Performing any required processing after the option ROM
returned control.
99hAny initialization required after the option ROM test has completed.
Configuring the timer data area and printer base address next.
9AhSet the timer and printer base addresses. Setting the RS-232 base
address next.
9BhReturned after setting the RS-232 base address. Performing any
required initialization before the Coprocessor test next.
9ChRequired initialization before the Coprocessor test is over. Initializing
the Coprocessor next.
9DhCoprocessor initialized. Performing any required initialization after
the Coprocessor test next.
9EhInitialization after the Coprocessor test is complete. Checking the
extended keyboard, keyboard ID, and Num Lock key next. Issuing the
keyboard ID command next.
A2 hDisplaying any soft errors next.
A3hThe soft error display has completed. Setting the keyboard typematic
rate next.
A4hThe keyboard typematic rate is set. Programming the memory wait
states next.
A5hMemory wait state programming is over. Clearing the screen and
enabling parity and the NMI next.
A7hNMI and parity enabled. Performing any initialization required before
passing control to the adaptor ROM at E000 next.
A8hInitialization before passing control to the adaptor ROM at E000h
completed. Passing control to the adaptor ROM at E000h next.
A9hReturned from adaptor ROM at E000h control. Performing any
initialization required after the E000 option ROM had control next.
AahInitialization after E000 option ROM control has completed. Displaying
the system configuration next.
AbhUncompressing the DMI data and executing DMI POST initialization
next.
B0hThe system configuration is displayed.
B1hCopying any code to specific areas.
00hCode copying to specific areas is done. Passing control to INT 19h
boot loader next.
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X6DAL-B2/X6DAL-TB2User’s Manual
Notes
B-8
Appendix C: Software Installation
Appendix C
Software Installation
After all the hardware has been installed, you must first configure the
Adaptec Embedded Serial ATA RAID Driver before you install the Windows
operating system. The necessary drivers are all included on the Supermicro
bootable CDs that came packaged with your motherboard.
C-1 Introduction to the Adaptec Embedded SATA RAID
Controller Driver
Serial ATA (SATA)
Serial ATA(SATA) is a physical storage interface. It uses a single cable with a
minimum of four wires to create a point-to-point connection between devices.
It is a serial link which supports SATA Transfer rates from 150MBps. Because
the serial cables used in SATA are thinner than the traditional cables used in
Parallel ATA(PATA), SATA systems have better airflow and can be installed in
smaller chassis than Parallel ATA. In addition, the cables used in PATA can
only extend to 40cm long, while Serial ATA cables can extend up to one meter.
Overall, Serial ATA provides better functionality than Parallel ATA.
Introduction to the Intel 6300ESB (Hance Rapids) I/O Controller Hub
Located in the South Bridge of the Intel E7525 Tumwater Chipset, the 6300ESB
(Hance Rapids) I/O Controller Hub provides the I/O subsystem with access to
the rest of the system. It supports 2-channel Ultra ATA/100 Bus Master IDE
controller (PATA) and two Serial ATA (SATA) Host Controllers, which support
up to two Serial ATA ports and up to two RAID drives. The 6300ESB (Hance
Rapids) I/O Controller Hub supports the following Parallel ATA (PATA) and
Serial (SATA) device configurations:
ATA Operate Mode
You can select from the following two modes: Combined Mode and Enhanced Mode.
Combined Mode:
In this mode, system BIOS assigns the traditional IRQ 14 and IRQ 15 for the
use of HDD. Up to 4 ATA devices are supported by this mode.
Within the Combined Mode, the following three modes are supported:
*Non-Combined Mode: Parallel ATA only:with the maximum of 4 devices
supported;
*Non-Combined Mode: Serial ATA only:with the maximum of 2 devices
supported;
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X6DAL-B2/X6DAL-TB2 User's Manual
*Combined Mode: SATA devices and PATA: with the support of 2 devices
each (total: 4 devices maximum). (For IDE/SATA configurations, please refer
to the table below.)
To configure SATA RAID for Operating Systems that support RAID
functions(--Windows, Red Hat & SuSe, Linux)
1. Select "Advanced Setting" from the AMI BIOS menu.
2. Select the IDE Configuration menu.
3. Change the IDE Configuration to "P-ATA Only."
4. Under the item-"Configure S-ATA as RAID", select "Yes".
5. Tap the <Esc> key and scroll down to "Exit". Select "Save and Exit" from
the "Exit" menu. Press the <Enter> key to save the changes and exit the
BIOS.
6. Once you've exited the BIOS Utility, the system will re-boot.
7. During the system startup, press the <Ctrl> and the <A> keys simultaneously to run the Adaptec RAID Configuration Utility when prompted by the
following message:
Press <Ctrl><A> for the Adaptec RAID Configuration Utility.
The Adaptec Embedded Serial ATA with HostRAID Controller Driver
Adaptec's Embedded Serial ATA RAID with HostRAID controller adds RAID
functionality to the Serial ATA I/O controller by supporting RAID 0 (Striping)
or RAID 1 (Mirroring) to enhance the industry's pioneer PCI-to-e host controller products. RAID striping (RAID 0) can greatly improve hard disk I/O
performance because of its capability in striping data across multiple drives.
RAID mirroring (RAID 1) allows the data to be simultaneously written to two
drives, so critical data is always available even if a single hard disk fails.
Due to the built-in functionality, the X6DAL-B2/X6DAL-TB2 is specially designed to keep pace with the increasing performance demands of computer systems by improving disk I/O throughput and providing data accessibility regardless of a single disk failure. By incorporating the Adaptec Embedded Serial ATA into the motherboard design, Supermicro's X6DAL-B2/
X6DAL-TB2 offers the user with the benefits of SATARAID without the high
costs associated with hardware RAID applications.
(*Note: For Adaptec's RAID Driver Installation Instructions, please refer to
the Adaptec RAID Controller User's Guide: "Emb_SA_RAID_UG.pdf" in the
CD that came with this motherboard. You can also download a copy of
Adaptec's User's Guide from our web site at www.supermicro.com.)
C-2
Appendix C: Software Installation
Using the Adaptec RAID Configuration Utility (ARC)
The Adaptec RAID Configuration Utility is an embedded BIOS Utility, including:
*Array Configuration Utility: Use this utility when you want to create, configure and manage arrays.
* Disk Utilities: Use this option to format or verify disks.
To run the Adaptec RAID Configuration Utility, you will need to enable the
RAID function in the system BIOS (refer to Chapter 4 for System BIOS
Configurations), and then, press the <Ctrl> and <A> keys simultaneously
when prompted to do so during the system startup. (Refer to the previous
page for detailed instructions.)
(*Note: To select an option, use the arrow keys to highlight the item and
then press the <Enter> key to select it. To return to the previous menu,
press the <ESC> key.)
A. Using the Array Configuration Utility (ACU)
The Array Configuration Utility (ACU) enables you to create, manage, and
delete arrays from the controller’s BIOS, add and delete spare drives, and
initialize drives. During the system startup, press <Ctrl> and <A> key
simultaneously, and the main menu will appear.
C-3
X6DAL-B2/X6DAL-TB2 User's Manual
Managing Arrays
Select this option to view array properties, and delete arrays. The following
sections describe the operations Of "Managing Arrays".
To select this option, use the arrow keys and the <enter> key to select
"Managing Arrays" from the main menu (as shown above).
C-4
Appendix C: Software Installation
Viewing Array Properties
To view the properties of an existing array:
1. At the BIOS prompt, press Ctrl+A.
2. From the ARC menu, select Array Configuration Utility (ACU).
3. From the ACU menu, select Manage Arrays (as shown on the previous
screen.)
4. From the List of Arrays dialog box, select the array you want to view
and press Enter.
The Array Properties dialog box appears, showing detailed information on
the array. The physical disks associated with the array are displayed here.
5. Press Esc to return to the previous menu.
Deleting Arrays
*Warning: Back up the data on an array before you delete it to prevent the
loss of data. Deleted arrays cannot be restored.
To delete an existing array:
1. Turn on your computer and press Ctrl+A when prompted to access the
ARC utility.
2. From the ARC main menu, select Array Configuration Utility (ACU).
3. From the ACU menu, select Manage Arrays.
4. Select the array you wish to delete and press Delete.
5. In the Array Properties dialog box, select Delete and press Enter. The
following prompt is displayed:
*Warning!! Deleting the array will render array unusable. Do you
want to delete the array?(Yes/No):
RAID 1 only—the following prompt is also displayed:
Deleting the partition will result in data loss! Do you also want to
delete the partition? (Yes/No):
6. Press Yes to delete the array or partition or No to return to the
previous menu.
7. Press Esc to return to the previous menu.
C-5
X6DAL-B2/X6DAL-TB2 User's Manual
Creating Arrays
Before creating arrays, make sure the disks for the array are connected
and installed in your system. Note that disks with no usable space, or disks
that are un-initialized are shown in gray and cannot be used. See the
section: Initializing Disk Drives.
To create an array:
1 Turn on your computer and press Ctrl+A when prompted to access the
ARC utility.
2 From the ARC menu, select Array Configuration Utility Main Menu
(ACU) (as shown on the first screen on page C-5).
3 From the ACU menu, select Create Array.
4 Select the disks for the new array and press Insert (as the screen shown
below).
(*Note: To deselect any disk, highlight the disk and press Delete.)
C-6
Appendix C: Software Installation
5 Press Enter when both disks for the new array are selected. The
Array Properties menu displays (as the screen shown below).
Assigning Array Properties
Once you've create a new array, you are ready to assign the properties to
the array.
*Caution: Once the array is created and its properties are assigned,
you cannot change the array properties using the ACU. You will need to
use the Adaptec Storage Manager - Browser Edition. (Refer to Adaptec's
User's Guide in the enclosed CD.)
To assign properties to the new array:
1. In the Array Properties menu (as shown in the screen below), select an
array type and press Enter.
Note that only the available array types: RAID 0, and RAID1, are displayed
on the screen. (*RAID 0 or RAID 1 requires two drives.)
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X6DAL-B2/X6DAL-TB2 User's Manual
2. Under the item "Arrays Label", type in an label and press Enter.
(*Note: The label shall not be more than 15 characters.)
3. For RAID 0, select the desired stripe size. (*Note: Available stripe sizes
are 16, 32, and 64 KB-default. It is recommended that you do not change
the default setting.)
4. The item: "Create RAID via" allows you to select between the different
creating methods for RAID 0 and RAID 1.
The following table gives examples of when each is appropriate.
Raid Level Create Via When Appropriate
RAID 0 No Init Creating a RAID 0 on new drives
RAID 0 Migrate
(*Note)
Creating a RAID 0 from one new drive and
one drive with data you wish to preserve
RAID 1 Build1 Any time you wish to create a RAID 1, but especially if
you have data on one drive that you wish to preserve
RAID 1 Clear Creating a RAID 1 on new drives, or when you want to
ensure that the array contains no data after creation.
RAID 1 Quick Init Fastest way to create a RAID 1.
Appropriate when using new drives
(*Note: If you select Migrate for RAID 0, or Build for RAID 1, you will be
asked to select the source drive. The contents of the source drive will be
preserved. However, the data on the new drive will be lost.)
C-8
Appendix C: Software Installation
5. When you are finished, press Done (as the screen shown below).
Notes:
1. Before adding a new drive to an array, back up any data contained on
the new drive. Otherwise, all data will be lost.
2. If you stop the Build or Clear process on a RAID 1 from ACU, you can
restart it by pressing Ctrl+R.
3. A RAID 1 created using the Quick Init option may return some data miscompares if you later run a consistency check. This is normal and is not a
cause for concern.
4. The ACU allows you to use drives of different sizes in a
RAID . However, during a build operation, only the smaller drive can be
selected as the source or first drive.
5. When migrating from single volume to RAID 0, migrating from a larger
drive to a smaller drive is allowed. However, the destination drive must be
at least half the capacity of the source drive.
6. Adaptec does not recommend that you migrate or build an array on
Windows dynamic disks (volumes), as it will result in data loss.
Warning: Do not interrupt the creation of a RAID 0 using the Migrate option.
If you do, you will not be able to restart, or to recover the data that was on
the source drive.
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X6DAL-B2/X6DAL-TB2 User's Manual
Adding a Bootable Array
To make an array bootable:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the array you want to make bootable, andpress Ctrl+B.
3. Enter Y to create a bootable array when the following message is displayed:
"This will make all other existing bootable array non-bootable. Do you want to
make this array bootable? (Yes/No):" Then, a bootable array will be created.
An asterisk will appear next to the bootable array (as shown in the picture
below:)
Deleting a Bootable Array
To delete a bootable array:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the bootable array (*) you want to delete, and
press Ctrl+B. (* a bootable array is the array marked with an asterisk (as
shown in the picture above.)
3. Enter Y to delete a bootable array when the following message is displayed:
"The array is already marked bootable. Do you want to make this array as not
bootable? (Yes/No):" Then, the bootable array will be deleted and the asterisk
will disappear.
(*Note: do not use the delete key to delete the bootable array.)
C-10
Appendix C: Software Installation
Initializing Disk Drives
If an installed disk does not appear in the disk selection list for creating a
new array, or if it appears grayed out, you may have to initialize it before
you can use it as part of an array. Drives attached to the controller must be
initialized before they can be used in an array.
Caution: Initializing a disk overwrites the partition table on the disk and
makes any data on the disk inaccessible. If the drive is used in an array,
you may not be able to use the array again.
Do not initialize a disk that is part of a boot array. To determine which
disks are associated with a particular array, please refer to the section:
Viewing Array Properties.
To initialize drives:
1. Turn on your computer and press Ctrl+A when prompted to access
the ARC utility.
2. From the ARC menu, select Array Configuration Utility (ACU) (as
shown in the screen below).
3. Select Initialize Drives (as shown in the screen below).
C-11
X6DAL-B2/X6DAL-TB2 User's Manual
4. Use the up and down arrow keys to highlight the disk you wish to
initialize and press Insert (as shown in the screen below).
C-12
Appendix C: Software Installation
5. Repeat Step 4 so that both drives to be initialized are selected (as shown
in the screen below).
6. Press Enter.
7. Read the warning message as shown in the screen.
8. Make sure that you have selected the correct disk drives to initialize. If
If an array Build process (or initialization) is interrupted or with one critical
member missing, you must perform a Rebuilding to optimalize the performance. For a critical array Rebuild operation, the optimal drive is the source
drive.
*Note 2: If no spare array exists and a hard disk drive fails, you need to
create a spare before you can rebuild an array.
To Rebuild an array:
1 From the Main Menu, select Manage Arrays (as shown in the screen
below). From the List of Arrays, select the array you want to Rebuild.
2 Press Ctrl+R to Rebuild.
C-14
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