Supermicro X11DPH-Tq, X11DPH-i, X11DPH-T, X11DPi-N, X11DPi-NT User Manual

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X11DPH-i
X11DPH-T
X11DPH-Tq
USER’S MANUAL
Revision 1.0
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The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:
For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/ or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0
Release Date: August 2, 2017
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2017 by Super Micro Computer, Inc. All rights reserved.
Printed in the United States of America
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Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians, and knowledgeable end users. It provides information for the installation and use of the X11DPH-i/T(q) motherboard.
About This Motherboard
The Super X11DPH-i/X11DPH-T/X11DPH-Tq motherboard supports dual Intel® Xeon 81xx/61xx/51xx/41xx/31xx Series processors (Socket P) with the TDP (Thermal Design Power) of up to 205W and UPI (UltaPath Interconnect) of up to 10.4 GT/s. With the Intel C622/C624/C628 PCH built-in (Note below), this motherboard supports three PCI-E 3.0 x16 slots, four PCI-E 3.0 x8 slots, two PCI-E 3.0 x4 M.2 slots, ten SATA3 ports, seven USB 3.0 connections, and up to 2TB of LRDIMM/RDIMM/NVDIMM DDR4 ECC 2666/2400/2133 MHz memory in 16 memory slots. The X11DPH-i/T(q) provides maximum system performance, system cooling, and I/O expansion capability currently available on the market. This motherboard is optimized for general-purpose, high-performance computing, and is ideal for use as a storage server. Please note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at http://www.supermicro.com/products/.
Note: Intel C622 is used for X11DPH-i, C624: is for X11DPH-T, and C628: for X11DPT­Tq.
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Manual organization
Chapter 1 describes the features, specications and performance of the motherboard, and
provides detailed information on the Intel C622/C624/C628 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the processor, memory modules and other hardware components into the system.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for video, memory and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information on running the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C lists standardized warning statements in various languages.
Appendix D contains UEFI BIOS Recovery instructions.
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Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Website: www.supermicro.com
Europe
Contacting Supermicro
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Website: www.supermicro.nl
Asia-Pacic
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: support@supermicro.com.tw
Website: www.supermicro.com.tw
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Table of Contents
Chapter 1 Introduction
1.1 Checklist ...............................................................................................................................9
1.2 Processor and Chipset Overview .......................................................................................19
1.3 Special Features ................................................................................................................20
1.4 System Health Monitoring ..................................................................................................20
1.5 ACPI Features ....................................................................................................................21
1.6 Power Supply .....................................................................................................................21
1.7 Super I/O ............................................................................................................................21
1.8 Advanced Power Management ..........................................................................................22
Intel® Intelligent Power Node Manager (IPNM).................................................................22
Management Engine (ME) ................................................................................................22
Chapter 2 Installation
2.1 Static-Sensitive Devices .....................................................................................................23
Precautions .......................................................................................................................23
Unpacking .........................................................................................................................23
2.2 Motherboard Installation .....................................................................................................24
Tools Needed ....................................................................................................................24
Location of Mounting Holes ..............................................................................................24
Installing the Motherboard.................................................................................................25
2.3 Processor and Heatsink Installation ...................................................................................26
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors ...................................................26
Overview of the Processor Socket Assembly ...................................................................27
Overview of the Processor Heatsink Module (PHM) ........................................................28
Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the
Processor Package Assembly ...........................................................................................29
Attaching the F Model Processor to the Narrow Processor Clip to Create the Processor
Package Assembly ............................................................................................................30
Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM) ...................................................................................31
Attaching the F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM) ...................................................................................32
Preparing the CPU Socket for Installation ........................................................................33
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Table of Contents
Removing the Dust Cover from the CPU Socket .............................................................33
Installing the Processor Heatsink Module (PHM) ............................................................34
Installing an HFI Carrier Card for Host Fabric Interface (HFI) Support as Needed
(Available when an F Model CPU is Used) ......................................................................35
Removing the Processor Heatsink Module (PHM) from the Motherboard .......................36
2.4 Memory Support and Installation .......................................................................................37
Memory Support ................................................................................................................37
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx Series Processors ..38
DIMM Installation ..............................................................................................................41
DIMM Removal .................................................................................................................41
2.5 Rear I/O Ports ....................................................................................................................42
2.6 Front Control Panel ............................................................................................................47
2.7 Connectors .........................................................................................................................52
Power Connector ..............................................................................................................52
Headers .............................................................................................................................54
Host Fabric Interface (HFI) Carrier Card Sideband Header (for the F Model CPU Only) 55
2.8 Jumper Settings .................................................................................................................63
How Jumpers Work ...........................................................................................................63
2.9 LED Indicators ....................................................................................................................68
Chapter 3 Troubleshooting
3.1 Troubleshooting Procedures ..............................................................................................70
Before Power On ..............................................................................................................70
No Power ..........................................................................................................................70
No Video ...........................................................................................................................71
System Boot Failure .......................................................................................................71
Memory Errors ..................................................................................................................71
Losing the System's Setup Conguration .........................................................................72
When the System Becomes Unstable ..............................................................................72
3.2 Technical Support Procedures ...........................................................................................74
3.3 Frequently Asked Questions ..............................................................................................75
3.4 Battery Removal and Installation .......................................................................................76
Battery Removal ................................................................................................................76
Proper Battery Disposal ....................................................................................................76
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Battery Installation .............................................................................................................76
3.5 Returning Merchandise for Service ....................................................................................77
Chapter 4 BIOS
4.1 Introduction .........................................................................................................................78
Starting the Setup Utility ...................................................................................................78
4.2 Main Setup .........................................................................................................................79
4.3 Advanced Setup Congurations .........................................................................................81
4.4 Event Logs .......................................................................................................................108
4.5 IPMI ..................................................................................................................................110
4.6 Security Settings ..............................................................................................................113
4.7 Boot Settings ....................................................................................................................116
4.8 Save & Exit .......................................................................................................................119
Appendix A BIOS Codes
Appendix B Software Installation
B.1 Installing Software Programs ...........................................................................................124
B.2 SuperDoctor® 5 .................................................................................................................125
Appendix C Standardized Warning Statements
Battery Handling ..............................................................................................................126
Product Disposal .............................................................................................................128
Appendix DUEFI BIOS Recovery
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Chapter 1: Introduction
Chapter 1
Introduction
Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance.
In addition to the motherboard, several important parts that are included with your shipment are listed below. If anything listed is damaged or missing, please contact your retailer.
1.1 Checklist
Main Parts List
Description Part Number Quantity
Supermicro motherboard-X11DPH-i MNL- 1
SATA cables CBL-0044L (x2) 2
I/O Backplane MCP-260-00042-ON 1
Important Links
For your system to work properly, please follow the links below to download all necessary drivers/utilities and the user’s manual for your server.
Supermicro product manuals: http://www.supermicro.com/support/manuals/
Product drivers and utilities: ftp://ftp.supermicro.com
Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
If you have any questions, please contact our support team at: support@supermicro.com
This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Figure 1-1. X11DPH-i/T(q) Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
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Chapter 1: Introduction
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
BIOS
I-SATA 0~3
I-SATA 4~7
BMC
LEDM1
AST2500
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JIPMB1
LE3
CPU1 SLOT3 PCI-E 3.0 x8
JNCSI
+
Intel PCH
JSDCARD1
CPU2 SLOT4 PCI-E 3.0 x16
Battery
BT1
JHFI1
JBT1
LAN
CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1-HSSI GPIO
MH4
X11DPH-i
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
REV: 1.01
MH11
LE1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
CPU1 SLOT6 PCI-E 3.0 x8
JHSSI
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BAR CODE
JUIDB1
BIOS LICENSE
VGA
FAN5
LAN2
LAN1
USB 2/3(3.0)
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA1
P1-DIMMA2
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD1
P2-DIMMF1
P2-DIMME1
JPWR4
JPWR2
USB 4/5(3.0)
JSD2
JSD1
IPMI CODE
FAN4 FAN3
JL1
S-SATA0
S-SATA1
SATA1
SATA2
FANB
JSTBY1
JRK1
FANA
11
CPU1
JPI2C1
LE2
FAN2
JPWR3
JF1
JPWR1
FAN1
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
FANB
JPL1
JTPM1
JPME2
USB6 (3.0)
JPME1
JD1
JIPMB1
JP4
BT1
M.2-C1
M.2-C2
LE3
LE4
JWD1
JVRM1 JVRM2
JP2
T-SGPIO1
JBT1
I-SATA 0~3
I-SATA 4~7
USB4/5 (3.0)
JSD2
JSD1
S-SATA1
S-SATA0
JL1
LEDM1
SLOT1
JPG1
JPG1
JPL1
JTPM1
JPME2
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
USB 4/5(3.0)
JSD1
S-SATA1
SATA2
JL1
FANB
Figure 1-2. X11DPH-i/T(q) Motherboard Layout
(not drawn to scale)
SLOT7
SLOT6
LAN
CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
FAN6
VGA
LE1
JUIDB1
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
P1-DIMMD2
FAN5
LAN2
LAN1
VGA
FAN5
LAN1
LAN2
CPU1
CPU1
JNCSI
SLOT2
BMC
LEDM1
AST2500
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT1 PCI-E 3.0 x8
JPME1
JIPMB1
LE3
BIOS
I-SATA 0~3
JSD2
Intel PCH
S-SATA0
JSTBY1
JRK1
FANA
I-SATA 4~7
SATA1
JSTBY1
JRK1
FANA
JSDCARD1
SLOT3
JSDCARD1
CPU1 SLOT3 PCI-E 3.0 x8
JNCSI
Battery
+
BT1
FAN4 FAN3
FAN4
FAN3
SLOT5
SLOT4
CPU2 SLOT4 PCI-E 3.0 x16
MH4
MH11
JHFI1
JBT1
IPMI CODE
USB2/3 (3.0)
IPMI LAN
USB0/1 (3.0)
USB 2/3(3.0)
IPMI_LAN USB 0/1(3.0)
CPU2
P1-DIMMA1
P1-DIMMA2
P1-DIMMC1
P1-DIMMB1
FAN2
COM1
COM1
P2-DIMMD1
P2-DIMMD2
JPI2C1
JF1
LE2
FAN2
FAN1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JPWR1
FAN1
P2-DIMMF1
P2-DIMMD2 P2-DIMMD1 P2-DIMME1 P2-DIMMF1
CPU2
JHSSI
P2-DIMMC1
P2-DIMMB1 P2-DIMMA1 P2-DIMMA2
JHFI1
JPWR4
JPWR2
P1-DIMMA2 P1-DIMMA1 P1-DIMMB1 P1-DIMMC1
JPI2C1
JPWR3
JF1
LE2
JPWR1
Notes:
See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.
" " indicates the location of Pin 1.
Jumpers/LED indicators not documented in this user manual are reserved for internal
testing only.
Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
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Chapter 1: Introduction
Quick Reference Table
Jumper Description Default Setting
JBT1 CMOS Clear Open (Normal)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1 LAN1/LAN2 Enable Pins 1-2 (Enabled)
JPME1 ME Recovery Pins 1-2 (Normal)
JPME2 ME Manufacturing Mode Pins 1-2 (Normal)
JVRM1 VRM SMB Clock (to BMC or PCH) On (Normal: SMB Clock to BMC)
JVRM2 VRM SMB Data (to BMC or PCH) On (Normal: SMB Clock to BMC)
JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)
Connector Description
BT1 Onboard CMOS battery
COM1 COM port on the I/O back panel
FAN1~6, FANA/FANB System/cooling fan headers
IPMI_LAN Dedicated IPMI LAN port
I-SATA0~3, I-SATA4~7 SATA 3.0 Ports supported by the Intel PCH
JD1 Speaker header
JF1 Front control panel header
JHFI1 Host Fabric Interface (HFI) sideband connection header used for the HFI carrier card
JHSSI High-Speed Serial Interface (HSSI) card header
JIPMB1 4-pin External I2C Header (for an IPMI card)
JL1 Chassis intrusion header
JNCSI Network Controller Sideband Interface (NCSI) header
JPI2C1 Power I2C System Management Bus (SMBus) header
JPWR1, JPWR2, JPWR4 8-pin power supply connectors
JPWR3 24-pin ATX main power supply connector
JRK1 Intel RAID key for NVMe SDD
JSD1, JSD2 SATA DOM (Device-on-Module) power connectors
JSDCARD1 Micro SD card slot
JSTBY1 Standby power header
JTPM1 Trusted Platform Module (TPM)/Port 80 connector
JUIDB1 Unit Identier (UID) switch
LAN1, LAN2 10GbE LAN ports (for the X11DPH-T(q)) and Gigabit LAN ports (for the X11DPH-i)
M.2-C1, M.2-C2 M.2 slots
MH4, MH11 M.2 mounting holes
(CPU1) SLOT1, SLOT3,
SLOT6, SLOT7
PCI-Express 3.0 x8 Slots supported by CPU1
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Connector Description
(CPU2) SLOT2, SLOT4,
SLOT5
S-SATA0, S-SATA1 Powered SATA 3.0 ports with support of Supermicro SuperDOM (Disk-On-Module)
T-SGPIO1 Serial_Link General Purpose I/O (GPI/O) port
USB0/1, USB2/3 Back Panel Universal Serial Bus (USB) 3.0 ports
USB4/5 Internal USB 3.0 header with two USB (USB4/5) connections supported for front access
USB6 Type A USB 3.0 header for front access
VGA VGA port
LED Description Status
LE1 Unit Identier (UID) LED Solid Blue: Unit Identied
LE2 Onboard power LED Solid Green: Power On
LE3
LE4
LEDM1 BMC Heartbeat LED Blinking Green: BMC normal
PCI-Express 3.0 x16 Slot supported by CPU2
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Chapter 1: Introduction
Motherboard Features
Motherboard Features
CPU
Supports dual 81xx/61xx/51xx/41xx/31xx Series processors (Socket P); each processor supports an Intel® UltraPath
Interconnect (UPI) of up to 10.4 GT/s. (Note: X11DPH-Tq supports QAT)
Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer
to the block diagram on page 16 to determine which slots or devices may be affected.
Memory
Integrated memory controller supports up to 2TB of Registered DIMM (RDIMM), Load Reduced DIMM (LRDIMM), 3D
LRDIMM, Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC memory with speeds of up to 2666MHz in 16 slots.
DIMM Size
Up to 128GB at 1.2V
Note 1: Memory speed support depends on the processors used in the system.
Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/
motherboard.
Chipset
Intel C622/C624/C628 PCH (C622: is for X11DPH-i, C624 for X11DPH-T, and C628: X11DPT-Tq.)
Expansion Slots
Four (4) PCI-Express 3.0 X8 slots supported by CPU1 (SLOT1, SLOT3, SLOT6, SLOT7 3; No Slot1 for X11DPH-Tq)
Three (3) PCI-Express 3.0 X16 slots supported by CPU2 (SLOT2, SLOT4, SLOT5)
Baseboard Management Controller (BMC)
ASpeed AST2500 BMC with IPMI 2.0 support
Graphics
Graphics controller via ASpeed AST2500 BMC
Network Connection
Intel C628/x722 supports two 10 Gigabit LAN ports on the X11DPH-Tq
Intel C624/x722 supports two 10 Gigabit LAN ports on the X11DPH-T
Intel C622/x722 supports two Gigabit LAN ports (X11DPH-i)
One (1) Dedicated IPMI LAN located on the rear I/O panel
I/O Devices
Serial (COM) Port One (1) serial port on the rear I/O panel
SATA 3.0
RAID (PCH) • RAID 0, 1, 10
Eight (8) SATA 3.0 ports (I-SATA0~3, I-SATA4~7)
Two (2) SATA 3.0 ports with SATA DOM power (S-SATA0, S-SATA1)
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Motherboard Features
Peripheral Devices
Four (4) USB 3.0 ports on the I/O back panel (USB 0/1, USB2/3)
One (1) USB 3.0 header with two (2) USB connections for front access (USB4/5)
One (1) USB 3.0 Type A header (USB6)
BIOS
64MB SPI AMI BIOS® SM Flash UEFI BIOS
ACPI 3.0 or later, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, and SMBIOS 2.7 or later
Power Management
ACPI power management
SuperDoctor® 5
Power button override mechanism
Wake-on LAN
Power-on mode for AC power recovery
Intel® Intelligent Power Node Manager 4.0 (available when the Supermicro Power Manager [SPM] is installed and a
special power supply is used
Management Engine (ME)
System Health Monitoring
Onboard voltage monitoring for +1.8V, +3.3V, +5V, +/-12V, +3.3V Standby, +5V Standby, VBAT, HT, memory, PCH
temperature, system temperature, and memory temperature
6+1 CPU switch phase voltage regulator for CPU1
5+1 CPU switch phase voltage regulator for CPU2
CPU thermal trip support
Status monitor for speed control
Status monitor for on/off control
CPU Thermal Design Power (TDP) support of up to 165W
Fan Control
Fan status monitoring via IPMI connections
Eight 4-pin fan headers
Dual cooling zone
Low-noise fan speed control
Pulse Width Modulation (PWM) fan control
System Management
Trusted Platform Module (TPM) support
PECI (Platform Environment Control Interface) 2.0 support
System resource alert via SuperDoctor® 5
SuperDoctor® 5, Watch Dog, NMI, RoHS
Power supply monitoring
Chassis intrusion header and detection
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LED Indicators
CPU/Overheating
Power/Suspend-state indicator
Fan failure
UID/remote UID.
HDD activity
LAN activity.
Dimensions
13" (W) x 12" (L) (330.2 mm x 304.8 mm)
Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-
sis and heatsink specications for proper CPU TDP sizing.
Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.
Chapter 1: Introduction
Note 3: It is strongly recommended that you change BMC log-in information upon ini­tial system power-on. The manufacture default username is ADMIN and the password
is ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/ products/info/les/IPMI/Best_Practices_BMC_Security.pdf
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Figure 1-3.
System Block Diagram
SLOT 7 (HSSI)
SLOT 6 (HSSI)
RJ45
DDR4
BMC Boot Flash
BIOS
(OPTION)
* TBD
PCI-E x8
PCI-E x8
HSSI GPIO
10G 1G
10G 1G
LAN3
RTL8211E-VB-CG
VGA CONN
SPI
SPI
SLOT 3
#D-1
#D-0
#C-0
#B-0
#A-1
#A-0
DDR4
2133/2666
PCI-E X8/X8 G3 (Reversal)
M.2
M.2
PCI-E x8
SLOT 1
(QAT AOC)
RGRMII
BMC
AST2500
#F-0
#E-0
PCI-E x4/x4 G3
PCI-E x8 G3 (Reversal)
PCI-E x8
PCI-E x1
LAN
Intel X557-AT2 Marvell 88E1512
RMII/NCSI
Micro SDCard
COM1 Connector
PCI-E x1 G2
USB 2.0
ESPI
ESPI Header
VCCP0 12v
VR13 6+1 PHASE up to 255W
VCCP0
SNB CORE DDR4
SOCKET ID: 0
#3
#2C #1B/A
#2A/B
PCI-E x8 G3(Opt)
4x10G(Opt)
KR/KX/SFI
(QAT: Optional x16)
LBG-2E X8 UPLINK NO QAT (~17W)
LBG-4 X16 UPLINK NO QAT (~19W)
LBG-L X16 UPLINK QAT (~20W)
#5
#12 USB2.0
TPM HEADER
Debug Card
UPI
10.4/11.2G
P0
UPI
P1
DMI3
UPI
UPI
DMI3
PECI: 30
PCI-E x8 G3 (Opt x16)
PCH
BIOS
VCCP1 12v
VR13
5+1 PHASE
VCCP1
P1
SNB CORE
P0
DDR4
P2P2
#2
#1
PCI-E x16 G3
6.0 Gb/S
USB 2.0
USB 3.0
SPI
SYSTEM POWER
PECI: 31
SOCKET ID: 1
#3
DMI2
PCI-E x16 G3 (Reversal)
PCI-E x16 G3 (Reversal)
PCI-E x16
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
SATA
USB
Rear x4 Header x2 Type A x1
USB
SLOT 2
iPass 4x2 SuperDOM x2
#G-1
#G-0
DDR4
PCI-E x16
#M-0
#L-0
#K-1
#K-0
#J-0
#H-0
2133/2666
PCI-E x16
SLOT 4
SLOT 5
Temp Sensor
EMC1402-1 *2 at diff SMBUS
Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specications of your moth­erboard.
FRONT PANEL
18
FAN SPEED
CTRL
Page 19
Chapter 1: Introduction
1.2 Processor and Chipset Overview
Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx Series processors (Socket P) and the Intel C622/C624/C628 chipset (Note below), this motherboard
provides superb system performance, efcient power management, and a rich feature set
based on cutting edge technology to address the needs of next-generation computer users. With support of Intel® UltraPath Interconnect (UPI) of up to 10.4 GT/s, Intel® AVX-512 new instructions, and Intel® QuickAssist Technology, this motherboard offers an innovative solution with maximum system performance to meet the ongoing demands of High Performance Computing (HPC) platforms. This motherboard is optimized for general purpose server use.
The Intel Xeon 81xx/61xx/51xx/41xx/31xx Series processor and the Intel C622/C624/C628 chipset support the following features:
Intel® AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the
previous generation)
High availability interconnect between multiple nodes
Rich set of available IOs, full exibility in usage model, and software stack
Dedicated subsystems for customer innovation
Increased platform security with Intel® Boot Guard for hardware-based boot integrity pro-
tection; prevention of buffer overow class security threads
Integrated solution for real-time compression, streaming write & read performance in-
creases from gen-to-gen
Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)
Single standard server development (Accelerate NFV transition) consolidating application,
control, and data plane workloads, reducing total platform investment needs
Intel QuickAssist Technology off-loads compute-intensive tasks from cores
Note: Intel C622 is for X11DPH-i, C624 for X11DPH-T, and C628: X11DPT-Tq.
19
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
1.3 Special Features
This section describes the health monitoring features of the X11DPH-i/T(q) motherboard. The motherboard has an onboard ASpeed AST 2500 Baseboard Management Controller (BMC) that supports system health monitoring.
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.
1.4 System Health Monitoring
This section describes the health monitoring features of the X11DPH-i/T(q) motherboard. The motherboard has an onboard Baseboard Management Controller (BMC) chip that supports system health monitoring. Once a voltage becomes unstable, a warning is given or an error
message is sent to the screen. The user can adjust the voltage thresholds to dene the
sensitivity of the voltage monitor.
Onboard Voltage Monitors
The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage becomes unstable, it will give a warning or send an error message to the screen. The user
can adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time
readings of these voltage levels are all displayed in the BIOS.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via lPMI.
Environmental Temperature Control
System Health sensors in the BMC monitor the temperatures and voltage settings of onboard processors and the system in real time via the IPMI interface. Whenever the temperature of
the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be
turned on to prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate air-
ow to your system.
20
Page 21
Chapter 1: Introduction
System Resource Alert
This feature is available when used with Supermicro® SuperDoctor 5. SuperDoctor 5 is used
to notify the user of certain system events. For example, you can congure SuperDoctor 5 to
provide you with warnings when the system temperature, CPU temperatures, voltages and
fan speeds go beyond a predened range.
1.5 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes a exible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as network cards, hard disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, and an operating system-independent
interface for conguration control. ACPI leverages the Plug and Play BIOS data structures
while providing a processor architecture-independent implementation that is compatible with Windows 10, and Windows 2012 operating systems.
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. In areas
where noisy power transmission is present, you may choose to install a line lter to shield
the computer from noise. It is recommended that you also install a power surge protector to help avoid problems caused by power surges.
1.7 Super I/O
The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial communication port (UART), which supports serial infrared communication. The UART includes send/receive FIFO, a programmable baud rate generator, complete modem control capability, and a processor interrupt system. The UART provides legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, supporting higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power
Interface), which includes support of legacy and ACPI power management through a SMI or SCI function pin. It also features auto power management to reduce power consumption.
21
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
1.8 Advanced Power Management
The following new advanced power management features are supported by the motherboard.
Intel® Intelligent Power Node Manager (IPNM)
Intel's Intelligent Power Node Manager (IPNM) provides your system with real-time thermal
control and power management for maximum energy efciency. IPNM is available when the Supermicro Power Manager (SPM) is installed. Although IPNM Specication Version 2.0 or
3.0 is supported by the BMC (Baseboard Management Controller), your system must also
have IPNM-compatible Management Engine (ME) rmware installed to use this feature.
Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in the system.
Management Engine (ME)
The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides Server Platform Services (SPS) to your system. The services provided by SPS are different from those provided by the ME on client platforms.
22
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Chapter 2: Installation
Chapter 2
Installation
2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your motherboard and your system, it is important to handle it very carefully. The following
measures are generally sufcient to protect your equipment from ESD.
Precautions
Use a grounded wrist strap designed to prevent static discharge.
Touch a grounded metal object before removing the motherboard from the antistatic bag.
Handle the motherboard by its edges only; do not touch its components, peripheral chips,
memory modules or gold contacts.
When handling chips or modules, avoid touching their pins.
Put the motherboard and peripherals back into their antistatic bags when not in use.
For grounding purposes, make sure that your chassis provides excellent conductivity be-
tween the power supply, the case, the mounting fasteners, and the motherboard.
Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do
not install the CMOS battery upside down, which may result in a possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.
23
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
2.2 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Tools Needed
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
BIOS
I-SATA 0~3
I-SATA 4~7
BMC
LEDM1
AST2500
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JNCSI
JIPMB1
+
LE3
Intel
PCH
JSDCARD1
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
Battery
BT1
MH4
MH11
JHFI1
JBT1
LAN
CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Screws (9)
LE1
JUIDB1
VGA
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
Standoffs (9) as Needed
USB 2/3(3.0)
FAN5
LAN1
LAN2
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA1
P1-DIMMA2
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD1
P2-DIMME1
JPWR4
JPWR2
P2-DIMMF1
USB 4/5(3.0)
JSD2
JSD1
S-SATA0
S-SATA1
FANB
JSTBY1
JRK1
FANA
SATA1
SATA2
JL1
Location of Mounting Holes
Notes: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lb/inch on each mounting screw during motherboard installation.
2) Some components are very close to the mounting holes. Please take precautionary measures to avoid damaging these components when installing the motherboard to the chassis.
IPMI CODE
FAN4 FAN3
24
CPU1
JPI2C1
LE2
FAN2
JPWR3
JF1
JPWR1
FAN1
Page 25
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other motherboard components.
6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert Pan head #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed in this manual are for illustration only. Your chassis or components might look different from those shown in this manual.
25
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
2.3 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on the label
area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can cause serious damage to the CPU or motherboard which may result in RMA repairs. Please read and follow all instructions thoroughly before installing your CPU and heatsink.
Notes:
Always connect the power cord last, and always remove it before adding, removing, or
changing any hardware components. Please note that the processor and heatsink should
be assembled together rst to form the Processor Heatsink Module (PHM), and then install
the entire PHM into the CPU socket.
When you receive a motherboard without a processor pre-installed, make sure that the
plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise, contact your retailer immediately.
Refer to the Supermicro website for updates on CPU support.
Please follow the instructions given in the ESD Warning section on the rst page of this
chapter before handling, installing, or removing system components.
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors
Notes: 1. The 81xx/61xx/51xx/41xx/31xx processors contain two models: the F model
processors and the Non-F model processors. The installation instructions for the F mod­el processors differ from the installation instructions for the Non-F model processors. For this reason, two sets of instructions (one for the F model, and the other, for the Non­F model) are provided in this section. 2. If an F model CPU is used, be sure to installed in CPU Socket#1.)
Intel Processor (Non-F Model) Intel Processor (F Model)
Note: All graphics, drawings, and pictures shown in this manual are for illustration only.
The components that came with your machine may or may not look exactly the same as those shown in this manual.
26
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Chapter 2: Installation
Overview of the Processor Socket Assembly
The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx processor,
2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.
1. The 81xx/61xx/51xx/41xx/31xx Processor
(The 81xx/61xx/51xx/41xx/31xx Processor)
2. Narrow processor clip (the plastic processor package carrier used for the CPU)
3. Dust Cover
4. CPU Socket
(for the non-F Model)
Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-
stalled.
27
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Overview of the Processor Heatsink Module (PHM)
The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip, and 3) the 81xx/61xx/51xx/41xx/31xx processor.
1. Heatsink
2. Narrow processor clip
3. Intel Processor
4. Processor Heatsink Module (PHM)
Processor Heatsink Module (PHM)
(Bottom View for the non-F Model)
(Bottom View for the F Model)
Note: If an F model CPU is procrssor is used, be sure to install it on CPU Socket#1.
28
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Chapter 2: Installation
A
Allow Notch B to latch on to CPU
Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of the narrow processor clip. Once they are aligned, carefully insert the CPU into the processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor clip. Once the CPU is securely attached to the processor clip, the processor package assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD gloves when handling components.
CPU (Upside Down) w/CPU LGA Lands up
Align Notch B of the CPU and Notch B of the Processor Clip
Align CPU Pin 1
C
Align Notch C of the CPU and Notch C of the Processor Clip
B
Allow Notch C to latch on to CPU
A
Pin 1
C
C
B
CPU/Heatsink Package (Upside Down)
B
A
Processor Package Carrier (w/CPU mounted
on the Processor Clip)
29
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Attaching the F Model Processor to the Narrow Processor Clip to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of the narrow processor clip. Once they are aligned, carefully insert the CPU into the processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor clip. Once the CPU is securely attached to the processor clip, the processor package assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD gloves when handling components.
CPU (Upside Down) w/CPU LGA Lands up
Align Notch C of the CPU and Notch C of the Processor Clip
Align Notch B of the CPU and Notch B of the Processor Clip
C
B
Align CPU Pin 1
D
A
Pin 1
Align Notch D of the CPU and Notch D of the Processor Clip
D
C
B
CPU/Heatsink Package (Upside Down)
A
Allow Notch D to latch on to CPU
D
Processor Package Carrier (w/CPU mounted on the
Processor Clip)
30
Allow Notch C to latch on to CPU
Allow Notch B to latch on to CPU
C
B
A
Page 31
Chapter 2: Installation
Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the previous page, please follow the steps below to mount the processor package assembly onto the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index nger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal lm if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With the thermal-grease side facing up, locate the hollow triangle located at the corner of the processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting clicks located next to the hollow triangle. Also locate another set of mounting clicks and a larger hole at the diagonal corner of the same (reverse) side of the processor carrier assembly ("b" in the graphic).
3. With the back of heatsink and the reverse side of the processor package assembly facing up, align the triangular corner on the heatsink ("A" in the graphic) against the mounting clips next to the hollow triangle ("a") on the processor package assembly.
4. Also align the triangular corner ("B") at the diagonal side of the heatsink with the corresponding clips on the processor package assembly ("b").
Triangle on the CPU
Triangle on the Processor Clip
Non-Fabric CPU and Processor Clip
(Upside Down)
b
d
B
a
D
Heatsink
(Upside Down)
A
On Locations of (C, D), the notches
snap onto the heat sink’s
B
c
C
mounting holes
5. Once the mounting clips on the processor package assembly are properly aligned with the corresponding holes on the back of heatsink, securely attach the heatsink to the processor package assembly by snapping the mounting clips at the proper places on the heatsink to create the processor heatsink module (PHM).
31
D
A
On Locations (A, B), the notches snap onto the heatsink’s sides
C
Make sure Mounting
Notches snap into place
Page 32
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Attaching the F Model Processor Package Assembly to the Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the previous page, please follow the steps below to mount the processor package assembly onto the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index nger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal lm if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With the thermal-grease side facing up, locate the hollow triangle located at the corner of the processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting clicks located next to the hollow triangle. Also locate another set of mounting clicks and a larger hole at the diagonal corner of the same (reverse) side of the processor carrier assembly ("b" in the graphic).
Fabric CPU and Processor Clip
(Upside Down)
b
3. With the back of heatsink and the reverse side of the processor package assembly facing up, align the triangular corner on the heatsink ("A" in the graphic) against the mounting clips next to the hollow triangle ("a") on the processor package assembly.
4. Also align the triangular corner ("B") at the diagonal side of the heatsink with the corresponding clips on the processor package assembly ("b").
5. Once the mounting clips on the processor package assembly are properly aligned with the corresponding holes on the back of heatsink, securely attach the heatsink to the processor package assembly by snapping the mounting clips at the proper places on the heatsink to create the processor heatsink module (PHM).
Triangle on the CPU
Triangle on the Processor Clip
d
a
D
Heatsink
(Upside Down)
A
On Locations of (C, D), the notches
B
D
A
On Locations (A, B), the notches snap onto the heatsink’s sides
c
B
C
snap onto the heat sink’s
mounting holes
C
Make sure Mounting
Notches snap into place
32
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Chapter 2: Installation
Preparing the CPU Socket for Installation
This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate. These components are pre-installed on the motherboard before shipping.
CPU Socket w/Dust Cover On
Removing the Dust Cover from the CPU Socket
Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as shown on the illustration below.
Note: Do not touch the socket pins to avoid damaging them, causing the CPU to malfunction.
Dusk Cover
Remove the dust cover from
the CPU socket. Do not
touch the socket pins!
Socket Pins
CPU Socket
33
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Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Installing the Processor Heatsink Module (PHM)
1. Once you have assembled the processor heatsink module (PHM), you are ready to install the processor heatsink module (PHM) into the CPU socket on the motherboard. To install the PHM into the CPU socket, follow the instructions below.
2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the
corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,
turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow triangle located next to a screw at the corner. Turn the PHM right side up, and you will see a triangle marked on the processor clip at the same corner of hollow triangle.)
3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the CPU socket.
4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into the guiding posts.
5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the socket to securely attach the PHM onto the motherboard starting with the screw marked "1" (in the sequence of 1, 2, 3, and 4).
Note: Do not use excessive force when tightening the screws to avoid damaging the LGA-lands and the processor.
Oval C
Use a torque
Oval D
Large Guiding Post
T30 Torx Driver
of 12 lbf
#4
#1
#2
Small Guiding Post
Printed Triangle
Mounting the Processor Heatsink Module
into the CPU socket (on the motherboard)
#3
Tighten the screws in the
sequence of 1, 2, 3, 4 (top 3 quarter view)
34
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Chapter 2: Installation
B
Installing an HFI Carrier Card for Host Fabric Interface (HFI) Support as Needed (Available when an F Model CPU is Used)
Note: A host fabric interface carrier card header (JHFI1) is located on the motherboard.
Install an HFI card on an appropriate PCI-E slot of your choice on the motherboard and an F model CPU on CPU Socket#1 to use this feature. (For more information on the JHFI1 header, please refer to page 55.)
Installation Instructions
1. Locate CPU Socket 1 on the motherboard. Install an F model CPU on this socket as shown below (marked 1) if you have not done so.
2. Locate the PCI-E slots the motherboard. Install an Host Fabric Interface (HFI) card on an appropriate PCI-E slot of your choice as shown below (marked 2).
3. Connect the HFI connector on the HFI cable to the onboard JHFI1 header as show below (marked 3 below.)
4. Connect the other end of the HFI cable to the connector (marked A) on the HFI card as shown below. (Marked 4 below.)
5. Connect the plug (marked 5) on one end of the Internal_Faceplate_to_the_Processor (IFP) cable to the connector (marked ) on the HFI card as shown below.
B
6. Connect the other end of IFP cable (marked 6) to the F model CPU installed in CPU Socket 1 as shown below.
IFP Cable (Optional)
6
6. Connect the other end of the IFP cable to the F model CPU.
HFI Carrier
Card
4. Connect another end of the HFI cable to the connector (A) of the HFI card.
HFI (Host Fabric
Interface) Sideband
4
Cable
5
5. Connect one end of the IFP cable to the
A
connector (B) of the HFI card.
2. Install an HFI card to a PCI-E slot
2
JHFI1 Header (for CPU1)
3. Connect the HFI connector on the HFI cable to the
3
onboard JHFI1 header.
JPL1
JPME2
USB 6 (3.0)
JD1
M.2-C1
M.2-C2
LE4
JWD1
T-SGPIO1
SATA2
JL1
JPG1
JTPM1
CPU1 SLOT1 PCI-E 3.0 x8
JP4
JPCIE1_L
JVRM1
JVRM2
BIOS
I-SATA 0~3
I-SATA 4~7
USB 4/5(3.0)
JSD2
JSD1
S-SATA0
S-SATA1
SATA1
FANB
F Model
Processor
BMC
LEDM1
JSDCARD1
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU2 SLOT4 PCI-E 3.0 x16
JPME1
JNCSI
JIPMB1
Battery
+
BT1
JHFI1
JNVI2C2
JNVI2C1
LE3
Intel PCH
IPMI CODE
JSTBY1
JRK1
FAN4FAN3
FANA
MH4
MH11
JHFI1
JBT1
LAN CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
REV: 1.01
P2-DIMMD2
P2-DIMMD1
P2-DIMME1
P2-DIMMF1
Install an F model CPU
1
on CPU Socket#1
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
VGA
FAN5
CPU1
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
P2-DIMMA2
IPMI_LAN
USB 0/1(3.0)
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
COM1
P2-DIMMD2
JPI2C1
LE2
FAN2
P2-DIMMD1
JF1
35
JPWR4
JPWR2
JPWR3
JPWR1
P2-DIMME1
FAN1
P2-DIMMF1
Page 36
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Removing the Processor Heatsink Module (PHM) from the Motherboard
Before removing the processor heatsink module (PHM), unplug power cord from the power outlet.
1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,
1).
2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it from the socket.
Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.
#1
Removing the screws in
the sequence of 4, 3, 2, 1
#4
#2
#3
Printed Triangle on Motherboard
CPU Socket
After removing the screws,
lift the Processor Heatsink Module off the CPU socket.
36
Page 37
Chapter 2: Installation
2.4 Memory Support and Installation
Notes: Check the Supermicro website for recommended memory modules. Exercise
extreme care when installing or removing DIMM modules to prevent any damage.
Memory Support
The motherboard supports up to 2TB of Registered DIMM (RDIMM), Load Reduced DIMM (LRDIMM), 3D LRDIMM, Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz memory modules in 16 slots. The black DIMM slots are reserved for future NVDIMM
support. Populating the DDR4 memory module in 2DPC system conguration on this
motherboard will affect memory bandwidth performance. Populating these DIMM modules with a pair of memory modules of the same type and size will result in interleaved memory, which will improve memory performance.
Notes: 1. Be sure to use the memory modules of the same type and speed on the motherboard. Mixing of memory modules of different types and speeds is not allowed.
2. When installing memory modules, be sure to populate the rst DIMM module on the blue memory slot, which is the rst memory slot of a memory channel, and then populate the second DIMM in the black slot if 2DPC memory conguration is used. 3.
Using unbalanced memory topology by populating two DIMMs in one channel while populating one DIMM in another channel will result in reduced memory performance.
4. Memory speed is dependent on the type of processors used in your system. 5. Using unbalanced memory topology such as populating two DIMMs in one channel while populating one DIMM in another channel on the same motherboard will result in
reduced memory performance.
DDR4 Memory Support (for 2-Slot Per-Channel Conguration)
Ranks
DIMM Capacity
Type
RDIMM SRx4 8 GB 16 GB 2666 2666
RDIMM SRx8 4 GB 8 GB 2666 2666
RDIMM DRx8 8 GB 16 GB 2666 2666
RDIMM DRx4 16 GB 32 GB 2666 2666
RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666
RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666
LRDIMM QRx4 32 GB 64 GB 2666 2666
LRDIMM 3Ds
Per
DIMM
and Data
Width
QRX4 N/A 2H-64GB 2666 2666
8Rx4 N/A 4H-128 GB 2666 2666
(GB)
4 Gb 8 Gb 1.2 V 1.2 V
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
2 Slots per Channel
1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)
DDR4 Memory Support (for 1-Slot Per-Channel Conguration)
Ranks
DIMM Capacity
Type
RDIMM SRx4 8 GB 16 GB 2666
RDIMM SRx8 4 GB 8 GB 2666
RDIMM DRx8 8 GB 16 GB 2666
RDIMM DRx4 16 GB 32 GB 2666
RDIMM 3Ds QRX4 N/A 2H-64GB 2666
RDIMM 3Ds 8RX4 N/A 4H-128GB 2666
LRDIMM QRx4 32 GB 64 GB 2666
LRDIMM 3Ds
Per
DIMM
and Data
Width
QRX4 N/A 2H-64GB 2666
8Rx4 N/A 4H-128 GB 2666
(GB)
4 Gb 8 Gb 1.2 V
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
1 Slot per Channel
1DPC (1-DIMM per Channel)
37
Page 38
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx Series Processors
For optimal memory performance, follow the tables below when populating memory modules.
Key Parameters for DIMM Congurations
Parameters Possible Values
Number of Channels 1, 2, 3, 4, 5, or 6
Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)
DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM
DIMM Construction non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),
D (1RX8), E (2RX8)
3DS RDIMM Raw Cards: A/B (4RX4)
non-3DS LRDIMM Raw Cards: D/E (4RX4)
3DS LRDIMM Raw Cards: A/B (8RX4)
General Population Requirements
DIMM Mixing Rules
Please populate all memory modules with DDR4 DIMMs only.
X4 and X8 DIMMs can be mixed in the same channel.
Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across
different sockets.
Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across
different sockets.
Mixing of DIMM Types within a Channel
DIMM Types RDIMM LRDIMM 3DS LRDIMM
RDIMM Allowed Not Allowed Not Allowed
LRDIMM Not Allowed Allowed Not Allowed
3DS LRDIMM Not Allowed NotAllowed Allowed
38
Page 39
(DDR4 Only) Socket Level Population Requirements
DDR4 Socket Level Minimum Population Requirements
There should be at least one DDR4 DIMM per socket.
If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.
Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.
(DDR4 Only) Memory Populations with Possible Mixes
DDR4 RDIMM DIMM0/DIMM1
Within
IMC
DIMM
Popula-
tion
DDR0 x8, None, x8, x8 x4, None, x4, x4 x8, x4, or x4, x8 Single Rank, None
DDR1 None or same as
DDR2 None or same as
Cong. Set A
DDR0
DDR1 (excludes
DIMM 1 in 5DIMM
congurations)
(DDR4 Only) Memory Populations with Possible Mixes
3DS LRDIMM or 3DS RDIMM DIMM0/DIMM1 Cong. Set A Possible Mixes
Within IMC
DIMM Popu-
lation
DDR0 x4, None, x4, x4 Quad Rank, None
DDR1 None or same as DDR0
DDR2 None or same as DDR1
DIMM0/DIMM1
Cong. Set B
None or same as
DDR0
None or same as
DDR1 (excludes
DIMM 1 in 5DIMM
congurations)
DIMM0/DIMM1 Con-
g. Set C
None or same as
DDR0
None or same as
DDR1 (excludes DIMM
1 in 5DIMM congura-
tions)
DIMM0/DIMM1
Quad Rank, Quad Rank
Cannot mix 3DS LRDIMM and RDIMM
Single Rank, Single Rank
Dual Rank, Single Rank,
Dual Rank, Dual Rank,
Single Rank, Single Rank
Possible Mixes
DIMM0/DIMM1
Dual Rank, None
Chapter 2: Installation
LRDIMMs DIMM0/DIMM1 Possible Mixes
Within IMC
DIMM Popu-
lation
DIMM Population
within an IMC
(Note: Uniformly
populate with x8 DRAMs DIMMs)
DIMM Population
within an IMC
(Note: Non-equal
in rank pair of x8
DIMMs)
(DDR4 Only) Memory Populations with Possible Mixes
DIMM0/DIMM1
DDR0 x4, None, x4, x4 Quad Rank, None
DDR1 None or same as DDR0
DDR2 None or same as DDR1
Quad Rank, Quad Rank
Note: Requirements *Match DIMM types installed across DDR
channels within an IMC
*Always populate iMC0 rst
(DDR4 Only) 2SPC Memory Conguration with x8 DIMMs
Total # of
DIMMs
1 x8 DIMM Must be installed on iMC0 DDR Channel 0 1 N/A
2 x8 DIMMs DDR0: Populate with 1 DIMM
3 x8 DIMMs DDR0: Populate with 1 DIMM
4 x8 DIMMs DDR0: Populate with 2 DIMMs
5 x8 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-
DDR Channel 0, 1: DIMM1 is populated with identical
6 x8 DIMMs Populate 2 DIMMs per DDR channel x SVLS
1 pair of
DIMMs
2 pairs of
DIMMs
3 pairs of
DIMMs
2 pairs+1
(5DIMMs)
DDR1: Populate the second DIMM (for best perfor-
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate with identical DIMMs as DDR0
DDR2: DIMM0 is populated with identical DIMM as
DDR Channel Number
DDR1: Populate identically as DDR0
DDR1: Populate identically as DDR0 DDR2: Populate identically as DDR1
DDR1: Populate identically as DDR0
cal DIMMs,
DIMMs
DDR0: Populate with 1 DIMM
mance)
DDR1: Populate identically as DDR0
DDR1: Populate identically as DDR0 DDR2: Populate identically as DDR1
DDR1
of Ranks
>1 SVLS
1 N/A
>1 SVLS
1 N/A
>1 SVLS
x SVLS
>1 SVLS
1 N/A
>1 SVLS
1 N/A
>1 SVLS
x SVLS
>1 SVLS
Virtual
Lock Step
39
Page 40
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
(DDR4 Only) 2SPC Memory Conguration with x4 DIMMs
DIMM Popula­tion within an
IMC
Note: Uniformly
populate with x4
DRAMs/DIMMs
Total # of
DIMMs
1 x4 DIMM Must be installed on iMC0 DDR Channel 0 1 Y, only Bank VLS
2 x4 DIMMs DDR0: Populate with 1 DIMM
3 x4 DIMMs DDR0: Populate with 1 DIMM
4 x4 DIMMs DDR0: Populate with 2 DIMMs
5 x4 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-
DDR Channel 0, 1: DIMM1 is populated with identical
6 x4 DIMMs Populate 2 DIMMs per DDR channel x Y
DDR Channel Number
DDR1: Populate identically as DDR0
DDR1: Populate identically as DDR0 DDR2: Populate identically as DDR1
DDR1: Populate identically as DDR0
cal DIMMs,
DIMMs
of Ranks
Adaptive Virtual
Lock Step
>1 Y
1 Y, only Bank VLS
>1 Y
1 Y, only Bank VLS
>1 Y
x Y
>1 Y
DIMM Popula­tion within an
IMC
Note: Non-
equal in rank
pair of x4
DIMMs)
1 pair of
DIMMs
2 pairs of
DIMMs
3 pairs of
DIMMs
2 pairs+1
(5DIMMs)
DDR0: Populate with 1 DIMM
DDR1: Populate the second DIMM (for best perfor-
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0 DDR2: Populate identically as DDR1
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate with identical DIMMs as DDR0
DDR2: DIMM0 is populated with identical DIMM as
mance)
DDR1
>1 Y
>1 Y
x Y
>1 Y
(DDR4 Only) 2SPC Memory Conguration with x8/x4 DIMMs Mixed
DDR4 RDIMM Total # of DIMMs DDR Channel ADDC/SDDC
DIMM Popula­tion within an
IMC
1 pair of x8, x4 DDR0: Populate with 1 DIMM
2 pairs of x8, x4 Populate with 1 pair of DIMMs on DDR0,
3 pairs of x8, x4 A pair of DIMMs on DDR0, and identical pair on
DDR1: Populate the second DIMM (for best perfor-
mance)
and identical pair on DDR1
DDR1, and DDR2
Features
No
No
No
40
Page 41
Chapter 2: Installation
T-SGPIO1
JWD1
DIMM Installation
1. Insert DIMM modules in the following order: DIMMA1, DIMMB1, DIMMC1, DIMMD1, DIMME1, DIMMF1, DIMMA2, and DIMMD2. For the system to work properly, please use memory modules of the same type and speed on the motherboard.
2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.
3. Align the key of the DIMM module with the receptive point on the memory slot.
4. Align the notches on both ends of the module against the receptive points on the ends of the slot.
5. Use two thumbs together to press the notches on both ends of the module straight down into the slot until the module snaps into place.
6. Press the release tabs to the lock positions to secure the DIMM module into the slot.
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JVRM1
JVRM2
BIOS
I-SATA 0~3
I-SATA 4~7
USB 4/5(3.0)
JSD2
JSD1
S-SATA1
SATA1
SATA2
JL1
LEDM1
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JIPMB1
LE3
S-SATA0
JRK1
FANA
FANB
BMC
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
JNCSI
+
Intel PCH
JSTBY1
JSDCARD1
CPU2 SLOT4 PCI-E 3.0 x16
Battery
BT1
JHFI1
IPMI CODE
FAN4 FAN3
CPU2 SLOT5 PCI-E 3.0 x16
MH4
MH11
P1-DIMMF1
JBT1
LAN CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
JHSSI
P2-DIMMB1
P2-DIMMC1
MAC CODE
BAR CODE
LE1
JUIDB1
P2-DIMMA2
P2-DIMMA1
BIOS LICENSE
Notches
VGA
FAN5
USB 2/3(3.0)
LAN1
LAN2
CPU2
CPU1
P1-DIMMA2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA1
P1-DIMMB1
P2-DIMMD2
P1-DIMMC1
JPI2C1
FAN2
COM1
LE2
P2-DIMMD1
JF1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JPWR1
FAN1
P2-DIMMF1
DIMM Removal
Reverse the steps above to remove the DIMM modules from the motherboard.
41
Release Tabs
Page 42
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
2.5 Rear I/O Ports
See Figure 2-2 below for the locations and descriptions of the various I/O ports on the rear of the motherboard.
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
USB 4/5(3.0)
JSD1
S-SATA1
SATA2
JL1
LE3
BIOS
I-SATA 0~3
I-SATA 4~7
JSD2
S-SATA0
SATA1
JRK1
FANB
BMC
LEDM1
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JNCSI
JIPMB1
+
Intel PCH
JSTBY1
FANA
JSDCARD1
CPU2 SLOT4 PCI-E 3.0 x16
Battery
BT1
JHFI1
IPMI CODE
FAN4 FAN3
CPU2 SLOT5 PCI-E 3.0 x16
MH4
MH11
P1-DIMME1
P1-DIMMF1
JBT1
LAN CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
VGA
FAN5
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
P1-DIMMA2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA1
P1-DIMMB1
COM1
P2-DIMMD2
P1-DIMMC1
JPI2C1
LE2
FAN2
P2-DIMMD1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JF1
JPWR1
P2-DIMMF1
FAN1
Back panel I/O Port Locations and Denitions
4
6
1
3
5
7
98
10
2
Back Panel I/O Ports
No. Description No. Description
1. COM1 6. USB 3 (USB 3.0)
2. USB 0 (USB 3.0) 7. GLAN1 (X11DPH-i), 10G_LAN1 (X11DPH-T/X11DPH-Tq)
3. USB 1 (USB 3.0) 8. GLAN2 (X11DPH-i), 10G_LAN2 (X11DPH-T/X11DPH-Tq)
4. IPMI LAN 9. VGA
5. USB 2 (USB 3.0) 10. Unit Identier Switch (UID)
42
Page 43
Chapter 2: Installation
IPMI CODE
+
BIOS LICENSE
MAC CODE
X11DPH-i
REV: 1.01
BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
VGA Port
The onboard VGA port is located next to IPMI LAN port on the I/O back panel. Use this connection for VGA display.
Serial Port
There is one COM port (COM1) on the I/O back panel on the motherboard. The COM port
provides serial communication support. See the table below for pin denitions.
Pin# Denition Pin# Denition
1 DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A
1
2
43
1. VGA Port
2. COM1
2
1
Page 44
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Universal Serial Bus (USB) Ports
Four USB 3.0 ports (USB 0/1, USB 2/3) are located on the I/O back panel. An internal USB header, located next to SATA 4~7, provides two USB 3.0 connections (USB2/3) for front access. In addition, A Type A USB header (USB6), located next to PCI-E Slot 1, also provides USB 3.0 connection for front access. The onboard headers can be used to provide front side USB access with a cable (not included).
Back Panel USB 0/1, 2/3 (3.0)
Pin Denitions
Pin# Denition Pin# Denition
A1 VBUS B1 Power
A2 D- B2 USB_N
A3 D+ B3 USB_P
A4 GND B4 GND
A5 Stda_SSRX- B5 USB3_RN
A6 Stda_SSRX+ B6 USB3_RP
A7 GND B7 GND
A8 Stda_SSTX- B8 USB3_TN
A9 Stda_SSTX+ B9 USB3_TP
JPG1
JPL1
JTPM1
BMC
6
5
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
USB 4/5(3.0)
JSD1
S-SATA1
SATA1
SATA2
JL1
LEDM1
JPME1
LE3
BIOS
I-SATA 0~3
I-SATA 4~7
JSD2
S-SATA0
JRK1
FANA
FANB
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
JNCSI
JIPMB1
Battery
+
BT1
Intel
PCH
JSTBY1
JSDCARD1
CPU2 SLOT5 PCI-E 3.0 x16
CPU2 SLOT4 PCI-E 3.0 x16
MH4
MH11
JHFI1
P1-DIMME1
P1-DIMMF1
JBT1
IPMI CODE
FAN4 FAN3
LAN CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
JHSSI
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BAR CODE
P2-DIMMA2
Front Panel USB 4/5 (3.0)
Pin Denitions
Pin# Denition Pin# Denition
1
VBUS 19 Power
2
Stda_SSRX- 18 USB3_RN
3
Stda_SSRX+ 17 USB3_RP
4
GND 16 GND
5
Stda_SSTX- 15 USB3_TN
6
Stda_SSTX+ 14 USB3_TP
7
GND 13 GND
8
D- 12 USB_N
9
D+ 11 USB_P
10 x
Type A USB 6 (3.0)
Pin Denitions
Pin# Denition Pin# Denition
1 VBUS 5 SSRX-
2 USB_N 6 SSRX+
LE1
JUIDB1
VGA
FAN5
USB 2/3(3.0)
LAN1
LAN2
CPU2
IPMI_LAN
USB 0/1(3.0)
COM1
3 USB_P 7 GND
4 Ground 8 SSTX-
9 SSTX+
1. USB0 (3.0)
2. USB1 (3.0)
3. USB2 (3.0)
4. USB3 (3.0)
5. USB4/5 (3.0)
6. USB6 (3.0)
4
3
BIOS LICENSE
P2-DIMMD1
P2-DIMMF1
P2-DIMME1
P2-DIMMD2
P1-DIMMA1
P1-DIMMA2
P1-DIMMC1
P1-DIMMB1
JPWR4
JPWR2
JPWR3
JPI2C1
JF1
LE2
CPU1
JPWR1
FAN2
FAN1
2
1
44
Page 45
Chapter 2: Installation
Unit Identier Switch/UID LED Indicator
A Unit Identier (UID) switch (UID) and a UID LED Indicator (LE1) are located on the I/O
back panel. When you press the UID switch, the UID LED indicator will be turned on. Press
the UID switch again to turn off the LED. The UID Indicator provides easy identication of a
system unit that may be in need of service.
Note: UID can also be triggered via IPMI on the motherboard. For more information on IPMI, please refer to the IPMI User's Guide posted on our website at http://www. supermicro.com.
JPL1
JPME2
USB 6 (3.0)
M.2-C1
M.2-C2
LE4
JWD1
T-SGPIO1
JL1
JPG1
JTPM1
JD1
JP4
JVRM1
JVRM2
USB 4/5(3.0)
JSD1
S-SATA1
SATA2
BMC
LEDM1
AST2500
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT1 PCI-E 3.0 x8
JPME1
JIPMB1
LE3
BIOS
I-SATA 0~3
Intel
I-SATA 4~7
PCH
JSD2
S-SATA0
JSTBY1
SATA1
JRK1
FANA
FANB
JSDCARD1
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
JNCSI
Battery
+
BT1
JHFI1
IPMI CODE
FAN4 FAN3
UID Switch
Pin Denitions
Pin# Denition
1 Ground
2 Ground
3 Button In
4 Button In
LAN
CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
MH4
X11DPH-i
REV: 1.01
MH11
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JBT1
1
2
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
Color Status
Blue: On Unit Identied
VGA
FAN5
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA2
P1-DIMMA1
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD2
JPI2C1
LE2
FAN2
P2-DIMMD1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JF1
JPWR1
P2-DIMMF1
FAN1
1. UID
2. UID LED
1
45
Page 46
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
Ethernet Ports
Two Ethernet ports (LAN1, LAN2) are located on the I/O backplane. These Ethernet ports support 10GbE LAN connections on the X11DPH-T/X11DPH-Tq, and 1 GbE LAN connections on the X11DPH-i. In addition, an IPMI-dedicated LAN that supports 1 GbE LAN is located above USB 0/1 ports on the backplane. All Ethernet ports accept RJ45 type cables. Please refer to the LED Indicator Section for LAN LED information.
LAN Ports
Pin Denition
Pin# Denition Pin# Denition
1 P2V5SB 10 SGND
2 TD0+ 11 Act LED
3 TD0- 12 P3V3SB
4 TD1+ 13 Link 100 LED
5 TD1- 14 Link 1000 LED
6 TD2+ 15 Ground
7 TD2- 16 Ground
8 TD3+ 17 Ground
9 TD3- 18 Ground
(Yellow, +3V3SB)
(Yellow, +3V3SB)
JPL1
JPME2
USB 6 (3.0)
M.2-C1
M.2-C2
LE4
JWD1
T-SGPIO1
JL1
JPG1
JTPM1
JD1
JP4
JVRM1
JVRM2
USB 4/5(3.0)
JSD1
S-SATA1
SATA2
BMC
LEDM1
AST2500
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT1 PCI-E 3.0 x8
JPME1
JIPMB1
LE3
BIOS
I-SATA 0~3
Intel
I-SATA 4~7
PCH
JSD2
S-SATA0
JSTBY1
SATA1
JRK1
FANA
FANB
JSDCARD1
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
JNCSI
Battery
+
BT1
JHFI1
IPMI CODE
FAN4 FAN3
CPU2 SLOT5 PCI-E 3.0 x16
MH4
MH11
P1-DIMME1
P1-DIMMF1
JBT1
LAN
CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
JHSSI
P2-DIMMB1
P2-DIMMC1
MAC CODE
BAR CODE
(NC: No Connection)
2
1
LE1
P2-DIMMA2
P2-DIMMA1
JUIDB1
BIOS LICENSE
VGA
FAN5
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA2
3
P1-DIMMA1
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD2
JPI2C1
LE2
FAN2
P2-DIMMD1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JF1
JPWR1
1. GLAN1 (for X11DPH-i)
(10G LAN for X11DPH-T/X11DPH-Tq)
2. GLAN2 (for X11DPH-i)
(10G LAN for X11DPH-T/X11DPH-Tq)
3. IPMI LAN
P2-DIMMF1
3
FAN1
1
2
46
Page 47
Chapter 2: Installation
IPMI CODE
+
BIOS LICENSE
MAC CODE
X11DPH-i
REV: 1.01
BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
2.6 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specically for use with Supermicro chassis. See the gure below for the descriptions of the front control panel
buttons and LED indicators.
Figure 2-3. JF1 Header Pins
3.3V
3.3V
NMI
X
1 2
19
47
20
PWR
Reset
Power Button
Reset Button
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
Page 48
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
IPMI CODE
+
BIOS LICENSE
MAC CODE
X11DPH-i
REV: 1.01
BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel
PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on/off the system. This button can also be congured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for
pin denitions.
Power Button
Pin Denitions (JF1)
Pins Denition
1 Signal
2 Ground
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case to reset the system. Refer to the table below for pin denitions.
Pin Denitions (JF1)
Pins Denition
3 Reset
4 Ground
Reset Button
48
1
2
PWR
Reset
1. PWR Button
2. Reset Button
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
NMI
X
1 2
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
Page 49
Chapter 2: Installation
T-SGPIO1
JWD1
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below
for pin denitions.
Power Fail LED
Pin Denitions (JF1)
Pin# Denition
5 3.3V
6 PWR Supply Fail
Overheating and Fan Fail LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan Fail LED connections. The LED on pin 8 provides warnings of overheating.
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JVRM1
JVRM2
BIOS
I-SATA 0~3
I-SATA 4~7
USB 4/5(3.0)
JSD2
JSD1
S-SATA1
SATA1
SATA2
JL1
LEDM1
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JIPMB1
LE3
S-SATA0
JRK1
FANA
FANB
BMC
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
JNCSI
+
Intel PCH
JSTBY1
OH/Fan Fail Indicator
Status
State Denition
Off Normal
On Overheat
Flashing Fan Fail
JSDCARD1
Battery
BT1
CPU2 SLOT5 PCI-E 3.0 x16
CPU2 SLOT4 PCI-E 3.0 x16
MH4
MH11
JHFI1
P1-DIMME1
P1-DIMMF1
JBT1
IPMI CODE
FAN4 FAN3
LAN
CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
X11DPH-i
REV: 1.01
P1-DIMMD2
P1-DIMMD1
JHSSI
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
OH/Fan Fail LED
Pin Denitions (JF1)
Pin# Denition
7 Blue LED
8 OH/Fan Fail LED
VGA
FAN5
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA2
P1-DIMMA1
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD2
JPI2C1
LE2
FAN2
P2-DIMMD1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JF1
JPWR1
FAN1
P2-DIMMF1
PWR
Reset
Power Button
Reset Button
1. Power Fail LED
2. OH/Fan Fail LED
1 2
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
X
NMI
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
1
2
49
Page 50
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
T-SGPIO1
JWD1
NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to
display network activity. Refer to the table below for pin denitions.
LAN1/LAN2 LED
Pin Denitions (JF1)
Pin# Denition
9 NIC 2 Activity LED
11 NIC 1 Activity LED
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to
show hard drive activity status. Refer to the table below for pin denitions.
JPG1
JPL1
JTPM1
JPME2
CPU1 SLOT1 PCI-E 3.0 x8
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JVRM1
JVRM2
BIOS
I-SATA 0~3
I-SATA 4~7
USB 4/5(3.0)
JSD2
JSD1
S-SATA1
SATA1
SATA2
JL1
LEDM1
CPU2 SLOT2 PCI-E 3.0 x16
JPME1
JIPMB1
LE3
S-SATA0
JRK1
FANA
FANB
BMC
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
JNCSI
+
Intel PCH
JSTBY1
JSDCARD1
CPU2 SLOT4 PCI-E 3.0 x16
Battery
BT1
JHFI1
JBT1
IPMI CODE
FAN4 FAN3
CPU2 SLOT5 PCI-E 3.0 x16
MH4
MH11
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
LAN
CTRL
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
REV: 1.01
LE1
JUIDB1
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
HDD LED
Pin Denitions (JF1)
Pins Denition
13 3.3V Stdby
14 HDD Active
VGA
FAN5
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
IPMI_LAN USB 0/1(3.0)
P1-DIMMA2
P1-DIMMA1
P1-DIMMC1
P1-DIMMB1
COM1
P2-DIMMD1
P2-DIMMD2
JPI2C1
JF1
LE2
FAN2
P2-DIMME1
JPWR4
JPWR2
JPWR3
JPWR1
FAN1
P2-DIMMF1
PWR
Reset
Power Button
Reset Button
1. NIC2 LED
2. NIC1 LED
3. HDD LED
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
X
NMI
1 2
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
1
2
3
50
Page 51
Chapter 2: Installation
IPMI CODE
+
BIOS LICENSE
MAC CODE
X11DPH-i
REV: 1.01
BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin denitions.
Power LED
Pin Denitions (JF1)
Pins Denition
15 3.3V
16 PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin denitions.
NMI Button
Pin Denitions (JF1)
Pins Denition
19 Control
20 Ground
51
PWR
Reset
1. PWR LED
2. NMI
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
NMI
1
X
1 2
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
2
Page 52
Super X11DPH-i/X11DPH-T/X11DPH-Tq User's Manual
IPMI CODE
+
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MAC CODE
X11DPH-i
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BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
2.7 Connectors
Power Connector
ATX Main Connector
JPWR3 is the 24-pin ATX main power supply connector. This primary power supply connector
meets the ATX SSI EPS 24-pin specication. You must also connect the 8-pin (JPWR1/
JPWR2/JPWR4) power connectors to your power supply (See next page for more info on 8-pin power connectors.)
ATX Power 24-pin Connector
Pin Denitions
Pin# Denition Pin# Denition
13 +3.3V 1 +3.3V
14 NC 2 +3.3V
15 Ground 3 Ground
16 PS_ON 4 +5V
17 Ground 5 Ground
18 Ground 6 +5V
19 Ground 7 Ground
20 Res (NC) 8 PWR_OK
21 +5V 9 5VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 Ground 12 +3.3V
1. JPWR3 24-pin Power Supply
1
52
Page 53
Chapter 2: Installation
IPMI CODE
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MAC CODE
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
12V 8-pin CPU Power Connectors
JPWR1, JPWR2 and JPWR4 are the 8-pin 12V DC power input for the CPU or alternative single power source for a special enclosure when the 24-pin ATX power is not in use. Refer
to the table below for pin denitions.
12V 8-pin Power
Pin Denitions
Pin# Denition
1 - 4 Ground
5 - 8 +12V
1. JPWR1
2. JPWR2
3. JPWR4
3
2
1
53
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Headers
Onboard Fan Header
This motherboard has eight fan headers (FAN1~6, FANA, FANB) on the motherboard. These are 4-pin fan headers, which are backward compatible with traditional 3-pin fans. The onboard fan speed is controlled by Thermal Management (via Hardware Monitoring) in the BIOS. When using Thermal Management setting, please use all 3-pin fans or all 4-pin fans.
Fan Header
Pin Denitions
Pin# Denition
1 Ground (Black)
2 +12V (Red)
3 Tachometer
4 PWM Control
6
7
8
34
5
2
54
1. FAN1
2. FAN2
3. FAN3
4. FAN4
5. FAN5
6. FAN6
7. FANA
1
Page 55
Chapter 2: Installation
B
Host Fabric Interface (HFI) Carrier Card Sideband Header (for the F Model CPU Only)
A Host Fabric Interface (HFI) carrier card header is located at JHFI1 on the motherboard. The JHFI1 header is used when an F model processor is installed on CPU Socket#1 on the motherboard. Use an HFI sideband cable to connect the carrier card to the JHFI header, and use an appropriate IFP (Internal-Faceplate-to-Processor) cable (optional) to connect the carrier card to the F model processor to enhance system performance (See Note below). See page 35 for the installation instructions.
Note: For the HFI carrier card to function properly, please purchase the appropriate IFP cable from Supermicro. Please refer to Supermicro's website at www.supermicro.
com for the part number of the IFP cable specied for your system.
HFI Carrier
Card
onnect another end of
HFI (Host Fabric
Interface) Sideband
IFP Cable (*See Note above)
IFP Cable (Optional)
6
5
5. Connect one end of the IFP cable to the
A
connector (B) of the HFI card.
2. Install an HFI card to a PCI-E slot
4
3. Connect the HFI connector on the HFI cable to the
3
Cable
onboard JHFI1 header.
6. Connect the other end of the IFP cable to the F model CPU.
2
JHFI1 Header (for CPU1)
JPG1
JPL1
JTPM1
JPME2
USB 6 (3.0)
JD1
JP4
M.2-C1
M.2-C2
LE4
JWD1
JVRM1
JVRM2
T-SGPIO1
USB 4/5(3.0)
JSD1
S-SATA1
SATA2
JL1
CPU1 SLOT1 PCI-E 3.0 x8
JPCIE1_L
BIOS
I-SATA 0~3
I-SATA 4~7
JSD2
S-SATA0
SATA1
FANB
F Model
Processor
BMC
LEDM1
JSDCARD1
AST2500
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU2 SLOT4 PCI-E 3.0 x16
JPME1
JNCSI
JIPMB1
Battery
+
BT1
JHFI1
JNVI2C2
JNVI2C1
JHFI1
LE3
1
Intel PCH
IPMI CODE
JSTBY1
JRK1
FAN4FAN3
FANA
MH4
MH11
JBT1
LAN
CTRL
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1-HSSI GPIO
JHSSI
X11DPH-i
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P2-DIMMD2
P2-DIMMD1
P2-DIMME1
P2-DIMMF1
A. JHFI1 Header
Install an F model CPU
1
on CPU Socket#1
LE1
JUIDB1
VGA
FAN6
CPU1 SLOT7 PCI-E 3.0 x8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
MAC CODE
BIOS LICENSE
BAR CODE
FAN5
CPU1
CPU1
USB 2/3(3.0)
LAN1
LAN2
CPU2
P2-DIMMA2
IPMI_LAN USB 0/1(3.0)
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
COM1
P2-DIMMD2
JPI2C1
LE2
FAN2
P2-DIMMD1
JF1
P2-DIMME1
JPWR4
JPWR2
JPWR3
JPWR1
P2-DIMMF1
FAN1
55
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IPMI CODE
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is available from a third-party vendor. A TPM/Port 80 connector is a security device that supports encryption and authentication in hard drives. It allows the motherboard to deny access if the TPM associated with the hard drive is not installed in the system. See the layout below for the location of the TPM header..
Speaker Header
A speaker header is located on JD1. Close pins 1-2 of JD1 to use the onboard speaker. See the layout below for JD1 location.
1
2
1. TPM/Port 80 Header
2. Speaker Header
56
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IPMI CODE
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
SATA DOM Power Connector
The SATA Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to solid-state storage devices connected to the SATA ports. See the table below for pin
denitions.
DOM PWR
Pin Denitions
Pin# Denition
1 +5V
2 Ground
3 Ground
Power SMB (I2C) Header
The Power System Management Bus (I2C) connector (JPI2C1) monitors the power supply,
fan, and system temperatures. Refer to the table below for pin denitions.
Power SMB Header
Pin Denitions
Pin# Denition
1 Clock
2 Data
3 PMBUS_Alert
4 Ground
5 +3.3V
2
1
1. JSD1
2. JSD2
3. Power SMB
3
57
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
RAID Key Header
A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support NVMe SDD.
Intel RAID Key
Pin Denitions
Pin# Denition
1 Ground
2 3.3V Standby
3 Ground
4 PCH RAID Key
T-SGPIO1 Header
The T-SGPIO (Serial General Purpose Input/Output) header is used for the onboard SATA devices to communicate with the enclosure management chip on the backplane. See the table below for more information.
1
2
T-SGPIO1 Header
Pin Denitions
Pin# Denition Pin# Denition
1 NC 2 NC
3 Ground 4 DATA Out
5 Load 6 Ground
7 Clock 8 NC
NC = No Connection
58
1. RAID Key
2. T-SGPIO 1
Page 59
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
4-pin BMC External I2C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here to use the IPMB I2C connection on your system. Refer to the table below for pin
denitions.
Pin# Denition
1 Data
2 Ground
3 Clock
4 No Connection
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin denitions.
2
1
Chassis Intrusion
Pin Denitions
Pin# Denition
1 Intrusion Input
2 Ground
1. BMC External I2C Header
2. Chassis Intrusion
59
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Standby Power
The Standby Power header is located at JSTBY1 on the motherboard. You must have a card with a Standby Power connector and a cable to use this feature. Refer to the table below
for pin denitions.
Pin# Denition
1 +5V Standby
2 Ground
3 No Connection
1
1. Standby Power
60
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
PCI-E M.2 Slots
This motherboard has two PCI-E M.2 slots (M.2-C1/M.2-C2). The M.2, formerly known as "Next Generation Form Factor (NGFF)" replaces a mini PCI-E slot. M.2 allows for a variety
of card sizes and offers increased functionality and spatial efciency. The M.2 socket on the
motherboard supports PCI-E 3.0 X4 (32 Gb/s) SSD cards in the 2260, 2280 and 22110 form factors.
A Holder
B Holder Mount
Locked position
C Card Holder Mount
Turn 90 degrees to lock
Press in here
Rectangle hole on MB
A+B+C
B
A
Turn 90 degrees to lock
D Plastic screw
Locked position with M.2 card
Hole Location on the M B 42
M.2 Card 60 A+B+C
M.2 Card 80 A+B+C
M.2 Card 110 A+B+D
C
Copyright © 2017 by Super Micro Computer, Inc. All rights reserved.
B
A
Locked position
STOP
A+B+D
D
1. M.2-C1 Slot
2. M.2-C2 Slot
1
2
61
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
I-SATA 3.0 and S-SATA 3.0 Ports
This motherboard has ten SATA 3.0 ports (I-SATA0-3, 4-7) and S-SATA0/S-SATA1. I-SATA0-3 and 4-7 ports are supported by the Intel PCH, while S-SATA0/1 are supported by Intel SCU. S-SATA1/2 can be used with Supermicro SuperDOMs which are yellow SATA DOM connectors with power pins built in, and do not require external power cables. Supermicro SuperDOMs are backward-compatible with regular SATA HDDs or SATA DOMs that need external power cables. All these SATA ports provide serial-link signal connections, which are faster than the connections of Parallel ATA.
SATA 3.0 Port
Pin Denitions
Pin# Signal
1 Ground
2 SATA_TXP
3 SATA_TXN
4 Ground
5 SATA_RXN
6 SATA_RXP
7 Ground
34
1
2
1. I-SATA0-3
2. I-SATA4-6
3. S-SATA1 (SuperDOM)
4. S-SATA2 (SuperDOM)
62
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2.8 Jumper Settings
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
How Jumpers Work
Chapter 2: Installation
To modify the operation of the motherboard, jumpers can be
used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for jumper
locations.
Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.
VGA Port Enable/Disable
Jumper JPG1 is used to enable or disable the VGA port on the I/O back panel. Close pin 1 and pin 2 for VGA support. The default setting is Enabled.
1
Connector
Pins
3 2 1
Jumper
3 2 1
Setting
VGA Port Enable/Disable
Jumper Settings
Jumper Setting Denition
Pins 1-2 Enabled
Pins 2-3 Disabled
1. VGA Enable/Disable
63
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s).
2. Remove the cover of the chassis to access the motherboard.
3. Remove the onboard battery from the motherboard.
4. Short the CMOS pads with a metal object such as a small screwdriver for at least four seconds.
5. Remove the screwdriver (or shorting device).
6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords.
Do not use the PW_ON connector to clear CMOS.
1
JBT1 contact pads
1. Clear CMOS
64
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Management Engine (ME) Recovery
Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource
allocation for essential system operation only in order to maintain normal power operation and management. In the single operation mode, online upgrade will be available via Recovery
mode. See the table below for jumper settings.
Manufacturer Mode
Jumper Settings
Jumper Setting Denition
Pins 1-2 Normal
Pins 2-3 ME Recovery
Manufacturing Mode Select
Close JPME2 to bypass SPI ash security and force the system to use the Manufacturing Mode, which will allow you to ash the system rmware from a host server to modify system settings. See the table below for jumper settings.
2
1
Manufacturing Mode Select
Jumper Settings
Jumper Setting Denition
Pins 1-2 Normal (Default)
Pins 2-3 Manufacturing Mode
65
1. ME Recovery
2. Manufacturing Mode Select
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
Watch Dog
JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default setting is Reset.
Note: When Watch Dog is enabled, the user needs to write their own application software to disable it.
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2 Reset
Pins 2-3 NMI
Open Disabled
LAN Ports Enable/Disable
Jumper JPL1 is used to enable or disable onboard Ethernet LAN ports on the back panel. Close pin 1 and pin 2 to use LAN ports 1/2. The default setting is Enabled.
2
1
LAN Port Enable/Disable
Jumper Settings
Jumper Setting Denition
Pins 1-2 Enabled
Pins 2-3 Disabled
1. Watch Dog
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
I2C Bus for VRM
Jumpers JVRM1 and JVRM2 allow the VRM SMB Clock and Data to access the Baseboard
Management Controller (BMC). See the tables below for jumper settings.
JVRM1 (VRM SMB Clock to BMC)
Jumper Settings
Jumper Setting Denition
On Enable (SMB Clock to BMC)
OFF Disable (SMB Clock to PCH)
JVRM2 (VRM SMB Data to BMC)
Jumper Settings
Jumper Setting Denition
On Enable (SMB Data to BMC)
Off Disable (SMB Data to PCH)
1. JVRM1
2. JVRM2
2
1
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
2.9 LED Indicators
LAN LEDs
Link LED
LAN 1/2
Activity LED
The LAN ports are located on the IO Backplane on the motherboard. Each Ethernet LAN port has two LEDs. The yellow LED indicates activity. Link LED, located on the left side of the LAN port, may be green, amber or off indicating the speed of the connection. See the tables at right for more information.
IPMI-Dedicated LAN LEDs
In addition to LAN 1/LAN 2, an IPMI­dedicated LAN is located on the I/O Backplane of the motherboard. The amber LED on the right indicates activity, while the green LED on the left indicates the speed of the connection. See the tables at right for more information.
1
2
Color State Denition
Yellow Flashing Active
LED Color Denition
Off No Connection, 10 or 100 Mbps
Green 10 Gbps (X11DPi-NT Only)
Amber 1 Gbps
IPMI LAN
Link LED
Color State Denition
Link (Left) Green: Solid 100 Mbps
Activity (Right) Amber:
Blinking
Activity LED
Active
1. LAN1/LAN2 LEDs
1
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LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB
FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SATA1
S-SATA0
I-SATA 4~7
I-SATA 0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
BMC Heartbeat LED
LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning normally. See the table below for the LED status.
Onboard Power LED Indicator
LED Color Denition
Green:
Blinking
BMC Normal
Onboard Power LED
The Onboard Power LED is located at LE2 on the motherboard. When this LED is on, the system is on. Be sure to turn off the system and unplug the power cord before removing or installing components. Refer to the table below for more information.
Onboard Power LED Indicator
LED Color Denition
System Off
Off
Green System On
(power cable not
connected)
1
1. BMC Heartbeat LED
2. Onboard Power LED
2
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Chapter 3
Troubleshooting
3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Check that the power LED on the motherboard is on.
2. Make sure that the power connector is connected to your power supply.
3. Make sure that no short circuits exist between the motherboard and chassis.
4. Disconnect all cables from the motherboard, including those for the keyboard and mouse.
5. Remove all add-on cards.
6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the
motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully
seated.)
7. Use the correct type of onboard CMOS battery as recommended by the manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.
No Power
1. Make sure that no short circuits exist between the motherboard and the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
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No Video
1. If the power is on but you have no video, remove all the add-on cards and cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on beep codes.
System Boot Failure
If the system does not display POST (Power-On-Self-Test) or does not respond after the power is turned on, check the following:
1. Check for any error beep from the motherboard speaker.
If there is no error beep, try to turn on the system without DIMM modules installed. If there
is still no error beep, replace the motherboard.
If there are error beeps, clear the CMOS settings by unplugging the power cord and
contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.
2. Remove all components from the motherboard, especially the DIMM modules. Make sure that system power is on and that memory error beeps are activated.
3. Turn on the system with only one DIMM module installed. If the system boots, check for bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure in this Chapter.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed.
2. Conrm that you are using the correct memory. Also, it is recommended that you use the same memory type and speed for all DIMMs in the system. See Section 2.4 for memory details.
3. Check for bad DIMM modules or slots by swapping modules between slots and noting the results.
4. Check the power supply voltage 115V/230V switch.
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Losing the System's Setup Conguration
1. Make sure that you are using a high quality power supply. A poor quality power supply may cause the system to lose the CMOS setup information. Refer to Section 1.6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the setup conguration problem, contact your vendor for repairs.
When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following:
1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http:\\www.supermicro.com for memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/ system fans, etc., work properly. Check the hardware monitoring settings in the IPMI to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Please refer to our website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following:
1. Source of installation: Make sure that the devices used for installation are working properly, including boot devices such as CD.
2. Cable connection: Check to make sure that all cables are connected and working properly.
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3. Using the minimum conguration for troubleshooting: Remove all unnecessary components (starting with add-on cards rst), and use the minimum conguration (but
with a CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.
6. To nd out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.
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3.2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note that as a
motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with
your distributor or reseller for troubleshooting services. They should know of any possible
problem(s) with the specic system conguration that was sold to you.
1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions' (FAQs) sections in this chapter or see the FAQs on our website before contacting Technical Support.
2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be
ashed depending on the modications to the boot block code.
3. If you still cannot resolve the problem, include the following information when contacting us for technical support:
Motherboard model and PCB revision number
BIOS release date/version (this can be seen on the initial display when your system rst
boots up)
System conguration
An example of a Technical Support form is posted on our website.
Distributors: For immediate assistance, please have your account number ready when contacting our technical support department by e-mail.
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3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: This motherboard supports up to 2TB of Load Reduced DIMM (LRDIMM), 3D
LRDIMM, Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC of up to 2666 MHz modules in 16 slots. See Section 2.4 for details on installing memory.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS les are located on our website at http://www.
supermicro.com. Please check our BIOS warning message and the information on how to
update your BIOS on our website. Select your motherboard model and download the BIOS
le to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before downloading. You can choose from the zip le and the .exe le. If you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run the batch le using the format FLASH.BAT lename.rom from your bootable USB device to ash the BIOS. Then, your system will automatically reboot.
Question: Why can't I turn off the power using the momentary power on/off switch?
Answer: The instant power off function is controlled in BIOS by the Power Button Mode
setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities as long as the BIOS has control of the system. When the Standby or Suspend feature is
enabled or when the BIOS is not in control such as during memory count (the rst screen
that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system. This feature is required to implement the ACPI features on the motherboard.
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3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it. Once unlocked, the battery will pop out from the holder.
3. Remove the battery.
Proper Battery Disposal
Please handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery
in the garbage or a public landll. Please comply with the regulations set up by your local
hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a click to ensure that the battery is securely locked.
Important: When replacing a battery, be sure to only replace it with the same type.
OR
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3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete.
For faster service, RMA authorizations may be requested online (http://www.supermicro.com/
support/rma/).
This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alteration, misuse, abuse or improper maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
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Chapter 4
BIOS
4.1 Introduction
This chapter describes the AMIBIOS™ Setup utility for the X11DPH-i/X11DPH-T/X11DPH-Tq
motherboard. The BIOS is stored on a chip and can be easily upgraded using a ash program.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to BIOS that may not be reected in
this manual.
Starting the Setup Utility
To enter the BIOS setup utility, press the <Delete> key while the system is booting up. (In most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option is described in this manual.
The Main BIOS screen has two main frames. The left frame displays all the options that can
be congured. “Grayed-out” options cannot be congured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note that BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values.
A "" indicates a submenu. Highlighting such an item and pressing the <Enter> key will open the list of settings within that submenu.
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during the setup navigation process.
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4.2 Main Setup
When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below. The following Main menu items will be displayed:
System Date/System Time
Use this feature to change the system date and time. Highlight System Date or System Time using the arrow keys on the keyboard. Press the <Tab> key or the arrow keys to move
between elds. The date must be entered in Day MM/DD/YYYY format. The time is entered
in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is 01/01/2014 after RTC reset.
Supermicro X11DPH-T
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item displays the date when the version of the BIOS ROM used in the system was built.
CPLD Version
This item displays the version of the CPLD (Complex-Programmable Logical Device) used in the system.
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Memory Information
Total Memory
This item displays the total size of memory available in the system.
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4.3 Advanced Setup Congurations
Use the arrow keys to select the Advanced submenu and press <Enter> to access the submenu items.
Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction. When this occurs, restore the setting to the manufacture default setting.
Boot Feature
Quiet Boot
Use this feature to select the screen between displaying POST messages or the OEM logo at bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Enabled and Disabled.
Note: POST message is always displayed regardless of the item setting.
Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to use the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display mode set by the system BIOS. The options are Force BIOS and Keep Current.
Bootup NumLock State
Use this feature to set the Power-on state for the Numlock key. The options are Off and On.
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Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The options are Disabled and Enabled.
INT19 Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to allow the BIOS to automatically reboot the system from a Legacy boot device after an initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Install Windows 7 USB Support
Select Enabled to install Windows 7 and the XHCI drivers for USB keyboard/mouse support. After you've installed the Windows 7 and XHCI drivers, be sure to set this feature to "Disabled" (default). The options are Disabled and Enabled.
Port 61h Bit-4 Emulation
Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The options are Enabled and Disabled.
Power Conguration
Watch Dog Function
Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more than 5 minutes. The options are Enabled and Disabled.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for the system power to remain off after a power loss. Select Power-On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay-Off, Power-On, and Last State.
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Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for the user to power off the system after pressing and holding the power button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are 4 Seconds Override and Instant Off.
Throttle on Power Fail
Select Enabled to decrease system power input by throttling CPU frequency when the power supply fails. The options are Enabled and Disabled.
CPU Conguration
Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.
Processor Conguration
The following CPU information will be displayed:
Processor BSP Revision
Processor Socket
Processor ID
Processor Frequency
Processor Max Ratio
Processor Min Ratio
Microcode Revision
L1 Cache RAM
L2 Cache RAM
L3 Cache RAM
Processor 0 Version
Processor 1 Version
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The options are Enable and Disable.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable Execute Disable Bit support which will allow the processor to designate areas in the system memory where an application code can execute and where
it cannot, thus preventing a worm or a virus from ooding illegal codes to overwhelm the
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processor, damaging the system during a virus attack. The options are Enable and Disable. (Refer to Intel and Microsoft websites for more information.)
Intel Virtualization Technology
Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms, providing the user with greater reliability, security and availability in networking and data­sharing. The settings are Enable and Disable.
PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system. The options are Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the Level 2 (L2) cache to improve CPU performance. The options are Disable and Enable.
Adjacent Cache Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and
Enable.
Note: Please power off and reboot the system for the changes you've made to take
effect. Please refer to Intel’s website for detailed information.
DCU Streamer Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing and processing for CPU performance enhancement. The options are Disable and
Enable.
DCU IP Prefetcher
If this feature is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP addresses to improve network connectivity and system performance. The options are
Enable and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be supported. The options are Disable and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
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will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU performance. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Enable and Disable.
Advanced Power Management Conguration
CPU P State Control
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat dissipation. Please refer to Intel’s website for detailed information. The options are Disable and Enable.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this feature to congure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efcient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select Enable for processor cores to run faster than the frequency specied by the
manufacturer. The options are Disable and Enable.
Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based on an OS request. If this feature is set to Native Mode, hardware will choose a P-state setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support, hardware will choose a P-state setting independently without OS guidance. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
CPU C State Control
Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor core to control its C-State setting automatically and independently. The options are Enable and Disable.
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CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating system. During the CPU C6 state, power to all caches is turned off. The options are Auto, Enable, and Disable.
Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a "Halt State." The options are Disable and Enable.
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state, C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
CPU T State Control
Software Controlled T-States
If this feature is set to Enable, CPU throttling settings will be supported by the software of the system. The options are Disable and Enable.
Chipset Conguration
Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
UPI (Ultra Path Interconnect) Conguration
This section displays the following UPI General Conguration information:
Number of CPU
Number of IIO
Current UPI Link Speed
Current UPI Link Frequency
UPI Global MMIO Low Base/Limit
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UPI Global MMIO High Base/Limit
UPI PCI-E Conguration Base/Size
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect connections. Select Topology Precedent to degrade UPI features if system options are in
conict. Select Feature Precedent to degrade UPI topology if system options are in conict.
The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.
Link L1 Enable
Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.
IO Directory Cache (IODC)
Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
SNC
Select Enable to use the feature of "Secure Network Communications" (SNC), which supports full SNC (2-cluster) interleave and 1-way IMC interleave. Select Auto for 1-cluster or 2-cluster support depending on the satuts of IMC (Integrated Memory Controller) Interleaving. The options are Disable, Enable, and Auto.
XPT Prefetch
Select Enable to support XPT Prefetching to enhance system performance. The options are Enable and Disable.
KTI Prefetch
Select Enable to support KTI Prefetching to enhance system performance. The options are Enable and Disable.
Local/Remote Threshold
Use this feature to congure the threshold settings for local and remote systems that are
connected in the network. The options are Disable, Auto, Low, Medium, and High.
Stale AtoS (A to S)
Select Enable to remove the contents and the structures of the les that are no longer
needed in the remote host server but are still in use by the local client machine from
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Directory A to Directory S in the NFS (Network File System) to optimize system performance. The options are Disable, Enable, and Auto.
LLC Dead Line Alloc
Select Enable to opportunistically ll the deadlines in LLC. The options are Enable, Disable, and Auto.
Isoc Mode
Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements. This feature is especially important for Virtualization Technology. The options are Disable, Enable, and Auto.
Memory Conguration
Enforce POR
Select POR to enforce POR restrictions for DDR4 memory frequency and voltage programming. The options are POR and Disable.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.
Data Scrambling for NVDIMM
Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system performance and security. The options are Auto, Disable, and Enable.
Data Scrambling for DDR4
Select Enable to enable data scrambling for DDR4 memory to enhance system performance and security. The options are Auto, Disable, and Enable.
tCCD_L Relaxation
If this feature is enabled, SPD (Serial Presence Detect) will override tCCD_L ("Column to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If this feature is set to Disable, tCCD_L will be enforced based on the memory frequency. The options are Disable and Auto
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory performance. The options are Enable and Disable.
2X Refresh
Select Enable for memory 2X refresh support to enhance memory performance. The options are Enable and Auto.
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Page Policy
Use this feature to set the page policy for onboard memory support The options are Closed, Adaptive and Auto.
IMC Interleaving
Use this feature to congure interleaving settings for the IMC (Integrated Memory
Controller), which will improve memory performance. The options are 1-way Interleaving, 2-way Interleaving, and Auto.
Memory Topology
This item displays the information of onboard memory modules as detected by the BIOS.
P1 DIMMA1/P1 DIMMA2/P1 DIMMB1/P1 DIMMC1/P1 DIMMD1/P1 DIMMD2/P1
DIMME1/P1 DIMMF1/
P2 DIMMA1/P2 DIMMA2/P2 DIMMB1/P2 DIMMC1/P2 DIMMD1/P2 DIMMD2/P2
DIMME1/P2 DIMMF1
Memory RAS (Reliability_Availability_Serviceability) Conguration
Use this submenu to congure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support Static Virtual Lockstep mode to enhance memory performance. The options are Enable and Disable.
Mirror Mode
Use this feature to congure the mirror mode settings for all 1LM/2LM memory modules
installed in the system which will create a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into half. The options are
Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
UEFI ARM Mirror
If this feature is set to Enable, mirror mode conguration settings for UEFI-based Address
Range memory will be activated upon system boot. This will create a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into half. The options are Disable and Enable.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The options are Enable and Disable.
Note: This item will not be available when memory mirror mode is enabled.
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Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting is 10.
SDDC Plus One
Select Enable for SDDC (Single Device Data Correction) Plus One support, which will increase the reliability and serviceability of your system memory. The options are Enable and Disable.
ADDDC (Adaptive Double Device Data Correction) Sparing
Select Enable for ADDDC sparing support to enhance memory performance. The options are Enable and Disable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected in a memory module and send the corrections to the requestor (the original source). When this item is set to Enable, the IO hub will read and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Enable and Disable.
Patrol Scrub Interval
Use this item to specify the number of hours (between 0 to 24) required for the system to complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically. The default setting is 24.
Note: This item is hidden when Patrol Scrub item is set to Disable.
IIO Conguration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Conguration/CPU2 Conguration
IOU0 (IIO PCIe Br1)
This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
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MCP0 (IIO PCIe Br4)
This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.
The options are x16 and Auto.
CPU1 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Conguration
only)
Link Speed
This feature congures the link speed of a PCI-E port specied by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation 3) (8 GT/s)
The following information will be displayed as well:
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking (Available for CPU 1 Conguration only)
Use this feature to congure port overclocking settings between the port specied above
and downstream components. The options are Distinct and Common.
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Conguration only)
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device specied by to user to enhance system performance. The options are Auto, 128B, and 256B.
IOAT Conguration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can send critical data to a particular cache without writing through to memory. Select No in this item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints" to help optimize the processing of each transaction occurred in the target memory space. The options are Yes and No.
Prioritize TPH (TLP Processing Hint)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate and optimize the processing of certain transactions in the system memory. The options are Enable and Disable.
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Relaxed Ordering
Select Enable to enable Relaxed Ordering support which will allow certain transactions to violate the strict-ordering rules of PCI and to be completed prior to other transactions that have already been enqueued. The options are Disable and Enable.
Intel® VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms, providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable.
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance. The options are Enable and Disable.
PassThrough DMA
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access) to enhance system performance. The options are Enable and Disable.
ATS
Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d engine to enhance system performance. The options are Enable and Disable.
Posted Interrupt
Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization efciency by simplifying interrupt migration and lessening the need of physical
interrupts. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access) to enhance system performance. The options are Enable and Disable.
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Intel® VMD Technology
Intel® VMD for Volume Management Device on CPU1/CPU2
VMD Conguration for PStack0/VMD Conguration for PStack1/VMD Conguration for PStack2
Intel® VMD for Volume Management Device
Select Enable to enable Intel Volume Management Device support for the device speci-
ed by the user. The options are Disable and Enable.
IIO-PCIE Express Global Options
PCI-E Completion Timeout Disable
Select Yes to disable the PCI-E Completion Time-out settings. The options are Yes, No, and Per-Port.
South Bridge
The following South Bridge information will display:
USB Module Version
USB Devices
Legacy USB Support
Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support if there are no legacy USB devices present. Select Disable to have all USB devices available for EFI applications only. The options are Enabled, Disabled and Auto.
XHCI Hand-Off
This is a work-around solution for operating systems that do not support XHCI (Extensible Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The options are Enabled and Disabled.
Port 60/64 Emulation
Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete legacy USB keyboard support for the operating systems that do not support legacy USB devices. The options are Enabled and Disabled.
Server ME (Management Engine) Conguration
This feature displays the following system ME conguration settings.
General ME Conguration
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Operational Firmware Version
Backup Firmware Version
Recovery Firmware Version
ME Firmware Status #1/ME Firmware Status #2
Current State
Error Code
PCH SATA Conguration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following items:
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel PCH chip. The options are Enable and Disable.
Congure SATA as (Available when the item above: SATA Controller is set to
enabled)
Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and
RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.
SATA RSTe Boot Info (Available when the item "Congure SATA as" is set to
"RAID")
Select Enable to enable full int13h support for devices connected to the SATA controller which will allow these SATA devices to be used as boot devices for system boot. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enabled, the SATA AHCI controller manages the power use of the SATA link. The controller will put the link in a low power mode during an extended period of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Enable and Disable.
SATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
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SATA Port 0 - SATA Port 7
Hot Plug
Select Enable to support Hot-plugging for the device installed on a selected SATA port which will allow the user to replace the device installed in the slot without shutting down the system. The options are Enable and Disable.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA
port specied by the user to start a COMRESET initialization. The options are Enable and
Disable.
SATA Device Type
Use this item to specify if the device installed on the SATA port selected by the user should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
PCH sSATA Conguration
When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA devices that are supported by the PCH sSATA controller and displays the following items:
sSATA Controller
This item enables or disables the onboard sSATA controller supported by the Intel SCU. The options are Enable and Disable.
Congure sSATA as
Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.
sSATA RSTe Boot Info (Available when the item "Congure SATA as" is set to
"RAID")
Select Enable to enable full int13h support for devices connected to the SATA controller which will allow these SATA devices to be used as boot devices for system boot. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enable, the sSATA AHCI controller manages the power use of the SATA link. The controller will put the link in a low power mode during an extended period of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disable and Enable.
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sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
sSATA Port 0/sSATA Port 1
Hot Plug
Select Enable to support Hot-plugging for the device installed on an sSATA port selected by the user which will allow the user to replace the device installed in the slot without shutting down the system. The options are Disable and Enabled.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the
sSATA port specied by the user to start a COMRESET initialization. The options are
Enable and Disable.
sSATA Device Type
Use this item to specify if the device installed on the sSATA port specied by the user
should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
PCIe/PCI/PnP Conguration
The following PCI information will be displayed:
PCI Bus Driver Version
PCI Devices Common Settings:
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Enabled and Disabled.
SR-IOV Support (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Enabled and Disabled.
MMIO High Base
Use this feature to select the base memory size according to memory-address mapping for the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T, 40T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this feature to select the high memory size according to memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
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PCI PERR/SERR Support
Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/ PCI-E Parity Error). The options are Enabled and Disbled.
Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read request for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned
to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.
NVMe Firmware Source
This feature determines which type of the NVMe rmware should be used in your system.
The options are Vendor Dened Firmware and AMI Native Support.
VGA Priority
This feature selects the graphics device to be used as the primary video display for system boot. The options are Auto, Onboard and Offboard.
CPU1 Slot 1 PCI-E 3.0 x8 OPROM/CPU2 Slot 2 PCI-E 3.0 x16 OPROM/CPU1 Slot 3 PCI-E 3.0 x8 OPROM/CPU2 Slot 4 PCI-E 3.0 x16 OPROM/CPU2 Slot 5 PCI-E 3.0 x16 OPROM/CPU1 Slot 6 PCI-E 3.0 x8 OPROM/CPU1 Slot 7 PCI-E 3.0 x8 OPROM/M.2-C1
3.0 x4 OPROM/M.2-C2 3.0 x4 OPROM
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware Interface)
device installed on the PCI-E slot specied by the user. Select Legacy to allow the user to boot the computer using a legacy device installed on the PCI-E slot specied by the user. The
options are Disabled, Legacy and EFI. (Note: Riser card names may differ in each system.)
Onboard LAN Device
Select Enable to use onboard LAN devices for internet connections. The options are Disabled and Enable.
Onboard LAN Option ROM Type
Use this feature to select the rmware type to be used for onboard LAN ports for system
boot. The options are Legacy and EFI.
Onboard LAN1 Option ROM
Use this feature to select the type of device to be installed in LAN Port1 used for system boot. The options are PXE, iSCSI, and Disabled.
Onboard LAN2 Option ROM
Use this feature to select the type of device to be installed in LAN Port2 used for system boot. The options are PXE and Disabled.
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Onboard Video Option ROM
Use this feature to select the Onboard Video Option ROM type. The options are Disabled, Legacy and EFI.
Network Stack Conguration
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible
Firmware Interface) for network stack support. The options are Enabled and Disabled.
*If "Network Stack" is set to Enabled, the following items will display:
Ipv4 PXE Support
Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create the Ipv4 PXE boot option. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create the Ipv4 HTTP boot option. The options are Enabled and Disabled.
Ipv6 PXE Support
Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create the Ipv6 PXE boot option. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create the Ipv6 HTTP boot option. The options are Enabled and Disabled.
PXE Boot Wait Time
Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The default is 0.
Media Detect Time
Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media (Internet connection or LAN port). The default is 1.
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Super IO Conguration
Super IO Chip AST2500
Serial Port 1 Conguration
Serial Port 1
Select Enabled to enable the onboard serial port specied by the user. The options are
Enabled and Disabled.
Device Settings
This feature displays the base I/O port address and the Interrupt Request address of a
serial port specied by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature species the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specied.
The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
Serial Port 2 Conguration
Serial Port 2
Select Enabled to enable the onboard serial port specied by the user. The options are
Enabled and Disabled.
Device Settings
This feature displays the base I/O port address and the Interrupt Request address of a serial
port specied by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature species the base I/O port address and the Interrupt Request address of Serial
Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a serial port specied. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
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Serial Port 2 Attribute
Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection. The options are COM and SOL.
Serial Port Console Redirection
COM 1 Console Redirection
Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client machine to be connected to a host machine at a remote site for networking. The options are Enabled and Disabled.
*If the item above set to Enabled, the following items will become available for conguration:
Console Redirection Settings (when COM1 Console Redirection is
Enabled)
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are 7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
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