Supermicro X11DPFR-S(N) User Manual

X11DPFR-S(N)

USER’S MANUAL

Revision 1.0

The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

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of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
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proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0

Release Date: August 21, 2017

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DPFR-S(N) motherboard.

About This Motherboard

The X11DPFR-S(N) motherboard supports dual Intel® Xeon 81xx/61xx/51xx/41xx/31xx series
processors (Socket P) with a TDP (Thermal Design Power) of up to 165W and 2 UPI (UltraPath
Interconnect) of up to 10.4GT/s. Built with the C621 PCH, this motherboard supports up to

1.5TB of Load Reduced DIMM (LRDIMM), Registered DIMM (RDIMM), and Non-Volatile

DIMM (NV-DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz modules in 12 slots. It o󰀨ers

support for Intel Intelligent Power Node Manager, Active Management Technology, and vPro
technology. The X11DPFR-S(N) includes two slots for riser card support, ten SATA 3.0 ports,
one SIOM slot, and 4 NVMe ports. The X11DPFR-S(N) provides maximum performance,

system cooling, PCI-E capacity, and I/O exibility. This motherboard is optimized for PCI­Express expansion with exible IO support, and is ideal for cloud and server platforms.

Please note that this motherboard is intended to be installed and serviced by professional
technicians only. For processor/memory updates, please refer to our website at http://www.
supermicro.com/products/.

Manual organization

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel C621 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules and other hardware components into the system.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C lists standardized warning statements in various languages.

Appendix D contains UEFI BIOS Recovery instructions.

3

X11DPFR-S(N) User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

Quick Reference ...............................................................................................................11

Quick Reference Table ......................................................................................................12

Motherboard Features .......................................................................................................13

1.2 Processor and Chipset Overview .......................................................................................17

1.3 Special Features ................................................................................................................17

Recovery from AC Power Loss .........................................................................................18

1.4 System Health Monitoring ..................................................................................................18

Onboard Voltage Monitors ................................................................................................18

Fan Status Monitor with Firmware Control .......................................................................18

Environmental Temperature Control .................................................................................18

System Resource Alert......................................................................................................19

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................19

1.7 Super I/O ............................................................................................................................19

1.8 Advanced Power Management ..........................................................................................20

Intel® Intelligent Power Node Manager (IPNM).................................................................20

Management Engine (ME) ................................................................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

Precautions .......................................................................................................................21

Unpacking .........................................................................................................................21

2.2 Motherboard Installation .....................................................................................................22

Tools Needed ....................................................................................................................22

Location of Mounting Holes ..............................................................................................22

Installing the Motherboard.................................................................................................23

2.3 Processor and Heatsink Installation ....................................................................................24

The Processor ...................................................................................................................24

Overview of the Processor Socket Assembly ...................................................................25

Overview of the Processor Heatsink Module ....................................................................26

Preparing the CPU Socket for Installation ........................................................................27

5

X11DPFR-S(N) User's Manual

Removing the Dust Cover from the CPU Socket .............................................................27

Attaching the Processor to the CPU/Heatsink Carrier ......................................................28

Attaching the CPU/Carrier Assembly to the Passive Heatsink to Form the Processor

Heatsink Module (PHM) ....................................................................................................29

Installing the Processor Heatsink Module (PHM) ............................................................30

Removing the Processor Heatsink Module (PHM) ...........................................................31

2.4 Memory Support and Installation .......................................................................................32

Memory Support ................................................................................................................32

DIMM Population Requirements .......................................................................................33

DIMM Installation ..............................................................................................................36

DIMM Removal .................................................................................................................36

2.5 Rear I/O Ports ....................................................................................................................37

2.7 Connectors .........................................................................................................................45

Power Connector ..............................................................................................................45

Headers .............................................................................................................................46

2.8 Jumper Settings .................................................................................................................52

How Jumpers Work ...........................................................................................................52

2.9 LED Indicators ....................................................................................................................56

2.10 PCI-E 3.0 Slots .................................................................................................................59

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................60

Before Power On ..............................................................................................................60

No Power ..........................................................................................................................60

No Video ...........................................................................................................................61

System Boot Failure .......................................................................................................61

Memory Errors ..................................................................................................................61

Losing the System's Setup Conguration .........................................................................62

When the System Becomes Unstable ..............................................................................62

3.2 Technical Support Procedures ...........................................................................................64

3.3 Frequently Asked Questions ..............................................................................................65

3.4 Battery Removal and Installation .......................................................................................66

Battery Removal ................................................................................................................66

Proper Battery Disposal ....................................................................................................66

6

Battery Installation .............................................................................................................66

3.5 Returning Merchandise for Service ....................................................................................67

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................68

Starting the Setup Utility ...................................................................................................68

4.2 Main Setup .........................................................................................................................69

4.3 Advanced Setup Congurations .........................................................................................71

4.4 Event Logs .......................................................................................................................103

4.5 IPMI ..................................................................................................................................105

4.6 Security Settings ..............................................................................................................108

4.7 Boot Settings .................................................................................................................... 111

4.8 Save & Exit .......................................................................................................................113

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................11 7

B.2 SuperDoctor® 5 .................................................................................................................118

Appendix C Standardized Warnings

Battery Handling ..............................................................................................................119

Product Disposal .............................................................................................................121

Appendix D UEFI BIOS Recovery

7

X11DPFR-S(N) User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

Note: This motherboard was designed to be a part of an integrated server solution.
No shipping package will be included in the shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.

8

Figure 1-1. Motherboard Image

Chapter 1: Introduction

Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

9

X11DPFR-S(N) User's Manual

Figure 1-2. X11DPFR-S(N) Motherboard Layout

(not drawn to scale)

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

JPB1

JBT1

JRK1

X11DPFR-S(N)
DESIGNED IN USA

REV:1.00

JVRM1

CPU1

JSIOM1

PCH

+

JS2

JS1

BT1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JPME1

JNVI2C1

LED1

BIOS

JSDCARD1
S-SATA0

COM1

JPG1

JIPMB1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

P1-DIMMC1

P1-DIMMB1

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

P2-DIMMF1

P2-DIMME1

P1-DIMMA1

P2-DIMMD1

FAN2

CPU2

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

JPWR10

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JPWR_HDD2

JNVME3

JNVME4

JPWRBT1

JPWR_HDD1

JNVME1

FAN3FAN1

JNVME2

Note: Components not documented are for internal testing only.

10

JSXB3

Quick Reference

JPG1

BMC_HB_LED1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSIOM1

BT1

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

JSXB3

JRK1

I-SATA4~7

JPWR_HDD3

I-SATA0~3

JS2

JS1

JTPM1

USB0/1

IPMI LAN

JPB1

P1-DIMMB1

P1-DIMMA1

PCH

BMC

JSIOM1

BT1

+

JRK1

(3.0)

USB0/1

IPMI_LAN1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

UIDLED1

UID_LED1

COM1

LED1

BIOS

JSDCARD1
S-SATA0

VGA

MAC CODE

CPU1 PCI-E 3.0 X16

JIPMB1

JSXB1

JSDCARD1

JPME1

JCPLD1

JNVI2C1

P1-DIMMD1

P1-DIMME1

VGA

JBT1

P1-DIMMF1

COM1

LED1

JVRM1

JCPLD1

Chapter 1: Introduction

JIPMB1

JVRM2

S_SATA1

S_SATA0

JSXB1

X11DPFR-S

REV:1.00

CPU1 PCI-E 3.0 X8

JSXB2

JSXB2

CPU2 PCI-E 3.0 X8

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

CPU2

FAN2

FAN3FAN1

DESIGNED IN USA

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JNVME4

JPWR10

JPWR_HDD2

JPWR_HDD1

JPWR10

JPWR9

JNVME3

JNVME4

JPWR_HDD2
JPWR_HDD1

JNVME1

JNVME2

FAN1

FAN3FAN2

JPWRBT1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-

nections.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for internal testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

11

X11DPFR-S(N) User's Manual

Quick Reference Table

Jumper Description Default Setting

JBT1 Clear CMOS Open (Normal)

JPME1 ME Recovery Pins 1-2 (Normal)

JVRM1 VRM SMB Clock (to BMC or PCH) Pins 1-2 (BMC, Normal)

JVRM2 VRM SMB Data (to BMC or PCH) Pins 1-2 (BMC, Normal)

Connector Description

Battery (BT1) Onboard CMOS battery

FAN1~3 System cooling fan headers

IPMI_LAN Dedicated IPMI LAN port

JIPMB1 4-pin external BMC I2C header (for an IPMI card)

JNVME1~4 NVMe OcuLink Ports

JNVI2C1 NVMe I2C header

JPWR9/JPWR10 8-pin Power Connector 9 (12V_in)/Power Connector 10 (Ground)

JPWR_HDD1/2/3 HDD Power headers 1/2/3

JRK1 RAID Key for NVMe devices

JS1/2 MiniSAS HD SATA 3.0 Ports

JSDCARD1 Micro SD Card slot

JTPM1 Trusted Platform Module (TPM) connector

(I-)SATA0~3, 4~7 I- SATA 3.0 connectors supported by the Intel PCH

(S-)SATA0/1 S-SATA 3.0 connectors supported by the Intel PCH

JSXB1 PCI-E 3.0 x16 Right hand riser (CPU1)

JSXB2 PCI-E 3.0 (x8+x8) SMCI Proprietary slot (CPU1 & CPU2)

JSXB3 PCI-E 3.0 x16 Left hand riser (CPU2)

USB0/1 Back panel USB 3.0 ports

VGA Back panel VGA port

LED Description Status

UID_LED1 UID (Unit Identier) LED Solid Blue: Unit Identied

LED1 Onboard Power LED On: Onboard Power On

BMC_HB_LED1 BMC Heartbeat LED Blinking Green: BMC Normal

Note: Table is continued on the next page.

12

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Dual Intel Xeon 81xx/61xx/51xx/41xx/31xx series processors (Socket P) which o󰀨er 2 UPI (UltraPath Interconnect) of up

to 10.4GT/s

Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on page 16 to determine which slots or devices may be a󰀨ected.

Memory

• Integrated memory controller supports up to 1536GB of ECC Load Reduced DIMM (LRDIMM), Registered DIMM (RDIMM),

and Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) 2666/2400/2133 MHz modules in 12 slots

DIMM Size

• Up to 128GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel C621

Expansion Slots

• Two (2) PCI-Express 3.0 (x16) slots supported by CPU1 and CPU2

• One (1) PCI-Express 3.0 x16 (x8 + x8) SMCI storage Slot (JSXB2)

• One (1) PCI-Express 3.0 x16 SIOM LAN Port

BaseBoard Management Controller (BMC)

• ASpeed AST 2500 Baseboard Management Controller (BMC) supports IPMI 2.0

• One (1) dedicated IPMI LAN located on the rear IO backpanel

Graphics

• Graphics controller via AST 2500 BMC (Baseboard Management Controller)

I/O Devices

Ten (10) SATA ports

• SATA 3.0

• I-SATA0~3, I-SATA4~7

• S-SATA0/1

• RAID (PCH)

• NVMe OcuLink Ports

• RAID 0, 1, 10

Four (4) NVMe OcuLink ports

• JNVME1~4

Peripheral Devices

• One (1) USB 3.0 port on the rear I/O panel (USB 0/1)

Note: The table above is continued on the next page.

13

X11DPFR-S(N) User's Manual

Motherboard Features

BIOS

• 256Mb Aten BIOS

• ACPI 3.0 or later, SPI dual/quad speed support, and SMBIOS 2.7 or later

Power Management

• ACPI power management

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 3.0 (available when the Supermicro Power Manager [SPM] is installed and a

special power supply is used. See the note on page 20.)

• Management Engine (ME)

System Health Monitoring

• Onboard voltage monitoring for +1.8V, +3.3V, +5V, +/-12V, +3.3V standby, +5V standby, VBAT, HT, memory, PCH

temperature, system temperature, and memory temperature

• CPU 5+1-phase switching voltage regulator

• CPU thermal trip support

• Status monitor for speed control

• Status monitor for on/o󰀨 control

• CPU Thermal Design Power (TDP) support of 165W (See Note 1 on next page.)

Fan Control

• Three 4-pin fan headers

• Fan status monitoring via IPMI connections

• Low-noise fan speed control

System Management

• Trusted Platform Module (TPM) support

• PECI (Platform Environment Control Interface) 2.0 support

• Power supply monitoring

• SuperDoctor® 5, Watch Dog, Non-maskable interrupt (NMI), RoHS

LED Indicators

• CPU/Overheating

• Power/Suspend-state indicator

• Fan failure

• UID/remote UID

• HDD activity

• LAN activity.

Dimensions

• 8.53" (W) x 19.66" (L) (216.66 mm x 499.36 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and

heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note: The table above is continued on the next page.

14

Chapter 1: Introduction

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC log-in information upon initial
system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf

15

X11DPFR-S(N) User's Manual

System Block Diagram

A1

B1

C1

D1

E1

F1

DDRIV

2133/2666

Figure 1-3.

VR13

5+1 PHASE

165W

#3

#2A

#2B

#1

UPI

10.4/11.2G

P0

UPI

P1

UPI

VCCP1 12vVCCP0 12v

VR13

5+1 PHASE

165W

P1

P0

#1B #3 #2

J1

H1

G1

M1

L1

2#UPC1#UPC

13:ICEP03:ICEP

1:DI TEKCOS0:DI TEKCOS

2IMD2IMD

DDRIV

2133/2666

RJ45

DDR4

BMC Boot Flash

VGA CONN

JSXB1

JSXB2

LAN3

RTL8211F

SPI

PCI-E X16

PCI-E X8

PCI-E X16

RGRMII

BMC

AST2500

COM1

Connector

SIOM

RMII/NCSI

NCSI
master

M.2

SPI

SFI

PCI-E X1

PCI-E X4

PCI-E X1

USB 2.0

ESPI

SFI

NCSI

LBG-1G 15W
LBG-4 w/ X8 UPLINK

4x 10G SFI
NO QuickAssist
19W

#5

#12 USB2.0

SW

UPLINK PCI-E X8

DMI3

Intel PCH

PCI-E X8

6.0 Gb/S

6.0 Gb/S

USB 2.0

USB 3.0

SPI

TPM HEADER

Debug Card

PCI-E x16

S-SATA x2
SATA-DOM

SATA

MINISAS-HD

I-SATA x8

USB

PCI-E X4 X4 X4 X4

JSXB3

NVME#4

NVME#3

NVME#2

NVME#1

Temp Sensor
NCT7718W

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

BIOS

16

FAN SPEED

CTRL

FRONT PANEL

SYSTEM POWER

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx
series processors (Socket P) and the Intel C621 chipset, the X11DPFR-S(N) motherboard

provides system performance, power e󰀩ciency, and feature sets to address the needs of

next-generation computer users. With 6-channel memory support and four NVMe ports, the
X11DPFR-S(N) provides maximum performance, cutting-edge memory technology, and PCI-E
capacity. This motherboard is optimized for general purpose server platforms.

The dual Xeon 81xx/61xx/51xx/41xx/31xx series processors and the Intel C621 PCH support
the following features:

• Intel® AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the

previous generation)

• High availability interconnect between multiple nodes

• Rich set of available IOs, full exibility in usage model, and software stack

• Dedicated subsystems for customer innovation

• Increased platform security with Intel® Boot Guard for hardware-based boot integrity pro-

tection; prevention of bu󰀨er overow class security threads

• Integrated solution for real-time compression, streaming write & read performance in-

creases from gen-to-gen

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Single standard server development (Accelerate NFV transition) consolidating application,

control, and data plane workloads, reducing total platform investment needs

Note: Node Manager 3.0 support is dependent on the power supply used in the system.

1.3 Special Features

This section describes the health monitoring features of the motherboard. The motherboard
has an onboard ASpeed 2500 Baseboard Management Controller (BMC) that supports system
health monitoring.

17

X11DPFR-S(N) User's Manual

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to

remain powered o󰀨 (in which case you must press the power switch to turn it back on), or

for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

1.4 System Health Monitoring

This section describes the health monitoring features of the X11DPFR-S(N) motherboard. The
motherboard has an onboard Baseboard Management Controller (BMC) chip that supports
system health monitoring. Once a voltage becomes unstable, a warning is given or an error

message is sent to the screen. The user can adjust the voltage thresholds to dene the

sensitivity of the voltage monitor.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. The user

can adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time

readings of these voltage levels are all displayed in BIOS.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of

the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be

turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

18

Chapter 1: Introduction

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system

and application software. This enables the system to automatically turn on and o󰀨 peripherals

such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with
Windows 10, and Windows 2012 operating systems.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas

where noisy power transmission is present, you may choose to install a line lter to shield

the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.

1.7 Super I/O

The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power

Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

19

X11DPFR-S(N) User's Manual

1.8 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power

management for maximum energy e󰀩ciency. Although IPNM Specication Version 2.0/3.0

is supported by the BMC (Baseboard Management Controller), your system must also have

IPNM-compatible Management Engine (ME) rmware installed to use this feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides

Server Platform Services (SPS) to your system. The services provided by SPS are di󰀨erent

from those provided by the ME on client platforms.

20

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following

measures are generally su󰀩cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

21

X11DPFR-S(N) User's Manual

2.2 Motherboard Installation

All motherboards have standard mounting holes to t di󰀨erent types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that

the metal stando󰀨s click in or are screwed in tightly.

Phillips
Screwdriver
(1)

Tools Needed

JSXB3

CPU2 PCI-E 3.0 X16

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

1

JS2

JS1

P1-DIMMC1

P1-DIMMB1

JSIOM1

PCH

P1-DIMMA1

Phillips
Screws (12)

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

LED1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

BIOS

JSDCARD1
S-SATA0

JPME1

JBT1

JRK1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

JNVI2C1

CPU1

+

BT1

VGA

MAC CODE

CPU1 PCI-E 3.0 X16

JIPMB1

JCPLD1

JSXB1

X11DPFR-S

REV:1.00

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

S t a n d o 󰀨 s ( 1 2

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

JSXB2

CPU2 PCI-E 3.0 X8

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

CPU2

FAN3FAN1

FAN2

DESIGNED IN USA

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

22

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the back of the chassis.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install stando󰀨s in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or

components might look di󰀨erent from those shown in this manual.

23

X11DPFR-S(N) User's Manual

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the fan. Also, improper CPU installation or socket misalignment can cause serious
damage to the CPU or the motherboard that will require RMA repairs. Please read and follow
all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing or

changing any hardware components. Make sure that you install the processor into the
CPU socket before you install the CPU heatsink.

• If you buy a CPU separately, make sure that you use an Intel-certied multi-directional

heatsink only.

• Make sure to install the motherboard into the chassis before you install the CPU heatsink.

• When receiving a motherboard without a processor pre-installed, make sure that the plastic

CPU socket cap is in place and none of the socket pins are bent; otherwise, contact your
retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

The Processor

Note: All graphics, drawings and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same
as those shown in this manual.

(The 81xx/61xx/51xx/41xx/31xx Processor)

24

Chapter 2: Installation

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the 81xx/61xx/51xx/41xx/31xx processor 2) CPU/
heatsink carrier, 3) dust cover, and 4) CPU socket.

1. The 81xx/61xx/51xx/41xx/31xx Processor

2. CPU/Heatsink Carrier

3. Dust Cover

4. CPU Socket

CPU Socket Assembly

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

25

X11DPFR-S(N) User's Manual

Overview of the Processor Heatsink Module

The processor heatsink module (PHM) contains 1) a passive heatsink, 2) a CPU/heatsink
carrier, and 3) The 81xx/61xx/51xx/41xx/31xx Processor.

1. Passive Heatsink

2. CPU/Heatsink Carrier

3. 81xx/61xx/51xx/41xx/31xx Processor

Processor Heatsink Module

(Bottom View)

26

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (LGA3647) socket, and 4) a back
plate. These components are pre-installed on the motherboard before shipping.

Processor Socket Assembly

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the LGA3647 socket and socket pins
as shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

WARNING!

Socket Cover

Socket Pins

LGA3647 Socket

27

X11DPFR-S(N) User's Manual

Attaching the Processor to the CPU/Heatsink Carrier

To properly install the CPU onto the CPU/heatsink carrier, please follow the steps below.

1. Locate Pin 1 (Notch A), Notch B, and Notch C on the CPU and locate Pin 1 (Notch A),
Notch B, and Notch C on the CPU/heatsink carrier.

2. Align Pin 1 (Notch A), Notch B, and Notch C on the CPU with the corresponding
notches on the carrier. Once they are aligned, carefully insert the CPU into the carrier
until you hear a click. Once the CPU is properly mounted onto the carrier, the CPU/
carrier assembly is made.

Pin 1

CPU
(Upside Down)

Align CPU Notch C
and Clip C

A

A

B

Align CPU Pin 1

Align CPU Notch B
and Clip B

C

A

B

C

Allow Clip B to
Latch on to CPU

Package Carrier
(Upside Down)

B

C

CPU Mounted on

Allow Clip C to
Latch on to CPU

Package Carrier
(Upside Down)

CPU Mounted on
Package Carrier
(Rightside Up)

28

Chapter 2: Installation

Attaching the CPU/Carrier Assembly to the Passive Heatsink to
Form the Processor Heatsink Module (PHM)

After you have made a CPU/carrier assembly, please follow the steps below to mount the
assembly onto the heatsink to create the Processor Heatsink Module (PHM).

1. Place the heatsink upside down with the thermal grease facing up. Locate two larger
mounting holes (A, B) at the diagonal corners of the heatsink, and two smaller mounting
holes (C, D) on the heatsink.

2. Hold the CPU/carrier at the center edge, and turn it upside down with the CPU pins
facing up. Locate the two larger holes (1, 2) at the diagonal corners of the carrier and
the smaller holes of the same size (3, 4) on the carrier. Please note the mounting clips
located next to every mounting hole on the carrier.

3. Align the larger holes (1, 2) on the
carrier against the larger mounting holes
(A, B) on the heatsink and smaller holes
(3, 4) on the carrier against the smaller
mounting holes (C, D) on the heatsink.
Insert the mounting clips next to the
larger hole on the carrier into the larger
mounting hole on the heatsink (1 A,
2 B) and snap the mounting clips next
to the smaller holes on the carrier onto
the edges of the heatsink next to the
smaller holes (3 C, 4 D) making sure
that the mounting clips snap into place,
and that the CPU/carrier assembly is
properly mounted onto the heatsink. By
mounting the CPU/carrier assembly to
the heatsink, the Processor Heatsink
Module (PHM) is assembled.

CPU and Carrier Package

(Upside Down)

Mounting
Clips

CPU and Carrier Package

(Upside Down)

4

D

Heatsink

(Upside Down)

D

Mounting
Clips

2

1

B

A

B

CPU and Carrier Package

(Rightside Up)

Mounting
Clips

3

c

Thermal paste

On Locations (C, D), the
clips snap onto
the heatsink’s sides

c

29

On Locations of (A, B), the
clips snap through the heatsink’s
mounting holes

A

Make sure Mounting
Clips snap into place

X11DPFR-S(N) User's Manual

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on the previous page, align the processor heatsink module with the
CPU socket on the motherboard.

2. Align the large hole on the heatsink against the large notch on the CPU socket, the
small hole on the heatsink against the small notch on the socket. Carefully insert the

PHM into the socket, making sure that the large and small notches t through the
corresponding mounting holes on the socket. The PHM will only t one way. If it does
not t correctly, remove it and try again.

3. Using a T30-size star driver bit, tighten four screws into the mounting holes on the
socket to securely install the PHM into the motherboard, starting with the mounting hole
marked #1 (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
CPU and the socket.

#2

#4

Tighten the
screws in the
sequence of 1, 2,
3, 4.

#4

#1

#2

#3

#3

#1

Small Hole

Small

Notch

Use a torque of 8 lbf

Processor Heatsink

Module (Bottom View)

Large

Hole

#3

#1

Large
Notch

#3

#1

30

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM)

Before starting to remove the processor heatsink module (PHM), unplug power cord from
the power outlet.

1. Using a T30-size star driver, turn the screws on the PHM counterclockwise to loosen it
from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2, 1).

2. After all four screws are removed, wiggle the PHM gently and pull up to remove it from
the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#2

#4

Removing the
screws in the
sequence of 4, 3,
2, 1.

#4

#1

#2

#3

#3

#1

#4

#1

Starting from here

#2

#3

#2

#4

#3

31

X11DPFR-S(N) User's Manual

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.

Important: Exercise extreme care when installing or removing DIMM modules to pre-

vent any damage.

Memory Support

The X11DPFR-S(N) supports up to 1.5TB of LRDIMM, Registered DIMM (RDIMM), and Non­Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz modules in 12 slots.
Populating these DIMM modules with a pair of memory modules of the same type and size
will result in interleaved memory, which will improve memory performance.

Notes: 1. Be sure to use the memory modules of the same type and speed on the

motherboard. Mixing of memory modules of di󰀨erent types and speeds is not allowed.

2. When installing memory modules, be sure to populate the rst DIMM module on
the blue memory slot, which is the rst memory slot of a memory channel, and then
populate the second DIMM in the black slot if 2DPC memory conguration is used. 3.

Using unbalanced memory topology by populating two DIMMs in one channel while
populating one DIMM in another channel will result in reduced memory performance.

DDR4 Memory Support for the Intel Xeon 81xx/61xx/51xx/41xx/31xx Series Processors

Ranks

Type

RDIMM SRx4 8 GB 16 GB 2666 2666

RDIMM SRx8 4 GB 8 GB 2666 2666

RDIMM DRx8 8 GB 16 GB 2666 2666

RDIMM DRx4 16 GB 32 GB 2666 2666

RDIMM 3Ds

LRDIMM QRx4 32 GB 64 GB 2666 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666 2666

8RX4 N/A 4H-128GB 2666 2666

QRX4 N/A 2H-64GB 2666 2666

8Rx4 N/A 4H-128 GB 2666 2666

DIMM Capacity

(GB)

4 Gb 8 Gb 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

2 Slots per Channel

1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)

DDR4 Memory Support for the Intel Xeon 81xx/61xx/51xx/41xx/31xx Series Processors

Ranks

Type

RDIMM SRx4 8 GB 16 GB 2666

RDIMM SRx8 4 GB 8 GB 2666

RDIMM DRx8 8 GB 16 GB 2666

RDIMM DRx4 16 GB 32 GB 2666

RDIMM 3Ds

LRDIMM QRx4 32 GB 64 GB 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666

8RX4 N/A 4H-128GB 2666

QRX4 N/A 2H-64GB 2666

8Rx4 N/A 4H-128 GB 2666

DIMM Capacity

(GB)

4 Gb 8 Gb 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

1 Slot per Channel

1DPC (1-DIMM per Channel)

32

Chapter 2: Installation

DIMM Population Requirements

For optimal memory performance, follow the tables below when populating memory modules.

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),

D (1RX8), E (2RX8)

• 3DS RDIMM Raw Cards: A/B (4RX4)

• non-3DS LRDIMM Raw Cards: D/E (4RX4)

• 3DS LRDIMM Raw Cards: A/B (8RX4)

General Population Requirements

DIMM Mixing Rules

• All DIMMs must be DDR4 DIMMs only.

• X4 and X8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across di󰀨erent channels, and across

di󰀨erent sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across di󰀨erent channels, and across

di󰀨erent sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed NotAllowed Allowed

33

X11DPFR-S(N) User's Manual

DDR4 Only Socket Level Population Requirements

DDR4 Socket Level Minimum Population Requirements

• There should be at least one DDR4 DIMM per socket.

• If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.

• Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.

DDR4 Only Memory Populations with Possible Mixes

DDR4 RDIMM DIMM0/DIMM1

Within

IMC

DIMM

Popula-

tion

DDR0 x8, None, x8, x8 x4, None, x4, x4 x8, x4, or x4, x8 Single Rank, None

DDR1 None or same as

DDR2 None or same as

Cong. Set A

DDR0

DDR1 (excludes

DIMM 1 in 5DIMM

congurations)

DDR4 Only Memory Populations with Possible Mixes

3DS LRDIMM or 3DS RDIMM DIMM0/DIMM1 Cong. Set A Possible Mixes

Within IMC

DIMM Popu-

lation

DDR0 x4, None, x4, x4 Quad Rank, None

DDR1 None or same as DDR0

DDR2 None or same as DDR1

DIMM0/DIMM1

Cong. Set B

None or same as

DDR0

None or same as

DDR1 (excludes

DIMM 1 in 5DIMM

congurations)

DIMM0/DIMM1 Con-

g. Set C

None or same as

DDR0

None or same as
DDR1 (excludes DIMM
1 in 5DIMM congura-

tions)

Cannot mix 3DS LRDIMM and RDIMM

Possible Mixes

DIMM0/DIMM1

Single Rank, Single Rank

Dual Rank, Single Rank,

Dual Rank, None

Dual Rank, Dual Rank,

Single Rank, Single Rank

DIMM0/DIMM1

Quad Rank, Quad Rank

LRDIMMs DIMM0/DIMM1 Possible Mixes

Within IMC

DIMM Popu-

lation

DIMM Population

within an IMC

(Note: Uniformly
populate with x8
DRAMs DIMMs)

DIMM Population

within an IMC

(Note: Non-equal

in rank pair of x8

DIMMs)

DDR4 Only Memory Populations with Possible Mixes

DIMM0/DIMM1

DDR0 x4, None, x4, x4 Quad Rank, None

DDR1 None or same as DDR0

DDR2 None or same as DDR1

Note: Requirements
*Match DIMM types installed across DDR

channels within an IMC

*Always populate iMC0 rst

Quad Rank, Quad Rank

DDR4 Only 2SPC Memory Conguration with x8 DIMMs

Total # of

DIMMs

1 x8 DIMM Must be installed on iMC0 DDR Channel 0 1 N/A

2 x8 DIMMs DDR0: Populate with 1 DIMM

3 x8 DIMMs DDR0: Populate with 1 DIMM

4 x8 DIMMs DDR0: Populate with 2 DIMMs

5 x8 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x8 DIMMs Populate 2 DIMMs per DDR channel x SVLS

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1

(5DIMMs)

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

DDR0: Populate with 1 DIMM

mance)

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1

of Ranks

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

Virtual

Lock Step

34

DIMM Popula-

tion within an

IMC

Note: Uniformly

populate with x4

DRAMs/DIMMs

Chapter 2: Installation

DDR4 Only 2SPC Memory Conguration with x4 DIMMs

Total # of

DIMMs

1 x4 DIMM Must be installed on iMC0 DDR Channel 0 1 Y, only Bank VLS

2 x4 DIMMs DDR0: Populate with 1 DIMM

3 x4 DIMMs DDR0: Populate with 1 DIMM

4 x4 DIMMs DDR0: Populate with 2 DIMMs

5 x4 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x4 DIMMs Populate 2 DIMMs per DDR channel x Y

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

of Ranks

Adaptive Virtual

Lock Step

>1 Y

1 Y, only Bank VLS

>1 Y

1 Y, only Bank VLS

>1 Y

x Y

>1 Y

DIMM Popula-

tion within an

IMC

Note: Non-

equal in rank

pair of x4

DIMMs)

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1

(5DIMMs)

DDR0: Populate with 1 DIMM

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

mance)

DDR1

>1 Y

>1 Y

x Y

>1 Y

DDR4 Only 2SPC Memory Conguration with x8/x4 DIMMs Mixed

DDR4 RDIMM Total # of DIMMs DDR Channel ADDC/SDDC

DIMM Popula-

tion within an

IMC

1 pair of x8, x4 DDR0: Populate with 1 DIMM

2 pairs of x8, x4 Populate with 1 pair of DIMMs on DDR0,

3 pairs of x8, x4 A pair of DIMMs on DDR0, and identical pair on

DDR1: Populate the second DIMM (for best perfor-

mance)

and identical pair on DDR1

DDR1, and DDR2

Features

No

No

No

35

X11DPFR-S(N) User's Manual

1

+

DESIGNED IN USA

MAC CODE

X11DPFR-S

REV:1.00

BAR CODE

FAN2

S-SATA1

S-SATA0

FAN3FAN1

JS2

JS1

JNVI2C1

JIPMB1

JPWR_HDD3

JPWR_HDD2

JPWR_HDD1

JPWR9

JPWR10

JSXB3

JSXB2

JSXB1

JPB1

JPG1

JVRM2

JVRM1

JPME1

JBT1

BMC_HB_LED1

LED1

UID_LED1

JSIOM1

JPWRBT1

JCPLD1

JRK1

BT1

JSDCARD1

IPMI_LAN1

JNVME2

JNVME1

JNVME3

JNVME4

JTPM1

I-SATA4~7

(3.0)

CPU2 PCI-E 3.0 X8

I-SATA0~3

CPU1 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X8

PCH

BIOS

BMC

JPP1/JTAG SCAN

JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

VGA

P1-DIMMC1

COM1

CPU1

USB0/1

DESIGNED IN USA

X11DPFR-S(N)

REV:1.00

CPU2

P1-DIMMB1

P1-DIMMA1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

DIMM Installation

1. Insert DIMM modules in the following
order: For CPU1, begin with P1-DIMMC1,
P1-DIMMB1, P1-DIMMA1 then P1­DIMMF1, P1-DIMME1, P1-DIMMD1.
For CPU2, begin with P2-DIMMC1, P2­DIMMB1, P2-DIMMA1 then P2-DIMMF1,
P2-DIMME1, P2-DIMMD1. For the system
to work properly, please use memory
modules of the same type and speed on
the motherboard.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

Notches

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

Release Tabs

Press both notches

straight down into

the memory slot.

DIMM Removal

Reverse the steps above to remove the DIMM
modules from the motherboard.

36

Chapter 2: Installation

JSXB3

2.5 Rear I/O Ports

See the gure below for the locations and descriptions of the various I/O ports on the rear

of the motherboard.

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

+

BT1

JBT1

JRK1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

JPME1

JNVI2C1

CPU1

PCH

BIOS

JSDCARD1
S-SATA0

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

CPU2

FAN3FAN1

FAN2

REV:1.00

DESIGNED IN USA

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JNVME4

JPWR10

JPWR_HDD2

JPWR_HDD1

Back panel I/O Port Locations and Denitions

1

2

4

5

3

No. Description No. Description

1. VGA port 5. SIOM slot

2. Dedicated IPMI LAN

3. USB1 (3.0)

4. USB0 (3.0)

Back Panel I/O Ports

37

X11DPFR-S(N) User's Manual

JSXB3

VGA Port

The onboard VGA port is located next to IPMI LAN port on the I/O back panel. Use this
connection for VGA display.

UID LED Indicator

A UID LED Indicator (LE1) is located on the I/O back panel. The UID Indicator provides easy

identication of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

1

2

UID LED

Pin Denitions

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

CPU1 PCI-E 3.0 X8

P1-DIMMB1

JSIOM1

PCH

P1-DIMMA1

+

JRK1

BT1

JBT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1

S-SATA0

JPME1

JNVI2C1

CPU1

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

Color Status

Blue: On Unit Identied

1. VGA Port

2. UID LED

JSXB2

CPU2 PCI-E 3.0 X8

CPU2

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

DESIGNED IN USA

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

38

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB0/1) on the I/O back panel.

Back Panel USB0/1 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 10 Power

2 D- 11 USB 2.0 Di󰀨erential Pair

3 D+ 12

4 Ground 13 Ground of PWR Return

5 StdA_SSRX- 14 SuperSpeed Receiver

6 StdA_SSRX+ 15 Di󰀨erential Pair

7 GND_DRAIN 16 Ground for Signal Return

8 StdA_SSTX- 17 SuperSpeed Transmitter

9 StdA_SSTX+ 18 Di󰀨erential Pair

1

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPB1

BMC_HB_LED1

JPG1

JIPMB1

LED1

Chapter 2: Installation

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JS2

JS1

P1-DIMMC1

P1-DIMMB1

JSXB2

P2-DIMMF1

P2-DIMME1

P1-DIMMA1

P2-DIMMD1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

PCH

+

JRK1

BT1

JBT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1
S-SATA0

JPME1

JNVI2C1

CPU1

CPU2

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMA1

P2-DIMMB1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

JPWR9

P2-DIMMC1

1. USB0/1

JPWR10

FAN2

FAN3FAN1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR_HDD2

JPWR_HDD1

JNVME4

39

X11DPFR-S(N) User's Manual

Ethernet Ports

Two LAN ports (LAN1/LAN2) and a dedicated IPMI LAN are located on the I/O back panel.
These LAN ports are supported by the onboard AST 2500 BMC and accepts an RJ45 type
cable. Refer to the LED Indicator Section for LAN LED information.

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSXB2

1

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

PCH

+

JRK1

BT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1
S-SATA0

JPME1

JBT1

JNVI2C1

CPU1

CPU2

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

1. IPMI_LAN

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

JPWR9

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

40

Chapter 2: Installation

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/o󰀨 the system. This button can also be congured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn o󰀨 the power when the system

is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

Power Button

1

Reset Button

2

NIC2 Activity LED

NIC1 Activity LED

PWR

Reset

Power Fail

UID LED

HDD LED

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

2

1

Ground

Ground

3.3V

OH/Fan Fail LED

3.3V Stby

3.3V Stby

3.3V Stby

1. PWR Button

2. Reset Button

Power LED

X

NMI

19 20

3.3V

X

Ground

41

X11DPFR-S(N) User's Manual

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

Fan Fail and UID LED

Connect an LED cable to pins 7 and 8 of the front control panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer

to the tables below for pin denitions.

OH/Fan Fail Indicator

State Denition

O󰀨 Normal

On Overheat

Flashing Fan Fail

Power Button

Reset Button

Power Fail

1

2

NIC2 Activity LED

NIC1 Activity LED

Status

PWR

Reset

UID LED

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue LED

8 OH/Fan Fail LED

2

1

Ground

Ground

3.3V

OH/Fan Fail LED

3.3V Stby

3.3V Stby

3

1. Power Fail LED

2. UID LED

3. OH/Fan Fail LED

HDD LED

Power LED

X

NMI

19 20

3.3V Stby

3.3V

X

Ground

42

Chapter 2: Installation

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

11 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

Power Button

Reset Button

Power Fail

NIC2 Activity LED

1

2

NIC1 Activity LED

PWR

Reset

UID LED

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

2

1

Ground

Ground

3.3V

OH/Fan Fail LED

3.3V Stby

3.3V Stby

1. NIC2 LED

2. NIC1 LED

3. HDD LED

HDD LED

3

Power LED

X

NMI

19 20

3.3V Stby

3.3V

X

Ground

43

X11DPFR-S(N) User's Manual

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

Power Button

Reset Button

Power Fail

NIC2 Activity LED

PWR

Reset

UID LED

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

2

1

Ground

Ground

3.3V

OH/Fan Fail LED

3.3V Stby

1. Power LED

2. NMI

NIC1 Activity LED

HDD LED

Power LED

1

X

NMI

2

19 20

3.3V Stby

3.3V Stby

3.3V

X

Ground

44

Chapter 2: Installation

2.7 Connectors

Power Connector

12V 8-pin GPU Power Connectors

JPW9-JPW10 are the 8-pin 12V DC power input from the Power Adapter Board.

12V 8-pin Power

Pin Denitions

Connector Pin# Denition

JPWR9 1-8 12V

JPWR10 1-8 GND

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSXB2

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

PCH

+

JRK1

BT1

JBT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1

S-SATA0

JPME1

JNVI2C1

CPU1

CPU2

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

1. JPWR9

P1-DIMMD1

P1-DIMME1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P1-DIMMF1

2. JPWR10

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

21

JPWR10

JPWR9

JPWR_HDD2

JPWR_HDD1

JNVME3

JNVME4

JPWRBT1

45

X11DPFR-S(N) User's Manual

Headers

Onboard Fan Header

This motherboard has three fan headers (FAN1~3). This is a 4-pin fan header, which is
backward compatible with a traditional 3-pin fan. The onboard fan speed is controlled
by Thermal Management (via Hardware Monitoring) in the BIOS. When using Thermal
Management setting, please use all 3-pin fans or all 4-pin fans.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

JSXB3

CPU2 PCI-E 3.0 X16

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

1

JS2

JS1

P1-DIMMC1

P1-DIMMB1

JSXB2

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

JSDCARD1
S-SATA0

+

JRK1

BT1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

PCH

P1-DIMMA1

JIPMB1

LED1

BIOS

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

1. FAN1

2. FAN2

JCPLD1

3. FAN3

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

1

2

FAN3FAN1

3

P2-DIMMA1

P2-DIMMB1

JPWR9

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

46

Chapter 2: Installation

JSXB3

TPM Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from a third-party vendor. A TPM/Port 80 connector is a security device that supports
encryption and authentication in hard drives. It allows the motherboard to deny access if the
TPM associated with the hard drive is not installed in the system. See the table below for

pin denitions.

Trusted Platform Module/Port 80 Header

Pin Denitions

Pin# Denition Pin# Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8

9 +3.3V Stdby 10 SPI_IRQ#

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSIOM1

PCH

+

JRK1

BT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1
S-SATA0

JPME1

JBT1

JNVI2C1

CPU1

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

1. TPM/Port 80 Header

JCPLD1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

CPU2

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

REV:1.00

DESIGNED IN USA

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

47

X11DPFR-S(N) User's Manual

NVMe I2C Header

JNVI2C1 is a sideband header for NVMe devices connected to CPU1. Please connect the
I2C cable to this connector.

NVMe OcuLink Connectors

Use the four NVMe OcuLink Connectors (JNVME1, JNVME2, JNVME3, JNVME4) to attach
high-speed PCI-E storage devices.

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSXB2

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

PCH

JBT1

+

JRK1

BT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1
S-SATA0

JPME1

JNVI2C1

CPU1

CPU2

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

1

1. JNVI2C1

2. JNVME1

3. JNVME2

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

4. JNVME3

5. JNVME4

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

P2-DIMMB1

JPWR9

P2-DIMMC1

2

JNVME1

JNVME2

3

JNVME3

JPWRBT1

JNVME4

JPWR10

JPWR_HDD2

4

JPWR_HDD1

5

48

Chapter 2: Installation

JSXB3

RAID Key Header

A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support
onboard NVMe connections.

Intel RAID Key

Pin Denitions

Pins Denition

1 GND

2 PU 3.3V Stdby

3 GND

4 PCH RAID KEY

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

P1-DIMMB1

JSIOM1

PCH

+

JRK1

BT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

P1-DIMMA1

BIOS

JSDCARD1
S-SATA0

JPME1

JBT1

JNVI2C1

1

CPU1

CPU2

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

1. RAID Key

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JPWR10

JPWR9

JPWR_HDD2

JPWR_HDD1

JNVME3

JNVME4

JPWRBT1

49

X11DPFR-S(N) User's Manual

I-SATA 3.0 and S-SATA 3.0 Ports

The X11DPFR-S(N) has two MiniSAS-HD connectors (I-SATA0~3, I-SATA4~7) and two
SATADOM ports (S-SATA0/1). These SATA ports are supported by the Intel C621 chipset.

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

BIOS

JSDCARD1
S-SATA0

JIPMB1

LED1

JSXB1

MAC CODE

4

CPU1 PCI-E 3.0 X16

3

JCPLD1

1. I-SATA0-3

2. I-SATA4-7

3. S-SATA0

4. S-SATA1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

JPWR10

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JPWR_HDD2

JPWR_HDD1

JNVME1

JNVME3

JNVME2

JNVME4

JPWRBT1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSXB3

CPU2 PCI-E 3.0 X16

BAR CODE

2

I-SATA0~3

1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

1

I-SATA4~7

JPWR_HDD3

JTPM1

JS2

JS1

P1-DIMMC1

P1-DIMMB1

JSXB2

P2-DIMMF1

P2-DIMME1

PCH

P1-DIMMA1

P2-DIMMD1

JSIOM1

BT1

FAN2

+

JRK1

JVRM1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

FAN3FAN1

50

Chapter 2: Installation

Micro SD Card

There is one Micro SD memory card slot located at JSDCARD1 on the motherboard.

JSXB3

CPU2 PCI-E 3.0 X16

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

1

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSXB2

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

BIOS

JSDCARD1
S-SATA0

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

1

JCPLD1

X11DPFR-S

REV:1.00

P2-DIMMA1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

DESIGNED IN USA

JPWR9

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

1. JSDCARD1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

+

JRK1

BT1

FAN2

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

FAN3FAN1

PCH

51

X11DPFR-S(N) User's Manual

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional

settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is o󰀨 the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper

consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JBT1 contact pads

52

Chapter 2: Installation

VGA Enable/Disable

JPG1 allows you to enable or disable the VGA port using the onboard graphics controller.
The default setting is Enabled.

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

JSXB2

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JSIOM1

JSDCARD1
S-SATA0

+

JRK1

BT1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

PCH

JIPMB1

LED1

BIOS

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

1. VGA Enable/Disable

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN3FAN1

FAN2

P2-DIMMA1

JPWR9

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

53

X11DPFR-S(N) User's Manual

JSXB3

Management Engine (ME) Recovery

Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource

allocation for essential system operation only in order to maintain normal power operation
and management. In the single operation mode, online upgrade will be available via Recovery

mode. See the table below for jumper settings.

ME Recovery Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal

Pins 2-3 ME Recovery

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JPP1/JTAG SCAN
JPP0/JTAG SCAN

1

I-SATA4~7

JPWR_HDD3

JTPM1

JSXB2

JS2

JS1

P1-DIMMC1

P1-DIMMB1

PCH

P1-DIMMA1

CPU2 PCI-E 3.0 X16

BAR CODE

I-SATA0~3

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JSIOM1

BT1

+

JRK1

JVRM1

JPME1

JBT1

1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

JSDCARD1
S-SATA0

JIPMB1

LED1

BIOS

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

1. ME Recovery

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

JPWR9

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

54

Chapter 2: Installation

I2C Bus for VRM

Jumper JVRM1 allows the BMC or the PCH to access CPU and memory VRM controllers.

See the table below for jumper settings.

VRM

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC (Normal)

Pins 2-3 PCH

JSXB3

CPU2 PCI-E 3.0 X16

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JPP1/JTAG SCAN

JPP0/JTAG SCAN

1

JS2

JS1

P1-DIMMC1

P1-DIMMB1

JSXB2

P2-DIMMF1

P2-DIMME1

P1-DIMMA1

P2-DIMMD1

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

BIOS

JSDCARD1
S-SATA0

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMA1

P2-DIMMB1

P1-DIMMD1

P1-DIMME1

JPWR9

P2-DIMMC1

JNVME1

JNVME2

P1-DIMMF1

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

1. JVRM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

1

JSIOM1

+

JRK1

BT1

FAN2

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

FAN3FAN1

PCH

55

X11DPFR-S(N) User's Manual

JSXB3

2.9 LED Indicators

IPMI LAN LEDs

A dedicated IPMI LAN, located on the back panel, has two LED indicators. The amber LED
on the right of the IPMI LAN port indicates activity, while the LED on the left indicates the
speed of the connection. See the table below for more information.

IPMI LAN

Activity LEDLink LED

IPMI LAN LEDs

Color/State Denition

Link (left)

Green: Solid

Amber: Solid

Activity (Right) Amber: Blinking Active

100 Mbps

1Gbps

1

(3.0)

USB0/1

JPG1

JPB1

BMC_HB_LED1

+

JRK1

BT1

JVRM1

JPME1

JBT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

JPP1/JTAG SCAN
JPP0/JTAG SCAN

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

P1-DIMMB1

P1-DIMMA1

JSIOM1

PCH

JVRM2

JNVI2C1

S-SATA1

IPMI_LAN1

BMC

BIOS

JSDCARD1
S-SATA0

VGA

UID_LED1

COM1

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

P1-DIMMD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P1-DIMME1

P1-DIMMF1

1. IPMI LAN LED

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN2

FAN3FAN1

P2-DIMMA1

P2-DIMMB1

JPWR9

P2-DIMMC1

JNVME1

JNVME2

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

56

Chapter 2: Installation

JSXB3

BMC Heartbeat LED

BMC_HB_LED1 is the BMC heartbeat LED. When the LED is blinking green, BMC is
functioning normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

BIOS

JSDCARD1
S-SATA0

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMA1

P1-DIMMD1

P2-DIMMB1

P2-DIMMC1

JNVME1

JNVME2

P1-DIMME1

P1-DIMMF1

JPWR9

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

1. BMC Heartbeat LED

JPG1

JPB1

BMC_HB_LED1

1

BMC

S-SATA1

JVRM2

JPP1/JTAG SCAN

JPP0/JTAG SCAN

BAR CODE

I-SATA0~3

1

I-SATA4~7

JPWR_HDD3

JTPM1

JSXB2

JS2

JS1

P1-DIMMC1

P1-DIMMB1

P2-DIMMF1

P2-DIMME1

PCH

P1-DIMMA1

P2-DIMMD1

CPU2 PCI-E 3.0 X16

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JSIOM1

FAN2

+

JRK1

BT1

JVRM1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

CPU1

CPU2

FAN3FAN1

57

X11DPFR-S(N) User's Manual

Unit ID LED

A rear UID LED indicator at UID_LED1 is located near the UID switch on the back panel. This

UID indicator provides easy identication of a system.unit that may need service.

UID LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSXB3

CPU2 PCI-E 3.0 X16

1

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JTPM1

CPU1 PCI-E 3.0 X8

CPU2 PCI-E 3.0 X8

JS2

JS1

P1-DIMMC1

JSXB2

P1-DIMMB1

P1-DIMMA1

1

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

BMC

S-SATA1

JVRM2

JVRM1

JPME1

JBT1

JNVI2C1

X11DPFR-S(N)

DESIGNED IN USA

REV:1.00

CPU1

CPU2

BIOS

JSDCARD1
S-SATA0

JSIOM1

PCH

+

JRK1

BT1

JIPMB1

LED1

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

1. UID LED

JCPLD1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

X11DPFR-S

REV:1.00

DESIGNED IN USA

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

FAN3FAN1

FAN2

P2-DIMMA1

P2-DIMMB1

JNVME1

JNVME2

JPWR9

P2-DIMMC1

JNVME3

JPWRBT1

JPWR10

JPWR_HDD2

JPWR_HDD1

JNVME4

58

Chapter 2: Installation

2.10 PCI-E 3.0 Slots

PCI-E 3.0 Slots

There are several PCI-E slots located on the motherboard. Refer to the layout below for their
locations.

1. PCI-E 3.0 x16 Right Riser Card (JSXB1)

2. PCI-E 3.0 x16 (x8+x8) SMCI Proprietary slot (JSXB2)

3. PCI-E 3.0 x16 Left Riser Card (JSXB3)

4. PCI-E3.0 x16 SIOM LAN Port

VGA

UID_LED1

(3.0)

USB0/1

IPMI_LAN1

COM1

JPG1

JPB1

BMC_HB_LED1

LED1

JIPMB1

BMC

S-SATA1

JVRM2

JVRM1

JPP1/JTAG SCAN
JPP0/JTAG SCAN

JSXB3

3

CPU2 PCI-E 3.0 X16

1

JS2

I-SATA4~7

BAR CODE

JPWR_HDD3

I-SATA0~3

JS1

JTPM1

P1-DIMMC1

P1-DIMMB1

P1-DIMMA1

CPU1 PCI-E 3.0 X8

JSXB2

CPU2 PCI-E 3.0 X8

2

JSIOM1

PCH

+

JRK1

BT1

JBT1

X11DPFR-S(N)
DESIGNED IN USA
REV:1.00

BIOS

JSDCARD1
S-SATA0

JPME1

JNVI2C1

CPU1

CPU2

JSXB1

MAC CODE

CPU1 PCI-E 3.0 X16

JCPLD1

X11DPFR-S

REV:1.00

DESIGNED IN USA

1

P1-DIMMD1

P1-DIMME1

P1-DIMMF1

P2-DIMMF1

P2-DIMME1

P2-DIMMD1

JPWR10

JPWR9

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

JPWR_HDD2

JNVME3

JPWRBT1

JPWR_HDD1

JNVME4

JNVME1

FAN2

FAN3FAN1

JNVME2

59

X11DPFR-S(N) User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the

motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully

seated.)

7. Use the correct type of onboard CMOS battery (CR2032) as recommended by the
manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and o󰀨 to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

60

Chapter 3: Troubleshooting

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and

contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

61

X11DPFR-S(N) User's Manual

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

62

Chapter 3: Troubleshooting

3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

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X11DPFR-S(N) User's Manual

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

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Chapter 3: Troubleshooting

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X11DPFR-S(N) motherboard supports up to 1.5TB of of Load Reduced DIMM

(LRDIMM) and 1536GB of LRDIMM, Registered DIMM (RDIMM), and Non-Volatile DIMM
(NV-DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz modules in 12 slots. See Section 2.4
for details on installing memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn o󰀨 the power using the momentary power on/o󰀨 switch?

Answer: The instant power o󰀨 function is controlled in BIOS by the Power Button Mode
setting. When the On/O󰀨 feature is enabled, the motherboard will have instant o󰀨 capabilities

as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen
that appears when the system is turned on), the momentary on/o󰀨 switch must be held for

more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

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X11DPFR-S(N) User's Manual

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power o󰀨 your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Important: When replacing a battery, be sure to only replace it with the same type.

OR

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Chapter 3: Troubleshooting

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the X11DPFR-S(N) motherboards. The

BIOS is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.

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Chapter 4: BIOS

4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:

System Date/System Time

Use this item to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in Day MM/DD/YYYY format. The

time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.

Supermicro X11DPFR-S(N)

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This item displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.

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X11DPFR-S(N) User's Manual

Memory Information

Total Memory

This item displays the total size of memory available in the system.

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Chapter 4: BIOS

4.3 Advanced Setup Congurations

Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect
DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

Note: POST message is always displayed regardless of the item setting.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are O󰀨 and On.

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X11DPFR-S(N) User's Manual

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.

Interrupt 19 (INT19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB Support

Enable this feature to use the USB keyboard and mouse during the Windows 7 installation,
since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive,
and USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has
been installed in Windows. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Enabled and Disabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for

the system power to remain o󰀨 after a power loss. Select Power On for the system

power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay O󰀨, Power On,
and Last State.

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Chapter 4: BIOS

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4

Seconds Override for the user to power o󰀨 the system after pressing and holding the power
button for 4 seconds or longer. Select Instant O󰀨 to instantly power o󰀨 the system as soon

as the user presses the power button. The options are Instant O󰀨 and 4 Seconds Override.

Throttle on Power FailThis feature allows the system to decrease system power

requirements by throttling CPU frequency in the event of one power supply failing. The
options are Enabled and Disabled.



CPU Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.



Processor Conguration

The following CPU information will be displayed:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.

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X11DPFR-S(N) User's Manual

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where

it cannot, thus preventing a worm or a virus from ooding illegal codes to overwhelm the

processor, damaging the system during a virus attack. The options are Enable and Disable.
(Refer to Intel and Microsoft websites for more information.)

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI

tables. This feature o󰀨ers fully-protected I/O resource-sharing across the Intel platforms,

providing the user with greater reliability, security and availability in networking and data­sharing. The settings are Enable and Disable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and

Enable.

Note: Please power o󰀨 and reboot the system for the changes you've made to take

e󰀨ect. Please refer to Intel’s website for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data
streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing
and processing for CPU performance enhancement. The options are Disable and Enable.

DCU IP Prefetcher

If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

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Chapter 4: BIOS

LLC Prefetch

If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.

Extended APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.

Advanced Power Management Conguration

Power Technology

This feature allows the user to select the desired CPU Power Management prole. The

options are Disable, Energy E󰀩cient, and Custom.

CPU P State Control

SpeedStep (PStates)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an e󰀨ort to reduce power consumption and heat

dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.

EIST PSD Function (Available when SpeedStep is set to Enable)

Use this item to congure the processor's P-State coordination settings. During a P-State,

the voltage and frequency of the processor will be reduced when it is in operation. This

makes the processor more energy e󰀩cient, resulting in further energy gains. The options

are HW_ALL, SW_ALL and SW-ANY.

Turbo Mode (Available when SpeedStep is set to Enable)

Select Enable for processor cores to run faster than the frequency specied by the

manufacturer. The options are Disable and Enable.

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X11DPFR-S(N) User's Manual

Hardware PM (Power Management) State Control

Hardware P-States

If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable
and Disable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned o󰀨. The options are Auto,
Enable, and Disable.

Enhanced Halt State (C1E)

Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the

CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

Package C State Control

Package C State

Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.

CPU T State Control

Software Controlled T-States

Enabling this feature allows the OS to choose a T-State. The options are Enable and
Disable.

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Chapter 4: BIOS

Chipset Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

UPI (Ultra Path Interconnect) Conguration

This section displays the following UPI General Conguration information:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI PCI-E Conguration Base/Size

Degrade Precedence

Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in

conict. Select Feature Precedent to degrade UPI topology if system options are in conict.

The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.

Link L1 Enable

Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.

IO Directory Cache

Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,

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X11DPFR-S(N) User's Manual

Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

SNC

Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into
clusters based on address range. Each cluster is connected to a subset of the memory
controller. Enabling SNC improves average latency and reduces memory access congestion
to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on IMC
interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The options
are Disable, Enable, and Auto.

XPT Prefetch

XPT Prefetch speculatively makes a copy to the memory controller of a read request being
sent to the LLC. If the read request maps to the local memory address and the recent
memory reads are likely to miss the LLC, a speculative read is sent to the local memory
controller. The options are Disable and Enable.

KTI Prefetch

KTI Pretech enables memory read to start early on a DDR bus, where the KTI Rx path
will directly create a Memory Speculative Read command to the memory controller. The
options are Disable and Enable.

Local/Remote Threshold

This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal, which
handles hardware interruptions. The features are Disable, Enable, Auto, Low, Medium,
and High.

Stale AtoS

This feature optimizes A to S directory. When all snoop responses found in directory A
are found to be RspI, then all data is moved to directory S and is returned in S-state. The
options are Disable, Enable, and Auto.

LLC dead line alloc

Select Enable to optimally ll dead lines in LLC. Select Disable to never ll dead lines in

LLC. The options are Disable, Enable, and Auto.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.

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Chapter 4: BIOS

Memory Conguration

Enforce POR

Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The
options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.

Data Scrambling for NVDIMM

Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are Auto, Disable, and Enable.

Data Scrambling for DDR4

Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. The options are Auto, Disable, and Enable.

tCCD_L Relaxation

If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column
to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.
The options are Enable and Disable.

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Enable and Disable.

2X REFRESH

This option allows the user to select 2X refresh mode. The options are Auto, Enabled,
and Disabled.

Page Policy

This feature allows the user to determine the desired page mode for IMC. When Auto is
selected, the memory controller will close or open pages based on the current operation.
Closed policy closes that page after reading or writing. Adaptive is similar to open page

policy, but can be dynamically modied. The default is Auto.

IMC Interleaving

This feature allows the user to congure Integrated Memory Controller (IMC) Interleaving

settings.The options are Auto, 1-way Interleave, and 2-way Interleave.

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X11DPFR-S(N) User's Manual

Memory Topology

This item displays the information of onboard memory modules as detected by the BIOS.

• P1 DIMMA1

• P1 DIMMB1

• P2 DIMMA1

• P2 DIMMB1

Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.

Mirror Mode

Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode, which
will create a duplicate copy of data stored in the memory to increase memory security, but
it will reduce the memory capacity into half. The options are Enable and Disable.

Memory Rank Sparing

Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.

Note: This item will not be available when memory mirror mode is enabled.

Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.

SDDC Plus One

Select Enable for SDDC (Single Device Data Correction) support, which will increase the
reliability and serviceability of your system memory. The options are Enable and Disable.

ADDDC (Adaptive Double Device Data Correction) Sparing

Select Enable for ADDDC sparing support to enhance memory performance. The options
are Enable and Disable.

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Chapter 4: BIOS

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache line
every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are

Enable and Disable.

Patrol Scrub Interval

Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.

Note: This item is hidden when Patrol Scrub item is set to Disable.

IIO Conguration

CPU1 Conguration

IOU0 (II0 PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II0 PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (II0 PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP1 (II0 PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

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X11DPFR-S(N) User's Manual

CPU1 PcieBr0D00F0 - Port 0/DMI PcieBr1D00F0 - Port 1A PcieBr2D00F0 - Port
2A PcieBr3D00F0 - Port 3A PcieBr4D00F0 - MCP 0 PcieBr5D00F0 - MCP 1

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user. The op­tions are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Max Payload Size

Selecting Auto for this feature will enable the motherboard to automatically detect the
maximum Transaction Layer Packet (TLP) size for the connected PCI-E device, allowing

for maximum I/O e󰀩ciency. Selecting 128B or 256B will designate maximum packet size

of 128 or 256. Options are Auto, 128, and 256. Auto is enabled by default.

CPU2 Conguration

IOU0 (II0 PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II0 PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (II0 PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP1 (II0 PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU2 PcieBr1D00F0 - Port 1A/Socket 1 PcieBr2D00F0 - Port 2A/Socket 1
PcieBr3D00F0 - Port 3A/Socket 1 PcieBr4D00F0 - MCP 0/Socket 1 PcieBr5D00F0

- MCP 1

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user. The op­tions are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

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PCI-E Port Max Payload Size

Selecting Auto for this feature will enable the motherboard to automatically detect the
maximum Transaction Layer Packet (TLP) size for the connected PCI-E device, allowing

for maximum I/O e󰀩ciency. Selecting 128B or 256B will designate maximum packet size

of 128 or 256. Options are Auto, 128, and 256. Auto is enabled by default.

IOAT Conguration

Disable TPH (TLP Processing Hint)

TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and No.

Prioritize TPH (TLP Processing Hint)

Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain transactions to
violate the strict-ordering rules of PCI and to be completed prior to other transactions that
have already been enqueued. The options are Disable and Enable.

Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR

ACPI tables. This feature o󰀨ers fully-protected I/O resource sharing across Intel platforms,

providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.

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X11DPFR-S(N) User's Manual

PassThrough DMA

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.

ATS

Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d
engine to enhance system performance. The options are Enable and Disable.

Posted Interrupt

Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve

virtualization e󰀩ciency by simplifying interrupt migration and lessening the need of physical

interrupts. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.

Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU1

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT6 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

CPU SLOT4 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe­cic root port. The options are Disable and Enable.

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Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1D. The options
are Disable and Enable.

VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT5 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 2A~2D. The options
are Disable and Enable.

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT2 PCI-E 3.0 X8 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

CPU SLOT1 PCI-E 3.0 X4 VMD (Available when the device is detected by the
system)

Select Enable to use the Intel Volume Management Device Technology for this spe­cic root port. The options are Disable and Enable.

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X11DPFR-S(N) User's Manual

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 3A~3D. This will allow
the user to replace the components without shutting down the system. The options
are Disable and Enable.

Intel® VMD for Volume Management Device on CPU2

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

CPU SLOT3 PCI-E 3.0 X16 VMD (Available when the device is detected by
the system)

Select Enable to enable hot plug support for the Intel Volume Management Device

Technology for this specic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 3A~3D. The options
are Disable and Enable.

IIO-PCIE Express Global Options

PCI-E Completion Timeout Disable

Select Enable to enable PCI-E Completion Timeout support for electric tuning. The op­tions are Yes, No, and Per-Port.

South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

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Chapter 4: BIOS

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.

XHCI Hand-O󰀨

This is a work-around solution for operating systems that do not support XHCI (Extensible

Host Controller Interface) hand-o󰀨. The XHCI ownership change should be claimed by the

XHCI driver. The options are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Enabled and Disabled.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

Operational Firmware Version

Backup Firmware Version

Recovery Firmware Version

ME Firmware Status #1

ME Firmware Status #2

Current State

Error Code



PCH SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.

Congure SATA as (Available when the item above: SATA Controller is set to

enabled)

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)

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X11DPFR-S(N) User's Manual

SATA HDD Unlock

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Enable and Disable.

SATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 - SATA Port 7

Hot Plug

Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA

port specied by the user to start a COMRESET initialization. The options are Enable and

Disable.

SATA Device Type

Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.



PCH sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the sSATA controller and displays the following items:

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Chapter 4: BIOS

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI

and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Support Aggressive Link Power Management

When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 - sSATA Port 5

Hot Plug

Select Enable to support Hot-plugging for the device installed on an sSATA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the

sSATA port specied by the user to start a COMRESET initialization. The options are

Enable and Disable.

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X11DPFR-S(N) User's Manual

sSATA Device Type

Use this item to specify if the device installed on the sSATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Enabled and Disabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled and
Disabled.

MMIOHBase

Use this item to select the base memory size according to memory-address mapping for the
IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
48T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

PCI PERR/SERR Support

Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Disabled and Enabled.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned

to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.

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Chapter 4: BIOS

NVMe Firmware Source

Use this item to select the NVMe rmware to support system boot. The options are Vendor

Dened Firmware and AMI Native Support. The default option, Vendor Dened Firmware,

is pre-installed on the drive and may resolve errata or enable innovative functions for the

drive. The other option, AMI Native Support, is o󰀨ered by the BIOS with a generic method.

VGA Priority

Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Auto, Onboard and O󰀨board.

M.2 PCI-E 3.0 x4 OPROM

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy

and EFI. Use this feature to select which rmware type to be loaded for the add-on card in

this slot. The options are Disabled, Legacy, and EFI.

CPU1 PCI-E 3.0 x16/1U Riser OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU1 JSXB2 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU2 JSXB2 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

SIOM: CPU1 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

SIOM: CPU1 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU2 JSXB3 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

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X11DPFR-S(N) User's Manual

Onboard SAS Option ROM

Use this feature to select which rmware function to be loaded for LAN Port1 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard NVMe1 Option ROM

Use this feature to select which rmware function to be loaded for NVMe1 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard NVMe2 Option ROM

Use this feature to select which rmware function to be loaded for NVMe2 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard NVMe3 Option ROM

Use this feature to select which rmware function to be loaded for NVMe2 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard NVMe4 Option ROM

Use this feature to select which rmware function to be loaded for NVMe2 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard Video Option ROM

Use this item to select the Onboard Video Option ROM type. The options are Disabled,
Legacy, and EFI.



Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Enabled and Disabled.

Ipv6 PXE Support

Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.

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Chapter 4: BIOS

Ipv6 HTTP Support

Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Enabled and Disabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.

Media Detect count

Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media
(Internet connection or LAN port). The default is 1.



Super IO Conguration

Super IO Chip AST2500



Serial Port 1 Conguration

Serial Port

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial

port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a

serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port 2 Conguration

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X11DPFR-S(N) User's Manual

Serial Port

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial

port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specied. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;
IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,
4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are COM and SOL.



Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for conguration:



Console Redirection Settings (for COM1)

Terminal Type

Use thid feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

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Chapter 4: BIOS

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by bu󰀨er overow. Send a "Stop" signal to stop sending data when the receiving bu󰀨er
is full. Send a "Start" signal to start sending data when the receiving bu󰀨er is empty. The

options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.

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X11DPFR-S(N) User's Manual

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains
enabled upon OS bootup. The options are Always Enable and Bootloader.

SOL (Serial-Over-LAN)/COM2

Console Redirection (for SOL/COM2)

Select Enabled to use the SOL port for Console Redirection. The options are Enabled and
Disabled.

*If the item above set to Enabled, the following items will become available for user's

conguration:



Console Redirection Settings (for SOL/COM2)

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

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Chapter 4: BIOS

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by bu󰀨er overow. Send a "Stop" signal to stop sending data when the receiving bu󰀨er
is full. Send a "Start" signal to start data-sending when the receiving bu󰀨er is empty. The

options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

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X11DPFR-S(N) User's Manual

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS POST
(Power-On Self-Test). When this feature is set to Bootloader, legacy Console Redirection
is disabled before booting the OS. When this feature is set to Always Enable, legacy
Console Redirection remains enabled upon OS boot. The options are Always Enable and
Bootloader.



Legacy Console Redirection Settings

Legacy Console Redirection Settings

Use the feature to select the COM port to display redirection of Legacy OS and Legacy
OPROM messages. The default setting is COM1.

Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)

The submenu allows the user to congure Console Redirection settings to support Out-of-

Band Serial Port management.

Console Redirection (for EMS)

Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for user's

conguration:

EMS Console Redirection Settings

Out-of-Band Management Port

The feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are

COM1 (Console Redirection) and COM2/SOL (Console Redirection).

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

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Chapter 4: BIOS

Bits Per Second

This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in both host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by bu󰀨er overow. Send a "Stop" signal to stop data-sending when the receiving bu󰀨er
is full. Send a "Start" signal to start data-sending when the receiving bu󰀨er is empty. The

options are None, Hardware RTS/CTS, and Software Xon/Xo󰀨.

The setting for each these features is displayed:

Data Bits, Parity, Stop Bits



ACPI Settings

Use this feature to congure Advanced Conguration and Power Interface (ACPI) power

management settings for your system.

NUMA Support (Available when the OS supports this feature)

Select Enabled to enable Non-Uniform Memory Access support to enhance system perfor­mance. The options are Enabled and Disabled.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Enabled and Disabled.

High Precision Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Enabled and Disabled.

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X11DPFR-S(N) User's Manual

Trusted Computing (Available when a TPM device is installed

and detected by the BIOS)

When a TPM (Trusted-Platform Module) device is detected in your machine, the following
information will be displayed.

• TPM2.0 Device Found

• Vendor

• Firmware Version

Security Device Support

If this feature and the TPM jumper (JPT1) on the motherboard are both enabled, the onboard

security (TPM) device will be enabled in the BIOS to enhance data integrity and system
security. Please note that the OS will not show the security device. Neither TCG EFI protocol
nor INT1A interaction will be made available for use. If you have made changes on the setting

on this item, be sure to reboot the system for the change to take e󰀨ect. The options are

Disable and Enable. If this option is set to Enable, the following screen and items will display:

• Active PCR Banks

• Available PCR Banks

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