Supermicro X11DGO-T User Manual

X11DGO-T

USER’S MANUAL

Revision 1.1

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at

www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE,
SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING,
REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

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State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class B digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See

www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: This product can expose you to chemicals including
lead, known to the State of California to cause cancer and birth

!

defects or other reproductive harm. For more information, go
to www.P65Warnings.ca.gov

.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in signifi cant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
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proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.1

Release Date: June 03, 2019

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2019 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DGO-T motherboard.

About This Motherboard

The X11DGO-T motherboard supports dual Intel® Xeon Scalable-SP and 2nd Generation

®

Intel

Xeon Scalable-SP (Socket P) processors with a Thermal Design Power (TDP) of up to
255W and three Ultra Path Interconnects (UPIs) of up to 10.4 GT/s (See the note below). With
the Intel C621 built-in, this motherboard supports four PCI-E 3.0 x16 slots, two M.2 hybrid
PCI-E/SATA connectors, ten SATA 3.0 connections, two 10GbE LAN ports, and up to 6TB
3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-DIMM DDR4 ECC 2933*/2666/2400/2133
MHz memory in 24 memory slots. Up to 6TB DCPMM memory is supported (2nd Gen Intel
Xeon Scalable-SP processors only). The X11DGO-T offers most advanced PCI-E expansion
capability, thermal management, and power effi ciency currently available on the market. This
motherboard is optimized for use in artifi cial intelligence (AI), deep learning, and machine
learning, and is ideal for use in big data, High-Performance Computing (HPC) platforms.
Please note that this motherboard is intended to be installed and serviced by professional
technicians only. For processor/memory updates, please refer to our website at

supermicro.com/products/

.

http://www.

Note: 1. UPI/memory speeds are dependent on the processors installed in your system.

2. Support for 2933 MHz memory is dependent on the CPU SKU.

Manual Organization

Chapter 1 describes the features, specifi cations and performance of the motherboard, and

provides detailed information on the C621 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.

Chapter 3 describes troubleshooting procedures for video, memory, and system setup stored
in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A lists software program installation instructions.

Appendix B lists standardized warning statements in various languages.

Appendix C provides UEFI BIOS Recovery instructions.

3

Super X11DGO-T User's Manual

Appendix D provides information on how to confi gure VROC RAID settings.

Appendix E provides information on how to confi gure secure boot settings.

Appendix F provides information on how to confi gure iSCSI settings.

Appendix G provides information on how to confi gure Network Interface Card (NIC) settings.

4

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Preface

Website:

Europe

Address: Super Micro Computer B.V.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

Website:

Asia-Pacifi c

Address: Super Micro Computer, Inc.

www.supermicro.com

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

[e-mail] (Technical Support)

[e-mail] (Customer Support)

www.supermicro.nl

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website:

www.supermicro.com.tw

5

Super X11DGO-T User's Manual

Table of Contents

Chapter 1 Introduction

1.1 Checklist ...............................................................................................................................8

1.2 Processor and Chipset Overview .......................................................................................17

1.3 Special Features ................................................................................................................18

1.4 System Health Monitoring ..................................................................................................18

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................19

1.7 Advanced Power Management ..........................................................................................19

®

Intel

Intelligent Power Node Manager (IPNM).................................................................19

Management Engine (ME) ................................................................................................20

1.8 Intel® Optane DC Persistent Memory Overview ...............................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

2.2 Motherboard Installation .....................................................................................................22

2.3 Processor and Heatsink Installation ...................................................................................24

2.4 Memory Support and Installation .......................................................................................32

2.5 I/O Panel ............................................................................................................................40

2.6 Connectors and Headers ...................................................................................................44

2.7 Jumper Settings .................................................................................................................52

2.8 LED Indicators ....................................................................................................................57

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................60

3.2 Technical Support Procedures ...........................................................................................63

3.3 Frequently Asked Questions ..............................................................................................64

3.4 Battery Removal and Installation .......................................................................................65

3.5 Returning Merchandise for Service ....................................................................................66

Chapter 4 UEFI BIOS

4.1 Introduction .........................................................................................................................67

4.2 Main Setup .........................................................................................................................68

4.3 Advanced Setup Confi gurations .........................................................................................70

4.4 Event Logs .......................................................................................................................114

4.5 IPMI ..................................................................................................................................116

4.6 Security Settings ..............................................................................................................119

6

Table of Contents

4.7 Boot Settings ....................................................................................................................123

4.8 Save & Exit .......................................................................................................................126

Appendix A Software Installation

A.1 Microsoft Windows OS Installation ...................................................................................128

A.2 Driver Installation ..............................................................................................................130

A.3 SuperDoctor

A.4 IPMI ..................................................................................................................................132

®

5 .................................................................................................................131

Appendix B Standardized Warning Statements

Appendix C UEFI BIOS Recovery

Appendix D Confi guring VROC RAID Settings

E.1 All Intel® VMD Controllers Features ................................................................................141

E.2 Confi guring RAID Settings ...............................................................................................148

E.3 Use of Journaling Drive ....................................................................................................161

Appendix E Secure Boot Settings

F.1 Boot Mode Select Feature ...............................................................................................165

F.2 Secure Boot/ Secure Boot Mode/ CSM Support Features ..............................................166

F.3 Secure Boot Settings .......................................................................................................167

F.4 Key Management Settings ...............................................................................................170

Appendix F Confi guring iSCSI Settings

G.1 PCIe/PCI/PnP Features ....................................................................................................187

G.2 Confi guring iSCSI Settings ...............................................................................................190

Appendix G Confi guring Network Interface Card (NIC) Settings

H.1 Network Interface Card (NIC) Settings ............................................................................209

7

Super X11DGO-T User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

In addition to the motherboard, several important parts that are included with your shipment
are listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist

Main Parts List

Description Part Number Quantity

Supermicro motherboard-X11DGO-T MNL-2048 1

Mini SAS to 4 SATA cable CBL-0476L (x1) 1

I/O Backplane MCP-260-00042-ON 1

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: http://www.supermicro.com/wftp

• Product safety information: http://www.supermicro.com/about/policies/safety_information.

cfm

• If you have any questions, please contact our support team at: [e-mail]

his manual may be periodically updated without notice. Please check the Supermicro website

T

for possible updates to the manual revision level.

8

Chapter 1: Introduction

Figure 1-1. X11DGO-T Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision

available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

9

Super X11DGO-T User's Manual

Figure 1-2. X11DGO-T Motherboard Layout

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

Midplane Interface

P1-DIMMF1

P1-DIMME1

P1-DIMME2

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

P1-DIMMF2

P1-DIMMD2

P1-DIMMD1

JPWR1

P1-DIMMA1

P1-DIMMA2

JPWR2

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMC2

CPU2

CN15

CPU2

BMC

CN14

CN1

JP2

JPME1

BIOS

FAN2

X11DGO-T

Rev. 1.01

JTPM1

I-SATA0~3

PCH

I-SATA4~7

JSATA1

CPU2

CN2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

CPU1

(CPU1 (CPU1

CN11

BT1

JBT1

BATTERY

BIOS
LICENSE

HDD_LED1

CN10

CN1)CN2)

RAID KEY-1

JRK1

LED2

JM2-1

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

USB0(3.0)

JUSB1

CN12

CN13

CN17

LEDM1

LEDBMC

VGA

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

JPCIE2

BMC_BUTTON

SW2

JBMC_BTN1

RESET_BUTTON

SW1

PWR_SW1

PWR_BUTTON

Notes:

1. See Chapter 2 for detailed information on jumpers, I/O ports, and onboard connectors

2. " " indicates the location of Pin 1.

3. Jumpers/components/LED indicators not indicated are used for internal testing only.

4. To avoid causing interference with other components, please be sure to use an add-on

card that is fully compliant with the PCI-standard on a PCI slot.

10

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBMC_BTN1 BMC Button Jumper Pins 1-2 (SW2: used as BMC UID: Default), Pins 2-3 (SW2: used as BMC Reset)

JBT1 CMOS Clear Open (Normal)

JPME1 ME Recovery Pins 1-2 (Normal)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset to System)

Connector Description

BT1 Onboard CMOS battery socket

CN10-17

CN10

CN11

CN12

CN13

CN14

CN15

CN16

CN17

COM1 COM/serial port header

FAN1/FAN2 System cooling fan headers 1/2

IPMI_LAN Dedicated IPMI_LAN port

I-SATA0~3, I-SATA4~7 SATA 3.0 connection headers supported by the Intel PCH

JM2-1/JM2-2 PCI-E M.2 slots (M.2-P1/M.2-P2) supported by the PCH

JPCIE1 (CPU1 Slot1) PCI-Express 3.0 X16 Slot supported by CPU1

JPCIE2 (CPU2 Slot2) PCI-Express 3.0 X16 Slot supported by CPU2

JPWR1/JPWR2 SMCI-proprietary power supply connectors 1/2

JPW11/JPW12/JPW13 12V/5V 8-pin power connectors 11/12/13

JRK1 Intel VROC RAID Key header for NVMe Solid State Drives (SSD)

JSDCARD1 Micro SSD (Solid State Drive) card connector (reserved for manufacture use)

JTPM1 Trusted Platform Module (TPM)/Port 80 connector

LAN1/LAN2 10GbE (10-Gigabit) LAN Ethernet ports 1/2

PWR_SW1 Power button

SW1 Reset button for the system

Note: Both JPCIE1 and JPCIE2 are lane reversal, which means that CPU PCE-E lane
[15] is connected to PCE-E lane[0], the fi rst lane of the slots. Please see Page 50 for
more details.

Oculink connectors used to connect PCI-E buses from processors to PCI-E slots or NVMe

backplanes (via x8 to x4 Y cables) (Note: Y cables are needed to connect NVMe backplanes)

Oculink connector (supported by CPU1 PCI-E Port 3 [7:0] and used as CPU1 Master Port for

NVMe side band connections) (Refer to the CN connection diagram on Page 45.)

Oculink connector (supported by CPU1 PCI-E Port 3 [15:8]) (Refer to the CN connection diagram

on Page 45.)

Oculink connector (supported by Slot1 PCI-E [7:0]) (See the note below. Also see the CN

connection diagram on Page 45.)

Oculink connector (supported by Slot1 PCI-E [15:8]) (See the note below. Also see the CN

connection diagram on Page 45.)

Oculink connector (supported by CPU2 PCI-E Port 3 [7:0] and used as CPU2 Master Port for

NVMe side band connections) (See the note below. Also see the CN connection diagram on Page

45.)

Oculink connector (supported by CPU2 PCI-E Port 3 [15:8]) (Refer to the CN connection diagram

on Page 45.)

Oculink connector (supported by Slot2 PCI-E [7:0]) (See the note below. Also see the CN

connection diagram Page 45.)

Oculink connector (supported by Slot2 PCI-E [15:8]) (See the note below. Also see the CN

connection diagram Page 45.)

11

Super X11DGO-T User's Manual

Connector Description

SW2 BMC button used in conjunction with Jumper JBMC_BTN1 (see the jumper section above)

USB0 (USB 3.0) Type A internal USB 3.0 port

USB1/2 Front accessible USB 3.0 ports 1/2

VGA Front accessible VGA port

LED Description Status

HDD_LED1 HDD Activity LED Blinking Green: HDD active

LED1 M.2 Slot1 (M.2-P1) Activity LED On: M.2 Slot 1 active

LED2 M.2 Slot2 (M.2-P2) Activity LED On: M.2 Slot 2 active

LEDM1 (LEDBMC) BMC Heartbeat LED Blinking Green: BMC normal

Note: 1. To avoid causing interference with other components, please be sure to use
an add-on card that is fully compliant with the PCI-standard on a PCI slot

2. Intel VMD is supported by PCI-E Slots (JPCIE1 and JPCIE 2).

3. After you’ve enabled VMD on a PCI-E slot, this PCI-E slot will be dedicated for

VMD use only, and it will no longer support any PCI-E device. To re-activate this slot
for PCI-E use, please disable VMD.

12

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• This motherboard supports dual Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP (Socket P) processors

which offer three Intel® UltraPath Interconnects (UPI) links of up to 10.4 GT/s per processor

Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on Page 15 to determine which slots or devices may be affected.

Memory

• Integrated memory controller supports up to 6TB of 3DS Load Reduced DIMM (3DS LRDIMM), Load Reduced DIMM

(LRDIMM), 3DS Registered DIMM (3DS RDIMM), Registered DIMM (RDIMM), Non-Volatile DIMM (NV-DIMM) DDR4

(288-pin) ECC memory 2933*/2666/2400/2133 MHz modules in 24 slots.

Note: 1. Support for 2933 MHz memory is dependent on the CPU SKU. 2. Up to 6TB DCPMM memory is supported

(2nd Gen Intel Xeon Scalable-SP processors only).

DIMM Size

• Up to 128 GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel C621 chipset

Expansion Slots

• One (1) PCI-E 3.0 x16 slot supported by CPU1 (JPCIE1: CPU1 Slot1)

• One (1) PCI-E 3.0 x16 slot supported by CPU2 (JPCIE2: CPU2 Slo2)

BaseBoard Management Controller (BMC)

• ASPEED AST 2500 Baseboard Controller (BMC) supports IPMI 2.0

• One (1) Dedicated IPMI LAN located on the rear IO back panel

Graphics

•

Graphics controller via ASPEED AST 2500 BMC (BaseBoard Management Controller)

Network Connection

• Intel X540 LAN controller supports dual 10 GbE (10 Gigabit) LAN ports

• Dual-Channel LAN controller for LAN 1/LAN 2 ports

I/O Devices

• Serial (COM) Header • One (1) Fast UART 16550 header for front access

• SATA 3.0

• Eight (8) SATA 3.0 ports supported by Intel PCH (I-SATA 0-3, I-SATA 4-7)

(JSATA1)

• RAID (PCH) • RAID 0, 1, 5, and 10

13

Super X11DGO-T User's Manual

Motherboard Features

Peripheral Devices

• Two (2) USB 3.0 ports for front access (USB 1/2)

• One (1) Internal Type A USB 3.0 header (USB 0)

BIOS

• 64 MB SPI AMI BIOS

• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, and

SMBIOS 2.7 or later

Power Management

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 4.0 (available when the Supermicro Power Manager [SPM] is installed and a

special power supply is used)

• Management Engine (ME)

System Health Monitoring

• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, -12V, CPU core, memory, chipset, BMC,

PCH voltages

• CPU System LED and control

• CPU Thermal Trip support

• Status monitor for on/off control

• CPU Thermal Design Power (TDP) support of up to 255W (*See Note 1 on next page.)

®

SM Flash UEFI BIOS

Fan Control

• Fan status monitoring via IPMI connections

• Dual cooling zone

• Multi Fan Speed Control support via onboard BMC

• Pulse Width Modulation (PWM) fan control

System Management

• Trusted Platform Module (TPM) support

• PECI (Platform Environment Control Interface) 2.0 support

• UID (Unit Identifi cation)/Remote UID via SW2, BMC_BUTTON when Jumper JBMC_BTN1 is on pins 1-2.

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5, Watch Dog, NMI

LED Indicators

• CPU/Overheating

• Fan Failure

• LAN activity.

Dimensions

• 22.6" (L) x 17" (W) (574.04 mm x 431.80 mm)

14

Chapter 1: Introduction

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas­sis and heatsink specifi cations for proper CPU TDP sizing.

Note 2: For IPMI confi guration instructions, please refer to the Embedded IPMI Con-
fi guration User's Guide available at

Note 3: It is strongly recommended that you change BMC login information upon initial
system power-on. The manufacture default username is ADMIN and the password is
ADMIN. For proper BMC confi guration, please refer to

http://www.supermicro.com/support/manuals/.

http://www.supermicro.com.

15

Super X11DGO-T User's Manual

C621 System Block Diagram

Slot

PCI-E X16

RJ45

RJ45

OCULINK
X8 connector

OCULINK
X8 connector

LAN 10G

X540

#E-1

#D-2

#D-1

#C-2

#C-1

#B-2

#B-1

#A-2

#A-1

DDR4

DDR4

up to 2666/2933*

Mid Plane

OCULINK
X8 connector

OCULINK
X8 connector

Two X8
OCULINK

cables

PCIe X4
Gen2

NCSI

#E-2

#F-1

#F-2

PCIe
re-driver

6CH

PCI-E X16 G3

X11DGO-T Rev.1.00

UPI

10.4/11.2G

#1

PCI-E X16 G3

PCIe X4

Gen2

PCI-E X1 G2

#2

PCI-E X8 G3

CPU1

#3C

PCI-E X8 G3

P0

P1

P2

DMI3

#3A

DMI3

P1

UPI

P0

UPI

P2

UPI

DMI3

#3C

6.0 Gb/S

6.0 Gb/S

CPU2

#3A #2

PCI-E X8 G3

PCI-E X8 G3

#1

PCI-E X16 G3

OCULINK
X8 connector

OCULINK
X8 connector

Mini SAS HD

SATA

Mini SAS HD

SATA

PCI-E X16 G3

#M-2

#M-1

#L-2

#L-1

#K-2

#K-1

#J-2

#J-1

#H-2

#H-1

6CH

#G-2

#G-1

DDR4

up to 2666/2933*

Mid Plane

OCULINK

Two X8
OCULINK

cables

X8 connector

OCULINK
X8 connector

Slot

PCI-E X16

RJ45

VGA

Port

LAN PHY

DDR4

BMC BootFlash

RGRMII

FWSPI

BMC

AST2500

USB 2.0

ESPI

SPI SP I

MUX

BIOS

PCH

TPM HEADER

Debug Card

USB 3.0

PCI-E X4 G3

PCI-E X4 G3

USB

2x in Front IO
1x Internal Type A

M.2

M.2

(*Note: Support for 2933 MHz memory is dependent on the CPU SKU.)

Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specifi cations of your moth-
erboard.

16

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon Scalable-SP and 2nd Gen Intel
Xeon Scalable processors (Socket P) and the C621 chipset, this motherboard provides
superb system performance, effi cient power management, and a rich feature set based
on cutting edge technology to address the needs of next-generation computer users. With
support of Intel® UltraPath Interconnect (UPI) links of up to 10.4 GT/s, and Intel AVX-512
new instructions, this motherboard offers an innovative solution with maximum system
performance to meet the ongoing demands of High Performance Computing (HPC) systems.
This motherboard is optimized for use in artifi cial intelligence (AI), deep learning, machine
learning, and big data platforms.

Features Supported by Intel Xeon Scalable-SP Processors

Intel Xeon Scalable-SP processor support the following features:

• Intel AVX-512 instruction support to handle complex workloads

• 1.5x memory bandwidth increased to 6 channels

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Rich set of available IOs with increased PCI-E lanes (48 lanes)

• Integrated Intel Ethernet Connection X722 with iWARP RDMA

New features supported by the 2nd Gen Intel Xeon Scalable-SP Processors

2nd Gen Intel Xeon Scalable-SP processors support the following features:

• Higher performance for a wider range of workloads with per-core performance increase

• Support of Optane DC Persistent Memory (DCPMM) with affordable, persistent, and

large capacity

• Up to 2993 MHz memory supported (Refer to Section 1.8 for details.)

• Vector Neural Network Instruction (VNNI) support for Accelerate Deep Learning &

Artifi cial Intelligence (AI) workloads

• Speed Select Technology provides multiple CPU profi les that can be set in the BIOS.

(This feature is available on select CPU SKUs).

• Seamless hardware security mitigations & performance/frequency fl exibility

Note : DCPMM memory and 2933 MHz memory are supported by 2nd Gen Intel Xeon
Scalable-SP processors only.

17

Super X11DGO-T User's Manual

1.3 Special Features

This section describes the health monitoring features of the X11DGO-T motherboard. The
motherboard has an onboard ASPEED 2500 Baseboard Management Controller (BMC) that
supports system health monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

1.4 System Health Monitoring

This section describes the health monitoring features of the X11DGO-T motherboard. The
motherboard has an onboard Baseboard Management Controller (BMC) chip that supports
system health monitoring.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the IPMI WebGUI and
IPMIView. Real time readings of these voltage levels are all displayed in IPMI.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of
the CPU or the system exceeds a user-defi ned threshold, system/CPU cooling fans will be
turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air­fl ow to your system.

18

Chapter 1: Introduction

System Resource Alert

This feature is available when used with SuperDoctor 5. SuperDoctor 5 is used to notify the
user of certain system events. For example, you can confi gure SuperDoctor 5 to provide you
with warnings when the system temperature, CPU temperatures, voltages and fan speeds
go beyond a predefi ned range.

1.5 ACPI Features

ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi cation defi nes
a fl exible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent
interface for confi guration control. ACPI leverages the Plug and Play BIOS data structures
while providing a processor architecture-independent implementation that is compatible with
appropriate Windows operating systems. For detailed information on OS support, please refer
to our website at www.supermicro.com.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates and in
areas where noisy power transmission is present.

through a SMI or SCI function pin. It also features auto power management to reduce power
consumption.

1.7 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Intel's Intelligent Power Node Manager (IPNM) provides your system with real-time thermal
control and power management for maximum energy effi ciency. Although IPNM Specifi cation
Version 2.0/3.0 is supported by the BMC (Baseboard Management Controller), your system
must also have IPNM-compatible Management Engine (ME) fi rmware installed to use this
feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

19

Super X11DGO-T User's Manual

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.

1.8 Intel® Optane DC Persistent Memory Overview

2nd Gen Intel Xeon Scalable-SP processors supports new DCPMM (Optane™ DC Persistent
Memory Modules) technology. DCPMM offers data persistence with higher capacity than
existing memory modules and lower latency than NVMe SSDs. DCPMM memory provides
hyper-speed storage capability for high performance computing platforms with fl exible
confi guration options.

20

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specifi ed by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

21

Super X11DGO-T User's Manual

2.2 Motherboard Installation

All motherboards have standard mounting holes to fi t different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Tools Needed

Phillips Screwdriver (1)

Phillips Screws (19)

X11DGO-T

Rev. 1.01

BIOS
LICENSE

Standoffs (19) Only if Needed

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

22

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the back of the chassis as needed.

2. Locate the mounting holes on the motherboard. See the previous page for the locations
of the mounting holes.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or
components might look different from those shown in this manual.

23

Super X11DGO-T User's Manual

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should
be assembled together fi rst to form the Processor Heatsink Module (PHM), and then install
the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the fi rst page of this

chapter before handling, installing, or removing system components.

Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP
Processors

Note: Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP processors con-

tain two models - the F model processors and the Non-F model processors. This
motherboard supports Non-F processors only.

Intel Processor (Non-F Model)

Note: All graphics, drawings, and pictures shown in this manual are for illustration only.

The components that came with your system may or may not look exactly the same
as those shown in this manual.

24

Chapter 2: Installation

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) Intel Xeon Scalable-SP and 2nd Gen Intel Xeon
Scalable-SP processor, 2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.

1. Intel Processor

2. Narrow processor clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

(for the non-F Model)

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

25

Super X11DGO-T User's Manual

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3)Intel Xeon Scalable-SP or 2nd Gen Intel Xeon Scalable-SP processor.

1. Heatsink

2. Narrow processor clip

3. Intel Processor

Processor Heatsink Module (PHM)

(Bottom View for the non-F Model)

26

Chapter 2: Installation

Attaching the Processor to the Narrow Processor Clip to Create
the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

C

Align Notch C of the CPU
and Notch C of the Processor Clip

B

A

Pin 1

B

C

CPU/Heatsink Package
(Upside Down)

A

Processor Package Carrier (w/CPU mounted

on the Processor Clip)

27

Super X11DGO-T User's Manual

Attaching the Processor Package Assembly to the Heatsink to
Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink. With
your index fi nger pressing against the screw at this triangular corner, carefully hold and turn
the heatsink upside down with the thermal-grease side facing up. Remove the protective
thermal fi lm if present, and apply the proper amount of the thermal grease as needed.
(Skip this step if you have a new heatsink because the necessary thermal grease is pre­applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and a

larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

Triangle on the CPU

Triangle on the
Processor Clip

On Locations (A, B), the notches
snap onto the heatsink’s sides

CPU and Processor Clip

(Upside Down)

d

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

B

D

A

b

c

B

C

snap onto the heat sink’s

mounting holes

C

Make sure Mounting

28

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dusk Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

CPU Socket

29

Super X11DGO-T User's Manual

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 27, you are ready to install the PHM into the CPU socket on
the motherboard by following the instructions below.

2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the corner
of the PHM that is closest to "1." (If you have diffi culty locating pin 1 of the PHM, turn the
PHM upside down. With the LGA-lands side facing up, you will note the hollow triangle
located next to a screw at the corner. Turn the PHM right side up, and you will see a triangle
marked on the processor clip at the same corner of hollow triangle.)

3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the CPU
socket.

4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into the
guiding posts.

5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the socket
to securely attach the PHM onto the motherboard starting with the screw marked "1" (in
the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf·in

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

30

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to loosen
them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2, 1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it from
the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in
the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

31

Super X11DGO-T User's Manual

2.4 Memory Support and Installation

Notes: Check the Supermicro website for recommended memory modules. Exercise

extreme care when installing or removing DIMM modules to prevent any damage.

Memory Support

The motherboard supports up to 6TB of 3DS Load Reduced DIMM (3DS LRDIMM), Load
Reduced DIMM (LRDIMM), 3DS Registered DIMM (3DS RDIMM), Registered DIMM (RDIMM)
DDR4 (288-pin) ECC 2933*/2666/2400/2133 MHz memory modules in 24 slots. Based on the
DCPMM population table on page 37, up to 6TB DCPMM memory is supported (2nd Gen
Intel Xeon Scalable-SP processors only). Populating the DIMM slots with memory modules of
the same type, speed and size will result in interleaved memory, which improves performance.

Note: 1. Support for 2933 MHz memory is dependent on the CPU SKU. 2. 16Gb-based
memory modules are supported by 2nd Gen Intel Xeon Scalable-SP processors only.

Memory Installation Sequence

Memory modules for this motherboard are populated using the "Fill First" method. The blue
memory slot of each channel is considered the "fi rst DIMM module" of the channel, and the
black slot, the second module of the channel. When installing memory modules, be sure to
populate the blue memory slots fi rst and then populate the black slots. To maximize memory
capacity, please populate all DIMM slots on the motherboard, including all blue slots and
black slots.

General Memory Population Requirements

1. Be sure to use the memory modules of the same type and speed on the motherboard.
Mixing of memory modules of different types and speeds is not allowed.

2. Using unbalanced memory topology such as populating two DIMMs in one channel while
populating one DIMM in another channel on the same motherboard will result in reduced
memory performance.

3. Populating memory slots with a pair of DIMM modules of the same type and size will
result in interleaved memory, which will improve memory performance.

32

Chapter 2: Installation

DDR4 Memory Support for Intel Xeon Scalable-SP Processors

DDR4 Memory Support

Type

RDIMM SRx4 4GB 8GB 2666 2666 2666

RDIMM SRx8 8GB 16GB 2666 2666 2666

RDIMM DRx8 8GB 16GB 2666 2666 2666

RDIMM DRx4 16GB 32GB 2666 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666 2666

LRDIMM QRx4 32GB 64GB 2666 2666 2666

LRDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 2666 2666 2666

Ranks Per

DIMM & Data

Width

DIMM Capacity (GB)

DRAM Density

4Gb* 8Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Channel

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

(DPC)

1DPC (1-DIMM Per

Channel)

2DPC (2-DIMM Per

Channel)

33

Super X11DGO-T User's Manual

DDR4 Memory Support for 2nd Gen Intel Xeon Scalable-SP
Processors

DDR4 Memory Support

Ranks

Type

RDIMM SRx4 4GB 8GB 16GB 2933 2933 2933

RDIMM SRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx4 16GB 32GB 64GB 2933 2933 2933

RDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

RDIMM 3Ds 8RX4 N/A 4H-128GB 4H-256GB 2933 2933 2933

LRDIMM QRx4 32GB 64GB 128GB 2933 2933 2933

LRDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 4H-256GB 2933 2933 2933

Per DIMM

&

Data Width

DIMM Capacity (GB)

DRAM Density

4Gb* 8Gb 16Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Chan-

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

nel (DPC)

1DPC (1-DIMM

Per Channel)

2DPC (2-DIMM

Per Channel)

Note: 1. 2933 MHz memory support in two-DIMMs per0channel (2DPC) confi guration

can be achieved by using memory purchased from Supermicro. 2. Support for 2933
MHz memory is dependent on the CPU SKU. 3. 16Gb-based memory modules are
supported by 2nd Gen Intel Xeon Scalable-SP processors only

34

Chapter 2: Installation

DIMM Population Guidelines for Optimal Performance

For optimal memory performance, follow the instructions listed in the tables below when
populating memory modules.

Key Parameters for DIMM Confi guration

Key Parameters for DIMM Confi gurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), 3DS RDIMM, LRDIMM, 3DS LRDIMM

DIMM Construction non-3DS RDIMM Raw Cards: A/B (2Rx4), C (1Rx4), D (1Rx8), E (2Rx8)

3DS RDIMM Raw Cards: A/B (4Rx4)

non-3DS LRDIMM Raw Cards: D/E (4Rx4)

3DS LRDIMM Raw Cards: A/B (8Rx4)

DIMM Mixing Guidelines

General Population Requirements

• Please populate all memory modules with DDR4 DIMMs only.

• X4 and X8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different

channels, and across different sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across

different channels, and across different sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed Not Allowed Allowed

DIMM Mixing Rules

35

Super X11DGO-T User's Manual

DIMM Population Tables

Note: Unbalanced memory confi guration decreases memory performance and is not

recommended for Supermicro motherboards.

Memory Population Table for the Motherboard Using Intel Xeon Scalable-SP
and Intel Xeon Scalable-SP and 2nd Gen Intel Xeon Scalable-SP Processors

Memory Population Table for the X11DP Motherboard w/24 DIMM Slots Onboard

When 1 CPU is used:

1 CPU & 1 DIMM CPU1: P1-DIMMA1

1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1

1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1

1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

1 CPU & 5 DIMMs

(Unbalanced: not recommended)

1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

1 CPU & 7 DIMMs

(Unbalanced: not recommended)

1 CPU & 8 DIMMs

1 CPU & 9 DIMMs

(Unbalanced: not recommended)

1 CPU & 10 DIMMs

(Unbalanced: not recommended)

1 CPU & 11 DIMMs

(Unbalanced: not recommended)

1 CPU & 12 DIMMs

When 2 CPUs are used: Memory Population Sequence

2 CPUs & 2 DIMMs

2 CPUs & 4 DIMMs

2 CPUs & 6 DIMMs

2 CPUs & 8 DIMMs

2 CPUs & 10 DIMMs

2 CPUs & 12 DIMMs

2 CPUs & 14 DIMMs

2 CPUs & 16 DIMMs

2 CPUs & 18 DIMMs

2 CPUs & 20 DIMMs

2 CPUs & 22 DIMMs

(Unbalanced: not recommended)

2 CPUs & 24 DIMMs

Memory Population Sequence

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1

CPU1: P1-DIMMA1
CPU2: P2-DIMMA1

CPU1: P1-DIMMA1/P1-DIMMD1
CPU2: P2-DIMMA1/P2-DIMMD1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1

CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1­DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/
P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/
P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/
P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF2/P2-DIMMF1

36

Chapter 2: Installation

DCPMM Memory Population Table for 2nd Gen Intel Xeon Scalable-SP
Processors

Note: Only 2nd Gen Intel Xeon Scalable-SP (82xx/62xx/52xx/4215 series) processors
support DCPMM memory.

Symmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

MM DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

AD + MM DRAM3 DCPMM DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DCPMM DRAM3 2-2-2

AD DRAM1 - DRAM1 - DRAM1 DCPMM DCPMM DRAM1 - DRAM1 - DRAM1 2-1-1

MM DRAM2 - DRAM2 - DRAM2 DCPMM DCPMM DRAM2 - DRAM2 - DRAM2 2-1-1

AD + MM DRAM3 - DRAM3 - DRAM3 DCPMM DCPMM DRAM3 - DRAM3 - DRAM3 2-1-1

AD DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

MM DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

AD + MM DRAM3 - DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 - DRAM3 2-2-1

AD DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

MM DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

AD + MM DCPMM - DRAM3 - DRAM3 - - DRAM3 - DRAM3 - DCPMM

AD DCPMM - DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 - DCPMM 2-2-1

Asymmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

AD* DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

Channel
Confi g.

1-1-1

Channel
Confi g.

Legend (for the two tables above)

DDR4 Type Capacity

DRAM1 RDIMM 3DS RDIMM LRDIMM 3DS LRDIMM

DRAM2 RDIMM - -

DRAM3 RDIMM 3DS RDIMM LRDIMM -

Note: DDR4 single rank x8 is not available for DCPMM Memory Mode or App-Direct Mode.

Refer to Validation Matrix

(DDR4 DIMMs validated with

DCPMM) below.

Legend (for the fi rst two tables above)

Capacity

DCPMM Any Capacity (Uniformly for all channels for a given confi guration)

• * 2nd socket has no DCPMM DIMM

• Mode defi nitions: AD=App Direct Mode, MM=Memory Mode, AD+MM=Mixed Mode

• For MM, general DDR4+DCPMM ratio is between 1:4 and 1:16. Excessive capacity for DCPMM can be used for AD.

• For each individual population, rearrangements between channels are allowed as long as the resulting population is

compliant with the memory rules for 2nd Gen Intel Xeon Scalable-SP (82xx/62xx/52xx/4215 series) processors.

• For each individual population, please use the same DDR4 DIMM in all slots.

• For each individual population, sockets are normally symmetric with exceptions for 1 DCPMM per socket and 1 DCPMM

per node case. Currently, DCPMM modules operate at 2666 MHz.

• No mixing of DCPMM and NVMDIMMs within the same platform is allowed.

• This DCPMM population guide targets a balanced DCPMM-to-DRAM-cache ratio in MM and MM + AD modes.

37

Super X11DGO-T User's Manual

Validation Matrix (DDR4 DIMMs Validated w/DCPMM)

DIMM Type

RDIMM

LRDIMM 4Rx4 N/A 64GB

LRDIMM 3DS 8Rx4 (4H) N/A 128GB

Ranks Per DIMM

& Data Width

(Stack)

1Rx4 8GB 16GB

2Rx8 8GB 16GB

2Rx4 16GB 32GB

DIMM Capacity (GB)

DRAM Density

4Gb 8Gb

38

DIMM Installation

1. Insert DIMM modules on the motherboard
in the sequence as listed in the memory
population tables provided on the previous
page. Push the release tabs outwards on
both ends of the DIMM slot to unlock it.

Chapter 2: Installation

2. Align the key of the DIMM module with the
receptive point on the memory slot.

3. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

4. Use two thumbs together to press on both
ends of the module straight down into the
slot until the module snaps into place.

X11DGO-T

Rev. 1.01

Notches

BIOS
LICENSE

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

5. Press the release tabs to the lock positions

to secure the DIMM module into the slot.

DIMM Removal

Reverse the steps above to remove the DIMM
modules from the motherboard.

39

Release Tabs

Press both ends

straight down into

the memory slot.

Super X11DGO-T User's Manual

2.5 I/O Panel

See the layout below for the locations and descriptions of the various I/O ports on the
motherboard.

Midplane Interface

JPWR2

JPWR1

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

P1-DIMMF1

P1-DIMMF2

P1-DIMME1

P1-DIMME2

P1-DIMMD2

P1-DIMMD1

P1-DIMMA2

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC2

P1-DIMMC1

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

LEDM1

LEDBMC

LAN1/LAN2

JLAN1

VGA

CN2

IPMI_LAN

USB1/2(3.0)

CN14

CN1

CPU2

JP2

BMC

JPME1

FAN2

Rev. 1.01

BIOS

JTPM1

PCH

I-SATA0~3

I-SATA4~7

JSATA1

X11DGO-T

(CPU1 (CPU1

CN11

BT1

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN10

RAID KEY-1

HDD_LED1

CN1)CN2)

JRK1

JM2-1

LED2

JPCIE1

I/O Port/Switch Locations and Defi nitions

6

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CN17

JPCIE2

BMC_BUTTON

SW2

JWD1

USB0(3.0)

JUSB1

CN12

CN13

RESET_BUTTON

SW1

JBMC_BTN1

PWR_BUTTON

PWR_SW1

3

1 5

2

4

Back Panel I/O Ports

No. Description No. Description

1. VGA 6. Dedicated IPMI_LAN Port

2. LAN1 7. BMC Button

3. LAN2 8. Reset Button

4. USB 1 (USB 3.0) 9. Power Button

5. USB 2 (USB 3.0)

40

87

9

Chapter 2: Installation

VGA Port

The onboard VGA port is located next to LAN1/LAN2 port on the I/O panel. Use this connection
for VGA display.

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB1/2) on the I/O panel. A Type A USB 3.0 port (USB0) is
also located on the motherboard to provide USB 3.0 connection.

X11DGO-T

Rev. 1.01

BIOS
LICENSE

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

1. VGA Port

2. USB 0 (3.0)

3. USB 1 (3.0)

4. USB 2 (3.0)

2

4

1

1

4
3

3

41

Super X11DGO-T User's Manual

Ethernet Ports

Two Ethernet ports (LAN1, LAN2) are located on the I/O plane. These Ethernet ports support
10GbE LAN connections on the motherboard. In addition, an IPMI-dedicated LAN which
supports 1 Gigabit LAN is located above USB Ports 1/2 on the I/O plane. All Ethernet ports
accept RJ45 type cables. Please refer to the LED Indicator Section for LAN LED information.

Power Button

A power switch is located at PWR_SW1 on the I/O plane. Use the switch to power on or
power off your machine. See the layout below for the location.

1. LAN1

2. LAN2

3. IPMI_LAN

4. Power Button (PWR-SW1)

X11DGO-T

Rev. 1.01

BIOS
LICENSE

3

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

3

2

2

4

1

4

1

42

Chapter 2: Installation

Reset Button (SW1)

A Reset button is located on SW1 on the I/O panel. This button is used for your system reset.
See the layout below for the location.

BMC Button (SW2)

A BMC button is located at SW2 on the I/O panel. This button can be used as a BMC UID
button or as a BMC Reset button depending on the jumper setting of JBMC_BTN1. Close
pins 1-2 of JBMC_BTN1 to use SW2 as a BMC UID button. Close pins 2-3 of JBMC_BTN1
to use SW2 for BMC Reset support. See the table below for details. Also refer to the Jumper
Section for more information on the JBMC_BTN1.

JBMC_BTN1
Jumper Setting

Pins 1-2: On (Default) SW2 works as a BMC UID button

Pins 2-3: On SW2 works as a BMC Reset button

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CN15

CPU2

CN2

CPU2

CN1

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

JP2

BMC

P2-DIMMA2

CPU2

CN14

JPME1

BIOS

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

JSATA1

P1-DIMMF1

P1-DIMMF2

P1-DIMME1

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

LED2

HDD_LED1

BMC Button (SW2) Settings

BMC Button (SW2) Function

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

USB0(3.0)

JUSB1

CN12

JRK1

JM2-1

1. SW1 (System Reset Button)

2. SW2 (BMC Button)

3. JBMC_BTN1 (Jumper for the BMC
Button)

LEDBMC

LEDM1

LAN CTRL

CN13

CN17

JBMC_BTN1

JPCIE2

LAN1/LAN2

IPMI_LAN

USB1/2(3.0)

JLAN1

VGA

JPCIE1

3

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

2

1

12

43

Super X11DGO-T User's Manual

2.6 Connectors and Headers

Power Connectors

SMCI Proprietary Power Connectors and 12-pin Power Connectors

Two SMCI proprietary power connectors (JPWR1/JPWR2), located on the midplane, provide
main power for your system use. In addition, three 8-pin power connectors (JPW11/JPW12/
JPW13) are also located on the motherboard to provide power to your system. Be sure to
connect all the power connectors to the power supply to ensure adequate power supply to
your machine. See the table below for the pin-out defi nitions for 8-pin power connectors.

12V/5V 8-pin Power

Pin Defi nitions

Pin# Defi nition

1 - 4 Ground

5 - 6 +12V

7 - 8 +5V

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

5

JPW13

JPW11

3

JPW12

JSDCARD1

4

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BIOS
LICENSE

CPU1

CN10

BT1

BATTERY

HDD_LED1

JPWR1

P1-DIMMA1

P1-DIMMA2

1 2

JPWR2

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMC2

1. JPWR1 (Proprietary Power)

2. JPWR2 (Proprietary Power)

3. JPW11 (8-pin Power)

4. JPW12 (8-pin Power)

5. JPW13 (8-pin Power)

CN1)CN2)

RAID KEY-1

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JRK1

JM2-1

M.2-P2

LED2

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

USB0(3.0)

JUSB1

JM2-2

LED1

CN12

CN16

CPU2 SLOT2 PCI-E 3.0 X16

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

44

JPCIE1

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Chapter 2: Installation

Solid State Card Connector

A solid state card connector slot is located at JSDCARD1 on the motherboard. This slot is
reserved for manufacture use only. See the layout below for the location.

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

1

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

FAN1

BAR CODE

MAC CODE

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

P1-DIMMC2

SAN MAC

CN16

1. SSD Card Slot (Reserved for
manufacture use)

JWD1

USB0(3.0)

JUSB1

CN12

LEDM1

LEDBMC

LAN CTRL

CN13

CN17

JBMC_BTN1

JPCIE2

LAN1/LAN2

IPMI_LAN

USB1/2(3.0)

JLAN1

VGA

JPCIE1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

45

Super X11DGO-T User's Manual

Headers

Onboard Fan Header

This motherboard has two fan headers (FAN1/FAN2) for system cooling. These fans are 4-pin
fan headers, which are backward compatible with traditional 3-pin fans. The onboard fan
speed is controlled by Thermal Management (via Hardware Monitoring) in the IPMI interface.
For best thermal management, please use all 4-pin fans on the motherboard.

Fan Header

Pin Defi nitions

Pin# Defi nition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

1

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

1. FAN1

2. FAN2

JWD1

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

46

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Chapter 2: Installation

TPM Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which
is available from Supermicro (optional). A TPM/Port 80 connector is a security device that
supports encryption and authentication in hard drives. It allows the motherboard to deny
access if the TPM associated with the hard drive is not installed in the system. See the layout
below for the location of the TPM header.

Serial Port

A serial port (COM1) is located next to the power connector (JPW12) on the motherboard.
The COM port header provides serial communication support. See the layout below for the
location of COM1.

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

2

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

1. TPM/Port 80 Header

2. COM1 Header

JWD1

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

47

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Super X11DGO-T User's Manual

VROC RAID Key Header

A RAID Key header is located at JRK1 on the motherboard. The RAID key is used for RAID
support for onboard NVMe devices.

Intel RAID Key
Pin Defi nitions

Pin# Defi nition

1 Ground

2 3.3V Standby

3 Ground

4 PCH RAID Key

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

1. RAID Key

JWD1

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

48

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Chapter 2: Installation

PCI-E M.2 Slots

Two PCI-E M.2 slots (M.2-P1/M.2-P2) are located at JM2-1/JM2-2 on the motherboard. An
M.2 slot, also known as "Next Generation Form Factor (NGFF)", is used to replace a mini
PCI-E slot and can accommodate various card sizes with increased functionality and spatial
effi ciency. The M.2 socket on the motherboard supports PCI-E 3.0 X4 (32 Gb/s) SSD cards
in the 2260, 2280 and 22110 form factors.

M.2 Specifi cations Supported by the X11DGO-T

M.2 Socket Type Socket 3

M.2 PCI-E Bus Width PCI-E Gen 3 x4 from PCH

M.2 Adapter Key M Key or B+M Key

M.2 Adapter Type PCI-E SSD only

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

LEDM1

LEDBMC

LAN1/LAN2

JLAN1

VGA

IPMI_LAN

USB1/2(3.0)

CN14

CN2

CPU2

CN1

JP2

BMC

P2-DIMMA2

CPU2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

BT1

CPU1

CN10

RAID KEY-1

HDD_LED1

1. M.2-P1 Slot

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMA2

P1-DIMMC2

CN1)CN2)

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

2

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CN17

JPCIE2

BMC_BUTTON

SW2

JWD1

USB0(3.0)

JUSB1

CN12

CN13

RESET_BUTTON

SW1

JBMC_BTN1

PWR_BUTTON

PWR_SW1

JRK1

1

JM2-1

LED2

JPCIE1

2. M.2-P2 Slot

49

Super X11DGO-T User's Manual

(

)

CN Connectors (CN10-17)

CN connectors are used to connect PCI buses from processors to PCI-E slots using Oculink
x8 or x8 to x4 Y cables. Refer the table and the diagram below for details on onboard CN
connectors.

Connector Description

CN10-17

Oculink connectors used to connect PCI-E buses from processors to PCI-E slots or NVMe

backplanes (via x8 to x4 Y cables) (Note: Y cables are needed to connect NVMe backplanes)

CN10

Oculink connector supported by CPU1 PCI-E Port 3 [7:0] and used as CPU1 Master Port for

NVMe side band connections

CN11 Oculink connector supported by CPU1 PCI-E Port 3 [15:8]

CN12 Oculink connector supported by Slot1 PCI-E [7:0]

CN13 Oculink connector supported by Slot1 PCI-E [15:8]

CN14

Oculink connector supported by CPU2 PCI-E Port 3 [7:0] and used as CPU2 Master Port for

NVMe side band connections

CN15 Oculink connector supported by CPU2 PCI-E Port 3 [15:8]

CN16 Oculink connector supported by Slot2 PCI-E [7:0]

CN17 Oculink connector supported by Slot2 PCI-E [15:8]

Note: Both JPCIE1 and JPCIE2 are lane reversal, which means that CPU PCE-E lane
[15] is connected to PCE-E lane[0], the fi rst lane of the slots.

JWD1

USB0(3.0)

JUSB1

1. CN10

2. CN11

3. CN12

4. CN13

5. CN14

6. CN15

7. CN16

8. CN17

X11DGO-T

REV:1.00

PCH

(CPU1 (CPU1

CN11

JBT1

CN15

6

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-H1

(CPU2

CN14

BMC

CN1)

5

JP2

JPME1

BIOS

FAN2

JTPM1

I-SATA4~7

I-SATA0~3

JSATA1

2

BT1

BATTERY

BIOS
LICENSE

CN10

BAR CODE

MAC CODE

CN1)CN2)

1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-2

FAN1

M.2-H2

JM2-1

SAN MAC

IPMI CODE

LED1

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

50

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

JPCIE1

9

10

JPCIE2

9. CPU1 Slot1

7

CN16

CN17

8

BMC_BUTTON

SW2

10. CPU2 Slot2

CN12

3

CN13

4

JBMC_BTN1

RESET_BUTTON

PWR_BUTTON

SW1

PWR_SW1

Chapter 2: Installation

I-SATA 3.0 Ports

This motherboard has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) on the motherboard.
These SATA ports are supported by the Intel C621 chipset.

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

FAN1

BAR CODE

MAC CODE

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

P1-DIMMC2

SAN MAC

CN16

1. I-SATA0-3, I-SATA4-7

JWD1

USB0(3.0)

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

51

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Super X11DGO-T User's Manual

2.7 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identifi ed with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

52

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds. (Be sure to remove the screwdriver when not in use.)

5. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

Midplane Interface

JPWR2

JPWR1

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CPU2

CN1

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

1

JBT1

BIOS
LICENSE

BT1

BATTERY

CPU1

CN10

RAID KEY-1

HDD_LED1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

CN1)CN2)

LED2

JRK1

JM2-1

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

JBT1 contact pads

1. Clear CMOS

JWD1

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

53

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Super X11DGO-T User's Manual

Management Engine (ME) Recovery

Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource
allocation for essential system operation only in order to maintain normal power operation
and management. In the single operation mode, online upgrade will be available via Recovery
mode. See the table below for jumper settings.

Manufacturer Mode

Jumper Settings

Jumper Setting Defi nition

Pins 1-2 Normal

Pins 2-3 ME Recovery

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CN1

CPU2

JP2

1

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

JRK1

LED2

HDD_LED1

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

1. ME Recovery

JWD1

JUSB1

CN12

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

JPCIE1

54

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Chapter 2: Installation

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in the BIOS. The
default setting is Reset.

Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.

Watch Dog

Jumper Settings

Jumper Setting Defi nition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

CPU2

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

CN14

CN2

CPU2

CN1

JP2

BMC

P2-DIMMA2

BIOS

JPME1

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

BT1

CPU1

CN10

RAID KEY-1

HDD_LED1

CN1)CN2)

JRK1

LED2

JM2-1

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

P1-DIMMC1

USB0(3.0)

CN16

JWD1

JUSB1

CN12

1. Watch Dog

1

LEDM1

LEDBMC

VGA

LAN CTRL

LAN1/LAN2

JLAN1

IPMI_LAN

USB1/2(3.0)

55

JPCIE1

JPCIE2

CN13

CN17

JBMC_BTN1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

Super X11DGO-T User's Manual

Jumper for the BMC Button

A jumper used to change the BMC button setting is located on JBMC_BTN1 on the
motherboard. When pins 1-2 of JBMC_BTN1 are closed, BMC button (SW2) is used as a
BMC UID button. When pins 2-3 of JBMC_BTN1 are closed, SW2 is used for BMC reset.
Refer to the table below for details.

JBMC_BTN1

Jumper Settings

Jumper Setting BMC Button (SW2) Function

Pins 1-2: Short (Default) SW2 Used for BMC UID support

Pins 2-3: Short SW2 Used for BMC Reset support

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CPU2

CN15

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

LEDM1

LEDBMC

LAN1/LAN2

JLAN1

VGA

CPU2

IPMI_LAN

USB1/2(3.0)

CN14

CN2

CPU2

CN1

JP2

JPME1

BMC

P2-DIMMA2

P2-DIMMA1

BIOS

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMMF2

P1-DIMME1

P1-DIMME2

I-SATA4~7

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

BT1

CPU1

CN10

RAID KEY-1

HDD_LED1

1. JBMC_BTN1 (BMC Button Jumper)

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMA2

P1-DIMMC2

CN1)CN2)

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CN17

JPCIE2

BMC_BUTTON

2

SW2

JWD1

USB0(3.0)

JUSB1

CN12

CN13

RESET_BUTTON

SW1

JBMC_BTN1

PWR_SW1

JRK1

JM2-1

LED2

JPCIE1

2. SW2 (BMC Button)

1

PWR_BUTTON

2

56

Chapter 2: Installation

2.8 LED Indicators

LAN LEDs

The LAN ports are located on the IO
plane on the motherboard. Each Ethernet
LAN port has two LEDs. The yellow LED
indicates activity. Link LED, located on the
right side of the LAN port, may be green,
amber or off indicating the speed of the
connection. See the tables at right for more
information.

Dedicated IPMI LAN LEDs

In addition to LAN 1/LAN 2, a dedicated
IPMI LAN is located on the I/O plane of
the motherboard. The yellow LED on the
right indicates activity, while the green
LED on the left indicates the speed of the
connection. See the tables at right for more
information.

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

P2-DIMMA2

P2-DIMMA1

P2-DIMMB2

P2-DIMMB1

P2-DIMMC2

P2-DIMMC1

P1-DIMMF1

P1-DIMME1

P1-DIMMF2

P1-DIMME2

P1-DIMMD1

P1-DIMMD2

P1-DIMMA2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

JPWR2

P1-DIMMC2

P1-DIMMC1

LAN 1/2

Activity LED

Link LED

GLAN Activity Indicator (Left)

LED Settings

Color State Defi nition

Yellow Flashing Active

LAN Link Indicator (Right)

LED Settings

LED Color Defi nition

Off No Connection, 10 or 100 Mbps

Green 10 Gbps

Amber 1 Gbps

IPMI LAN

Link LED Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color State Defi nition

Link (Left) Green: Solid 100 Mbps

Amber: Solid 1 Gbps

Activity (Right) Yellow:

Blinking

Active

1. LAN1/LAN2 LEDs

2. IPMI LAN LEDs

CPU2

CN15

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

LEDM1

LEDBMC

LAN1/LAN2

JLAN1

VGA

1

CPU2

CN2

IPMI_LAN

USB1/2(3.0)

2

CN14

CPU2

CN1

JP2

BMC

FAN2

BIOS

JPME1

JTPM1

I-SATA0~3

JSATA1

(CPU1 (CPU1

CN11

X11DGO-T

Rev. 1.01

BT1

JBT1

PCH

BATTERY

BIOS

I-SATA4~7

LICENSE

CPU1

CN10

RAID KEY-1

HDD_LED1

CN1)CN2)

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

USB0(3.0)

JUSB1

CN12

JRK1

JM2-1

LED2

2

CN13

CN17

JBMC_BTN1

JPCIE2

JPCIE1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

1

57

Super X11DGO-T User's Manual

BMC Heartbeat LED

LEDM1 (LEDBMC) is the BMC heartbeat LED. When the LED is blinking green, BMC functions
normally. See the table below for the LED status.

BMC Heartbeat LED Indicator

LED Color Defi nition

Green: Blinking BMC Normal

HDD Activity LED

A Hard Disk Activity LED is located at HDD_LED1. When the LED is blinking, HDD is active.
See the table below for the LED status.

HDD Heartbeat LED Indicator

LED Color Defi nition

Green:
Blinking

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CN15

CPU2

CN2

CPU2

CN1

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

JP2

BMC

P2-DIMMA2

CPU2

CN14

JPME1

BIOS

P2-DIMMA1

FAN2

P2-DIMMB2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

CPU1

CN1)CN2)

CN10

BT1

RAID KEY-1

HDD_LED1

2

HDDActive

1. BMC Heartbeat LED

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMA2

P1-DIMMC2

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

USB0(3.0)

JUSB1

CN12

JRK1

JM2-1

LED2

2. HDD Activity LED

LAN CTRL

CN13

CN17

JBMC_BTN1

JPCIE2

1

LEDM1

LEDBMC

LAN1/LAN2

IPMI_LAN

USB1/2(3.0)

JLAN1

VGA

JPCIE1

RESET_BUTTON

BMC_BUTTON

PWR_BUTTON

SW2

SW1

PWR_SW1

58

Chapter 2: Installation

M.2 Slot Activity LED Indicators

This motherboard has two M.2 slots (M.2-P1/M.2-P2), and each M.2 slot has an Activity LED.
The Activity LED for M.2 Slot 1 is located at LED1, and for M.2 Slot 2, LED2. When these
LEDs are on, M.2 slots are active. See the layout below for the locations of LED1 and LED2.

M.2 Slot Activity LEDs

(LED1/LED2)

LED State Defi nition

LED1 (M.2 Slot1 Activity LED) On M.2 Slot 1: Active

LED2 (M.2 Slot2 Activity LED) On M.2 Slot 2: Active

Midplane Interface

P2-DIMMF1

P2-DIMMF2

P2-DIMME2

P2-DIMME1

P2-DIMMD1

P2-DIMMD2

CN15

CPU2

CN2

CPU2

CN1

JPW13

JPW11

JPW12

JSDCARD1

COM1

SD CARD M.2-P1

LAN CTRL

LEDM1

LEDBMC

LAN1/LAN2

JLAN1

VGA

JP2

BMC

IPMI_LAN

USB1/2(3.0)

P2-DIMMA2

CPU2

CN14

JPME1

BIOS

P2-DIMMA1

P2-DIMMB2

FAN2

P2-DIMMB1

JTPM1

P2-DIMMC2

P2-DIMMC1

I-SATA0~3

P1-DIMMF1

JSATA1

P1-DIMME1

P1-DIMMF2

I-SATA4~7

P1-DIMME2

P1-DIMMD1

X11DGO-T

Rev. 1.01

PCH

P1-DIMMD2

(CPU1 (CPU1

CN11

JBT1

BATTERY

BIOS
LICENSE

BT1

CPU1

CN10

RAID KEY-1

HDD_LED1

1. M.2 Slot1 Activity LED (LED1)

JPWR2

JPWR1

P1-DIMMA1

P1-DIMMB2

P1-DIMMB1

P1-DIMMC1

P1-DIMMA2

P1-DIMMC2

CN1)CN2)

FAN1

BAR CODE

MAC CODE

SAN MAC

IPMI CODE

1

JM2-2

M.2-P2

LED1

CN16

CPU2 SLOT2 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CN17

JPCIE2

BMC_BUTTON

SW2

JWD1

USB0(3.0)

JUSB1

CN12

CN13

RESET_BUTTON

SW1

JBMC_BTN1

PWR_BUTTON

PWR_SW1

JRK1

2

JM2-1

LED2

JPCIE1

2. M.2 Slot2 Activity LED (LED2)

59

Super X11DGO-T User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing, or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink*, connect the internal speaker (if applicable), and the power
LED to the motherboard. Check all jumper settings as well. (Make sure that the heatsink
is fully seated.)

7. Use the correct type of onboard CMOS battery as recommended by the manufacturer.
To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

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Chapter 3: Troubleshooting

No Video

If the power is on but you have no video, remove all the add-on cards and cables.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

Turn on the system with only one DIMM module installed. If the system boots, check for bad
DIMM modules or slots by following the Memory Errors Troubleshooting procedure below.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Confi rm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

Losing the System's Setup Confi guration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fi x the setup confi guration problem, contact your vendor for
repairs.

61

Super X11DGO-T User's Manual

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.

http://www.supermicro.com for

2. Cable connection: Check to make sure that all cables are connected and working
properly.

3. Using the minimum confi guration for troubleshooting: Remove all unnecessary
components (starting with add-on cards fi rst), and use the minimum confi guration (but
with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

62

Chapter 3: Troubleshooting

6. To fi nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a
motherboard manufacturer, you might not have purchased the motherboard directly from us,
so it is best to fi rst check with your distributor or reseller for troubleshooting services. They
should know of any possible problem(s) with the specifi c system confi guration that was sold
to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be
fl ashed depending on the modifi cations to the boot block codes.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system fi rst

boots up)

• System confi guration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

63

Super X11DGO-T User's Manual

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: This motherboard supports up to 6TB of 3DS Load Reduced DIMM (3DS LRDIMM),

Load Reduced DIMM (LRDIMM), 3DS Registered DIMM (3DS RDIMM), Registered DIMM
(RDIMM) DDR4 (288-pin) ECC 2933*/2666/2400/2133 MHz modules in 24 slots. See Section

2.4 for details on installing memory.

Note: 1. Support for 2933 MHz memory is dependent on the CPU SKU. 2. Up to 6TB
DCPMM memory is supported (2nd Gen Intel Xeon Scalable-SP processors only).

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS fi les are located on our website at

supermicro.com

update your BIOS on our website. Select your motherboard model and download the BIOS
fi le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip fi le and the .exe fi le. If
you choose the zip BIOS fi le, please unzip the BIOS fi le onto a bootable USB device. Run
the batch fi le using the format FLASH.BAT fi lename.rom from your bootable USB device to
fl ash the BIOS. Then, your system will automatically reboot.

. Please check our BIOS warning message and the information on how to

http://www.

Question: Why can't I turn off the power using the momentary power on/off switch?

Answer: The instant power off function is controlled in the BIOS by the Power Button Mode

setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS is in control of the system. When the Standby or Suspend feature is
enabled or when the BIOS is not in control such as during memory count (the fi rst screen
that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

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Chapter 3: Troubleshooting

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

3. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery
in the garbage or a public landfi ll. Please comply with the regulations set up by your local
hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Note: When replacing a battery, be sure to only replace it with the same type.

OR

65

Super X11DGO-T User's Manual

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (

support/rma/

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failures due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor fi rst for any product problems.

).

http://www.supermicro.com/

66

Chapter 4: UEFI BIOS

Chapter 4

UEFI BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ setup utility for the X11DGO-T motherboard. The BIOS
is stored on a chip and can be easily upgraded using a fl ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to the BIOS that may not be refl ected
in this manual.

Starting the Setup Utility

To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can
be confi gured. “Grayed-out” options cannot be confi gured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A "

" indicates a submenu. Highlighting such an item and pressing the <Enter> key will

open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F2>, <F3>, <F4>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at
any time during the setup navigation process.

67

Super X11DGO-T User's Manual

4.2 Main Setup

When you fi rst enter the AMI BIOS setup utility, you will see the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen.
The Main BIOS setup screen is shown below.

System Date/System Time

Use this item to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow
keys to move between fi elds. The date must be entered in Day MM/DD/YYYY format. The
time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is the BIOS build date after the RTC (Real Time Clock) reset.

Supermicro X11DGO-T

BIOS Version

This feature displays the version of the BIOS ROM used in the system.

Build Date

This feature displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This feature displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.

68

Chapter 4: UEFI BIOS

Memory Information

Total Memory

This feature displays the total size of memory available in the system.

Memory Speed

This feature displays the default speed of the memory modules installed in the system.

69

Super X11DGO-T User's Manual

4.3 Advanced Setup Confi gurations

Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, an improper
DRAM frequency, or a wrong BIOS timing setting may cause the system to malfunction. When
this occurs, restore the setting to the manufacturer default setting.



Boot Confi guration

Quiet Boot

Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

Note: POST message is always displayed regardless of the item setting.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display settings. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are Off and On.

70

Chapter 4: UEFI BIOS

Wait For 'F1' If Error

Select Enabled to force the system to wait until the <F1> key is pressed if an error occurs.
The options are Disabled and Enabled.

Interrupt 19 Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this feature
is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately to allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

When EFI (Extensible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Confi guration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power Off for the system
power to remain off after a power loss. Select Power On for the system power to be turned
on after a power loss. Select Last State to allow the system to resume its last power state
before a power loss. The options are Stay Off, Power On, and Last State.

71

Super X11DGO-T User's Manual



CPU Confi guration

Warning: Setting the wrong values in the following sections may cause the system to malfunc-

tion.



Processor Confi guration

The following CPU information will be displayed:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.

Core Enabled

Use this feature to enable or disable CPU cores in the processor specifi ed by the user. Use
the <+> key and the <-> key on the keyboard to set the desired number of CPU cores you
want to enable in a processor. Please note that the maximum of 24 CPU cores are currently
available in each CPU package. The default setting is 0.

Monitor/Mwait

Select Enable to enable the Monitor/Mwait instructions in the processor. The options are

Enable and Disable.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit support which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,
thus preventing a worm or a virus from fl ooding illegal codes to overwhelm the processor,
damaging the system during a virus attack. The options are Enable and Disable. (Refer to
Intel and Microsoft websites for more information.)

72

Chapter 4: UEFI BIOS

Intel Virtualization Technology (Available when two processors are installed on the
motherboard)

Select Enable to use Intel Virtualization Technology which will allow multiple workloads to
share the same set of common resources. On shared virtualized hardware, various workloads
(or tasks) can co-exist, sharing the same resources, while functioning in full independence
from each other, and migrating freely across multi-level infrastructures and scale as needed.
The settings are Enable and Disable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Lock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and

Enable.

Note: Please power off and reboot the system for the changes you've made to take

effect. Please refer to Intel’s website for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch
data streams from the cache memory to the DCU (Data Cache Unit) to speed up data
accessing and processing to enhance CPU performance. The options are Disable and Enable.

DCU IP Prefetcher

This feature allows the system to use the sequential load history, which is based on the
instruction pointer of previous loads, to determine whether the system will prefetch additional
lines. The options are Enable and Disable.

LLC Prefetch

If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.

Extended APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.

73

Super X11DGO-T User's Manual

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.



Advanced Power Management Confi guration

Power Technology

Select Energy Effi cient to support power-saving mode. Select Custom to customize system
power settings. Select Disabled to disable power-saving settings. The options are Disable,

Energy Effi cient, and Custom.

Power Performance Tuning (Available when "Power Technology" is set to Custom)

Select BIOS to allow the system BIOS to confi gure the Power-Performance Tuning Bias
setting. The options are BIOS Controls EPB and OS Controls EPB.

ENERGY_PERF_BIAS_CFG Mode (ENERGY PERFORMANCE BIAS
CONFIGURATION Mode) (Available when "Power Performance Tuning" is set to

BIOS Controls EPB)

Use this feature to set the processor power use policy to achieve the desired operation
settings for your machine by prioritizing system performance or energy savings. Select
Maximum Performance to maximize system performance (to its highest potential); however,
this may result in maximum power consumption as energy is needed to fuel the processor
frequency. The higher the performance is, the higher the power consumption will be.
Select Max Power Effi cient to maximize power saving; however, system performance may
be substantially impacted because limited power use decreases the processor frequency.
The options are Max (Maximum) Performance, Performance, Balanced Performance,
Balanced Power, and Power.



CPU P State Control (Available when "Power Technology" is set to

Custom)

SpeedStep (PStates)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.

Confi g (Confi gure) TDP (Available when SpeedStep is set to Enable)

Use this feature to set the appropriate TDP (Thermal Design Power) level for the system.
The TDP refers to the maximum amount of power allowed for running "real applications"
without triggering an overheating event. The options are Normal, Level 1, and Level 2.

74

Chapter 4: UEFI BIOS

EIST PSD Function (Available when SpeedStep is set to Enable)

Use this item to confi gure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy effi cient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.

Turbo Mode (Available when SpeedStep is set to Enable)

Select Enable for processor cores to run faster than the frequency specifi ed by the
manufacturer. The options are Disable and Enable.



Hardware PM (Power Management) State Control Available when

"Power Technology" is set to Custom)

Hardware P-States

If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.



CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Disable
and Enable.

CPU C6 Report (Available when Autonomous Core C-State is set to Disable)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.

Enhanced Halt State (C1E) (Available when Autonomous Core C-State is set to
Disable)

Select Enable to enable "Enhanced Halt State" support, which will signifi cantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

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Super X11DGO-T User's Manual

Package C State Control (Available when "Power Technology" is set



to Custom)

Package C State

Use this feature to set the limit on the C-State package register. The options are C0/C1
state, C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.



CPU T State Control Available when "Power Technology" is set to

Custom)

Software Controlled T-States

If this feature is set to Enable, CPU throttling settings will be supported by the software of
the system. The options are Enable and Disable.



Chipset Confi guration

Warning: Setting the wrong values in the following items may cause the system to malfunction.

North Bridge



This feature allows the user to confi gure the settings for the Intel North Bridge.



UPI (Ultra Path Interconnect) Confi guration

This section displays the following UPI General Confi guration information:

• Number of CPU

• Number of Active UPI Link

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI PCI-E Confi guration Base/Size

Degrade Precedence

Use this feature to select the degrading precedence option for Ultra Path Interconnect (UPI)
connections. Select Topology Precedent to degrade UPI features if system options are in
confl ict. Select Feature Precedent to degrade UPI topology if system options are in confl ict.
The options are Topology Precedence and Feature Precedence.

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Link L0p Enable

Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.

Link L1 Enable

Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.

IO Directory Cache (IODC)

Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,
Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

SNC

Select Enable to use "Sub NUMA Clustering" (SNC), which supports full SNC (2-cluster)
interleave and 1-way IMC interleave. Select Auto for 1-cluster or 2-cluster support depending
on the status of IMC (Integrated Memory Controller) Interleaving. The options are Disable,
Enable, and Auto.

XPT Prefetch

Select Enable to support XPT Prefetching to enhance system performance. The options
are Enable, Disable, and Auto.

KTI Prefetch

Select Enable to support KTI Prefetching to enhance system performance. The options
are Enable and Disable.

Local/Remote Threshold

This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal, which
handles hardware interruptions. The options are Disable, Auto, Low, Medium, and High.

Stale AtoS (A to S)

The in-memory directory has three states: I, A, and S states. The I (-invalid) state indicates
that the data is clean and does not exist in the cache of any other sockets. The A (-snoop
All) state indicates that the data may exist in another socket in an exclusive or modifi ed
state. The S state (-Shared) indicates that the data is clean and may be shared in the
caches across one or more sockets. When the system is performing "read" on the memory
and if the directory line is in A state, we must snoop all other sockets because another
socket may have the line in a modifi ed state. If this is the case, a "snoop" will return the
modifi ed data. However, it may be the case that a line "reads" in an A state, and all the
snoops come back with a "miss". This can happen if another socket reads the line earlier
and then has silently dropped it from its cache without modifying it. If the "Stale AtoS"
feature is enabled, a line will transition to the S state when the line in the A state returns
only snoop misses. That way, subsequent reads to the line will encounter it in the S state

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and will not have to snoop, saving the latency and snoop bandwidth. Stale "AtoS" may be
benefi cial in a workload where there are many cross-socket reads. The options are Disable,
Enable, and Auto.

LLC Dead Line Alloc

Select Enable to opportunistically fi ll the deadlines in the LLC. The options are Enable,
Disable, and Auto.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.



Memory Confi guration

Enforce POR (Plan of Record)

Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are POR and Disable.

PPR Type

Post Package Repair (PPR) is a new feature available for the DDR4 Technology. PPR
provides additional spare capacity within a DDR4 DRAM module that is used to replace
faulty cell areas detected during system boot. PPR offers two types of memory repairs.
Soft Post Package Repair (sPPR) provides a quick, temporary fi x on a raw element in a
bank group of a DDR4 DRAM device, while hard Post Package Repair (hPPR) will take a
longer time to provide a permanent repair on a raw element. The options are Auto, Enable,
Soft PPR, and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The
options are Auto, 1866, 2000, 2133, 2400, 2666, and 2933. (Note: Support for 2933 MHz
memory is dependent on the CPU SKU.)

Data Scrambling for DDR4

Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. Select Auto for the default setting of the Memory Reference Code (MRC) to
set confi gure data scrambling for DDR4 setting. The options are Auto, Disable, and Enable.

tCCD_L Relaxation

If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column
to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.
The options are Auto, Enable and Disable.

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tRWSR (Read to Write turnaround time for Same Rank) Relaxation

Select Enable to use the same tRWSR DDR timing setting among all memory channels,
and in which case, the worst case value among all channels will be used. Select Disable
to use different values for the tRWSR DDR timing settings for different channels as trained.
The options are Auto, Disable, and Enable.

Enable ADR

Select Enable for ADR (Async DIMM Self-Refresh) support to enhance memory performance.
The options are Disable and Enable.

Data Scrambling for NVDIMM

Select Enable to enable data scrambling support for onboard NVDIMM memory to improve
system performance and security. The options are Auto, Disable, and Enable.

Erase-Arm NVDIMMs

If this feature is set to Enable, the function that arms the NVDIMMs for safe operations in
the event of a power loss will be removed. The options are Enable and Disable.

Restore NVDIMMs

Select Enable to restore the functionality and the features of NVDIMMs. The options are

Enable and Disable.

Interleave NVDIMMs

If this item is set to Enable, all onboard NVDIMM modules will be confi gured together as
a group for the interleave mode. If this item is set to Disable, individual NVDIMM modules
will be confi gured separately for the interleave mode. The options are Enable and Disable.

Reset Trigger ADR (Async DIMM Self-Refresh)

Upon system power loss, an ADR sequence will be triggered to allow ADR to fl ush the
write-protected data buffers in the memory controller and place the DRAM memory in self­refresh mode. When this process is complete, the NVDIMM will then take control of the
DRAM memory and transfer the contents to the onboard Flash memory. After the transfer is
complete, the NVDIMM goes into a zero power state. The data transferred will be retained
for the duration specifi ed by the fl ash memory. The options are Enable and Disable.

S5 Trigger ADR

Select Enabled to support S5-Triggered ADR to enhance system performance and data
integrity. The options are Disabled and Enabled.

2X Refresh

Select Enable for memory 2X refresh support to enhance memory performance. The options
are Disable, Enable and Auto.

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Page Policy

Use this feature to set the page policy for onboard memory support. The options are Closed,
Adaptive, and Auto.

IMC Interleaving

Use this feature to confi gure interleaving settings for the IMC (Integrated Memory
Controller), which will improve memory performance. The options are 1-way Interleave,
2-way Interleave, and Auto.



Memory Topology

This item displays the information of onboard memory modules as detected by the BIOS.

• P1 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2

• P2 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2



Memory RAS (Reliability_Availability_Serviceability) Confi guration

Use this submenu to confi gure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.

Mirror Mode

Use this feature to confi gure the mirror mode settings for all 1LM/2LM memory modules
installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are

Disable and Mirror Mode 1LM

UEFI ARM Mirror

If this feature is set to Enable, mirror mode confi guration settings for UEFI-based Address
Range memory will be enabled upon system boot. This will create a duplicate copy of data
stored in the memory to increase memory security, but it will reduce the memory capacity
into half. The options are Disable and Enable.

Memory Rank Sparing

Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.

Note: This item will not be available when memory mirror mode is set to Mirror Mode
1LM or an AEP device is plugged in.

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Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default setting
is 100.

Intel Run Sure

Select Enable to use Intel Run Sure Technology which will enhance critical data protection
and increase system uptime and resiliency. The options are Enable and Disable.

SDDC (Single Device Data Correction) Plus One (Available when Intel Run Sure is
set to Enable)

Select Enable for SDDC Plus one support, which is the enhanced feature to SDDC, will
spare the faulty DRAM device out after an SDDC event has occurred. After the event, the
SDDC+1 ECC mode is activated to protect against any additional memory failure caused
by a ‘single-bit’ error in the same memory rank. The optiions are Enable and Disable.

ADDDC (Adaptive Double Device Data Correction) Sparing (Available when Intel
Run Sure is set to Enable)

Select Enable for Adaptive Double Device Data Correction (ADDDC) support, which will
not only provide memory error checking and correction but will also prevent the system
from issuing a performance penalty before a device fails. Please note that virtual lockstep
mode will only start to work for ADDDC after a faulty DRAM module is spared. The options
are Enable and Disable.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this feature is set to Enable, the IO hub will read and write back one cache
line every 16K cycles if there is no delay caused by internal processing. By using this
method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The
options are Enable and Disable.

Patrol Scrub Interval

Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.

Note: This item is hidden when Patrol Scrub item is set to Disable.

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IIO Confi guration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.

CPU1 Confi guration/CPU2 Confi guration

IOU0 (IIO PCIe Br1)

Use this feature to confi gure the PCI-E Bifurcation setting for a PCI-E port specifi ed by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

Use this feature to confi gure the PCI-E Bifurcation setting for a PCI-E port specifi ed by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

Use this feature to confi gure the PCI-E Bifurcation setting for a PCI-E port specifi ed by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

Use this feature to confi gure the PCI-E Bifurcation setting for a PCI-E port specifi ed by the
user. The options are x16 and Auto.

MCP1 (IIO PCIe Br5)

Use this feature to confi gure the PCI-E Bifurcation setting for a PCI-E port specifi ed by the
user. The options are x16 and Auto.

Socket 0 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1
Confi guration only)

Link Speed

Use this feature to confi gure the link speed of a PCI-E port specifi ed by the user. The
options are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and
Gen 3 (Generation 3) (8 GT/s)

The following information will be displayed:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

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PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Confi guration only)

Select Auto for the system BIOS to automatically set the maximum payload value for a
PCI-E device specifi ed by to user for system performance enhancement. The options are
Auto, 128B, and 256B.

IOAT Confi guration

Disable TPH (TLP Processing Hint)

TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and No.

Prioritize TPH (TLP Processing Hint)

Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.

Relaxed Ordering

Select Enable to allow certain transactions to be processed and completed before other
transactions that have already been enqueued. The options are Disable and Enable.



Intel VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.

ACS (Access Control Services) Control

Select Enable to program Access Control Services to Chipset PCI-E Root Port Bridges.
Select Disable to program Access Control Services to all PCI-E Root Port Bridges. The
options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.

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PassThrough DMA

Select Enable for the Non-Isoch VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.

ATS

Select Enable to enable ATS (Address Translation Services) support for the Non-Isoch VT-d
engine to enhance system performance. The options are Enable and Disable.

Posted Interrupt

Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization effi ciency by simplifying interrupt migration and lessening the need of physical
interrupts. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Isoch VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.



Intel® VMD Technology

This section describes the confi guration settings for the Intel Volume Management Device
(VMD) Technology.

Note: After you’ve enabled VMD on a PCI-E slot(JPCIE1 and JPCIE2), this PCI-E slot
will be dedicated for VMD use only, and it will no longer support any PCI-E device. To
re-activate this slot for PCI-E use, please disable VMD.



Intel® VMD for CPU1 CN1/CN2

VMD Confi g for CPU1 CN1/CN2

NVMe Mode

Select Legacy Mode for the onboard NVMe devices to support Legacy Mode. The options
are Legacy Mode and the VMD Mode.

Note: When this option is set to VMD Mode, the following two items will display.

VMD port 3A CN1 P1/3B CN1 P2/3C CN2 P1/3D CN2 P2

Select Enable to enable Intel Volume Management Device Technology support for the
root port specifi ed by the user. The options are Enable and Disable.

Note: After you've enabled VMD support on a NMVe port, this port will be dedicated
for VMD use only. To reactivate this port for NMVe use, please disable VMD support
on the port.

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Chapter 4: UEFI BIOS

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specifi ed by the user, which
will allow the user to change the devices on those root ports without shutting down the
system. The options are Disable and Enable.

CfgBar size

Use this feature to setup VMD Confi g BAR size specifi ed by users in bits (minimum =
20, maximum =27), ex: 20bits=1MB, 27bits=128MB. The default option is 25.

CfgBar attribute

Use this feature to setup VMD Confi g BAR attribute. The options are 32-bit non-prefetch-
able, 64-bit non-prefetchable and 64-bit prefetchable.

MemBar1 size

Use this feature to setup VMD Memory BAR1 size in bits (minimum = 20), ex: 20bits =
1MB, 22bits = 4MB, 26bits = 64MB. The default option is 25.

MemBar1 attribute
Use this feature to setup VMD Confi g BAR attribute. The options are 32-bit non-prefetch-

able, 64-bit non-prefetchable and 64-bit prefetchable.

MemBar2 size

Use this feature to setup VMD Memory BAR1 size in bits (minimum = 20), ex: 20bits =
1MB, 22bits = 4MB, 26bits = 64MB. The default option is 20.

MemBar2 attribute
Use this feature to setup VMD Confi g BAR attribute. The options are 64-bit non-prefetch-

able and 64-bit prefetchable.

Intel® VMD for CPU2 CN1/CN2



VMD Confi g for CPU2 CN1/CN2

NVMe Mode

Select Legacy Mode for the onboard NVMe devices to support Legacy Mode. The options
are Legacy Mode and the VMD Mode.

Note: When this option is set to VMD Mode, the following two items will display.

VMD port 3A CN1 P1/3B CN1 P2/3C CN2 P1/3D CN2 P2

Select Enable to enable Intel Volume Management Device Technology support for the
root port specifi ed by the user. The options are Enable and Disable.

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Note: After you've enabled VMD support on a NMVe port, this port will be dedicated
for VMD use only. To reactivate this port for NMVe use, please disable VMD support
on the port.

Hot Plug Capable

Select Enable to enable Hot Plug support for the root ports specifi ed by the user, which
will allow the user to change the devices on those root ports without shutting down the
system. The options are Disable and Enable.

CfgBar size

Use this feature to setup VMD Confi g BAR size specifi ed by users in bits (minimum =
20, maximum =27), ex: 20bits=1MB, 27bits=128MB. The default option is 25.

CfgBar attribute
Use this feature to setup VMD Confi g BAR attribute. The default options is 64-bit

prefetchable.

MemBar1 size

Use this feature to setup VMD Memory BAR1 size in bits (minimum = 20), ex: 20bits =
1MB, 22bits = 4MB, 26bits = 64MB. The default option is 25.

MemBar1 attribute
Use this feature to setup VMD Confi g BAR attribute. The options are 32-bit non-prefetch-

able, 64-bit non-prefetchable and 64-bit prefetchable.

MemBar2 size

Use this feature to setup VMD Memory BAR1 size in bits (minimum = 20), ex: 20bits =
1MB, 22bits = 4MB, 26bits = 64MB. The default option is 20.

MemBar2 attribute
Use this feature to setup VMD Confi g BAR attribute. The options are 64-bit non-prefetch-

able and 64-bit prefetchable.

IIO-PCIE Express Global Options

IIO-PCIE Express Global Options

The section allows the user to confi gure the following PCI-E global options:

PCE-E Hot Plug

Select Enable to support Hot-plugging for the selected PCI-E slots which will allow the user
to replace the devices installed in the slots without shutting down the system. The options
are Disable, Enable, Auto and Manual.

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PCI-E Completion Timeout (Global) Disable

Use this feature to select the PCI-E Completion Time-out settings. The options are Yes,
No, and Per-Port.

South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The options are Disabled and Enabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Enabled and Disabled.

PCIe PLL SSC

Select Enabled for PCH PCI-E Spread Spectrum Clocking support, which will allow the BIOS
to monitor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Enabled and Disabled.

Port 61h Bit-4 Emulation

Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The
options are Enabled and Disabled.

Install Windows 7 USB Support

Select Enabled to install the Windows 7 USB utility to support legacy USB devices for Windows
7 systems. The options are Enabled and Disabled.

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Server ME (Management Engine) Confi guration



This feature displays the following General ME information.

• Oper. (Operational) Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1/ME Firmware Status #2

• Current State

• Error Code

PTT Support (Available when TPM Confi guration is set to Disable.)

Select Enable to support Intel® Platform Trust Technology (PTT) to enhance system security
and data integrity. Intel PTT technology integrates the Host software stack, the system BIOS,
Manageability Engine (ME) features, and the PCH to run on Intel's TCG (Trusted Computing
Group) in conjunction with the TPM (Trusted Platform Module) fi rmware installed in your
system to ensure data security and integrity. The options are Disable and Enable.

Suppress PTT Commands (Available when PTT Support is set to Enable.)

Select Enable to bypass TPM2 commands and submit the system to the PTT (Platform Trust
Technology) Firmware.



(PCH) SATA Confi guration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.

Confi gure SATA as (Available when SATA Controller is set to Enable)

Select AHCI to confi gure a SATA drive specifi ed by the user as an AHCI drive. Select RAID
to confi gure a SATA drive specifi ed by the user as a RAID drive. The options are AHCI and
RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)

SATA HDD Unlock (Available when SATA Controller is set to Enable)

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

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Chapter 4: UEFI BIOS

SATA/sSATA RAID Boot Select (Available when Confi gure SATA as is set to RAID)

This feature allows the user to decide which controller should be used to boot the system.
The options are None, SATA Controller, sSATA Controller, and Both.

Aggressive Link Power Management

When this feature is set to Enable, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Enable and Disable.

SATA RAID Option ROM/UEFI Driver (Available when Confi gure SATA as is set to
RAID)

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 - SATA Port 7

Hot Plug

Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.

Spin Up Device

When this feature is set to Enable, the SATA device installed on the SATA port specifi ed by
the user will start a COMRESET initialization when an edge is detected from 0 to 1. The
options are Enable and Disable.

SATA Device Type

Use this feature to specify if the device installed on the SATA port specifi ed by the user
should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.



PCIe/PCI/PnP Confi guration

The following PCI information will be displayed:

• PCI Bus Driver Version

• PCI Devices Common Settings

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Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Enabled and Disabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled and
Disabled.

MMIO High Base

Use this feature to select the base memory size according to memory-address mapping for
the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
40T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for
the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

This feature determines how the lowest MMCFG (Memory-Mapped Confi guration) base is
assigned to onboard PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.

VGA Priority

Use this feature to select the graphics device to be used as the primary video display for
system boot. The options are Auto, Onboard and Offboard.

Option ROM Settings

CPU1 Slot 1 PCI-E 3.0 x16 OPROM/CPU2 Slot 2 PCI-E 3.0 x16 OPROM/X10DGO­SXM(V) SLOT1 PCI-E 3.0 X16 OPROM/X10DGO-SXM(V) SLOT2 PCI-E 3.0 X16
OPROM/X10DGO-SXM(V) SLOT3 PCI-E 3.0 X16 OPROM/X10DGO-SXM(V) SLOT4
PCI-E 3.0 X16 OPROM

Select EFI to allow the user to boot the computer using an EFI (Extensible Firmware Interface)
device installed on the PCI-E slot specifi ed by the user. Select Legacy to allow the user to
boot the computer using a legacy device installed on the PCI-E slot specifi ed by the user. The
options are Disabled, Legacy and EFI. (Note: Riser card names may differ in each system.)

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Chapter 4: UEFI BIOS

Onboard Video OPROM (Option ROM)

Use this feature to select the Onboard Video Option ROM type. The options are Do Not
Launch, Legacy and UEFI.

Onboard LAN1 Option ROM

Use this feature to select the type of device installed in LAN Port1, which will be used for
system boot. The options are Legacy, EFI and Disabled.

Onboard LAN2 Option ROM

Use this feature to select the type of device installed in LAN Port2, which will be used for
system boot. The options are Legacy, EFI and Disabled.



Network Stack Confi guration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unifi ed Extensible
Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Enabled and Disabled.

Ipv6 PXE Support

Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.

Ipv6 HTTP Support

Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Enabled and Disabled.

IPSEC Certifi cate

Select Enable to enable the IPSEC certifi cate for Ikev support. The options are Disabled and

Enabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.

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Media Detect Time

Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media
(Internet connection or LAN port). The default is 1.



Super IO Confi guration

Super IO Chip AST2500



Serial Port 1 Confi guration

Serial Port

Select Enabled to enable Serial Port 1. The options are Enabled and Disabled.

Device Settings (Available when the item above "Serial Port (1)" is set to Enabled)

This item displays the base I/O port address and the Interrupt Request address of a serial
port specifi ed by the user.

Change Settings

This feature specifi es the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specifi ed.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port 2 Confi guration

Serial Port

Select Enabled to enable Serial Port 2. The options are Enabled and Disabled.

Device Settings (Available when the item above "Serial Port (2)" is set to Enabled)

This feature displays the base I/O port address and the Interrupt Request address of a serial
port specifi ed by the user.

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Change Settings

This feature specifi es the base I/O port address and the Interrupt Request address of Serial
Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specifi ed.

The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are COM and SOL.



Serial Port Console Redirection

COM 1

Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for confi guration:



Console Redirection Settings (for COM 1)

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

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Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

COM2/SOL (Serial-Over-LAN)

Console Redirection (for SOL/COM2)

Select Enabled to use the SOL port for Console Redirection. The options are Enabled and
Disabled.

*If the item above set to Enabled, the following items will become available for user's
confi guration:

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

Console Redirection Settings (for COM2/SOL)

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

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VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.



Legacy Console Redirection Settings

Legacy Console Redirection Settings

Use this feature to select the COM port to display redirection of Legacy OS and Legacy
OPROM messages. The options are COM1 and COM2/SOL.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for Legacy OS support. The options are 80x24 and 80x25.

Redirection After BIOS Post

Use this feature to enable or disable Legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, Legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, Legacy Console Redirection remains
enabled upon OS bootup. The options are Always Enable and Bootloader.

Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)

The feature allows the user to confi gure Console Redirection settings to support Out-of-
Band Serial Port management.

Console Redirection (for EMS)

Select Enabled to use a COM port specifi ed by the user for EMS Console Redirection. The
options are Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for user's
confi guration:

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Console Redirection Settings (for EMS)

Out-of-Band Management Port

This feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are

COM1 (Console Redirection) and COM2/SOL (Console Redirection).

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per Second

This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in both host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).

Flow Control

Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop data-sending when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None, Hardware RTS/CTS, and Software Xon/Xoff.

The setting for each these features is displayed:

Data Bits, Parity, Stop Bits

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

ACPI Settings

Use this feature to confi gure Advanced Confi guration and Power Interface (ACPI) power
management settings for your system.

NUMA (Available when the OS supports this feature)

Select Enabled to enable Non-Uniform Memory Access support to enhance system perfor­mance. The options are Enabled and Disabled.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Enabled and Disabled.



Trusted Computing (Available when a TPM device is installed

and detected by the BIOS)

When a TPM (Trusted-Platform Module) device is detected in your machine, the following
information will be displayed.

• TPM2.0 Device Found

• Firmware Version

• Vendor

Security Device Support

If this feature and the TPM jumper (JPT1) on the motherboard are both enabled, the onboard
security (TPM) device will be enabled in the BIOS to enhance data integrity and system
security. Please note that the OS will not show the security device. Neither TCG EFI protocol
nor INT1A interaction will be made available for use. If you have made changes on the setting
on this item, be sure to reboot the system for the change to take effect. The options are
Disable and Enable. If this option is set to Enable, the following screen and items will display:

• Active PCR Banks

• Available PCR Banks

SHA-1 PCR Bank

Select Enabled to enable SHA-1 PCR Bank support to enhance system security and data
integrity. The options are Enabled and Disabled.

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SHA256 PCR Bank

Select Enabled to enable SHA256 PCR Bank support to enhance system security and data
integrity. The options are Enabled and Disabled.

Pending Operation

Use this feature to schedule a TPM-related operation to be performed by a security (TPM)
device at the next system boot to enhance system data integrity. Your system will reboot to
carry out a pending TPM operation. The options are None and TPM Clear.

Note: Your system will reboot to carry out a pending TPM operation.

Platform Hierarchy (for TPM Version 2.0 and above)

Select Enabled for TPM Platform Hierarchy support which will allow the manufacturer to utilize
the cryptographic algorithm to defi ne a constant key or a fi xed set of keys to be used for initial
system boot. These early boot codes are shipped with the platform and are included in the
list of "public keys". During system boot, the platform fi rmware uses the trusted public keys
to verify a digital signature in an attempt to manage and control the security of the platform

fi rmware used in a host system via a TPM device. The options are Enabled and Disabled.

Storage Hierarchy

Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacy­sensitive operations by the platform owner such as an IT professional or the end user. Storage
Hierarchy has an owner policy and an authorization value, both of which can be set and are
held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed
independently of the other hierarchies. The options are Enabled and Disabled.

Endorsement Hierarchy

Select Enabled for Endorsement Hierarchy support, which contains separate controls to
address the user's privacy concerns because the primary keys in this hierarchy are certifi ed
by the TPM or a manufacturer to be constrained to an authentic TPM device that is attached
to an authentic platform. A primary key can be an encrypted, and a certifi cate can be created
using TPM2_ ActivateCredential. It allows the user to independently enable "fl ag, policy, and
authorization value" without involving other hierarchies. A user with privacy concerns can
disable the endorsement hierarchy while still using the storage hierarchy for TPM applications
and permitting the platform software to use the TPM. The options are Enabled and Disabled.

PH (Platform Hierarchy) Randomization (for TPM Version 2.0 and above)

Select Enabled for Platform Hierarchy Randomization support, which is used only during the
platform developmental stage. This feature cannot be enabled in the production platforms.
The options are Disabled and Enabled.

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TXT Support

Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are Disabled and Enabled.

Note 1: If the option for this item (TXT Support) is set to Enabled, be sure to disable
EV DFX (Device Function On-Hide) support for the system to work properly. (EV DFX

is under "IIO Confi guration" in the "Chipset/North Bridge" submenu).

Note 2: For more information on TPM, please refer to the TPM manual at http://www.
supermicro.com/manuals/other.

TLS Authenticate Confi guration

When this submenu is selected, the following items will be displayed:

Server CA Confi guration

This feature allows the user to confi gure the client certifi cate that is to be used by the server.

Enroll Certifi cation

This feature allows the user to enroll the certifi cate in the system.

Enroll Cert (Certifi cation) Using File

This feature allows the user to enroll the security certifi cate in the system by using a fi le.

Cert (Certifi cation) GUID (Global Unique Identifi er)

This feature displays the GUID for this system.

Commit Changes and Exit

Select this feature to keep the changes you have made and exit from the system.

Discard Changes and Exit

Select this feature to discard the changes you have made and exit from the system.

Delete Certifi cation

If this feature is set to Enable, the certifi cate enrolled in the system will be deleted. The
options are Enable and Disable.

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