The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all
claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on,
the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment to an outlet on a circuit different from that to which the receiver
is connected.
• Consult the authorized dealer or an experienced radio/TV technician for help.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to the
State of California to cause birth defects and other reproductive harm.
Manual Revision: 1.1a
Release Date: August 23, 2016
MMIO High Size ....................................................................................... 4-25
PCH SLOT1 PCI-E 2.0 x2 (in x8) OPROM, CPU SLOT2 PCI-E 3.0 x4 (in
x8) OPROM, CPU SLOT3 PCI-E 3.0 x8 OPROM, CPU SLOT4 PCI-E 3.0
x8 OPROM, CPU SLOT5 PCI-E 3.0 x4 (in x8) OPROM, CPU SLOT6 PCI-E
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming
met alle nationale wetten en reglementen.
2-2 Static-Sensitive Devices
Electrostatic-Discharge (ESD) can damage electronic com ponents. To avoid dam-
aging your system board, it is important to handle it very carefully. The following
measures are generally sufcient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in
use.
• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
• Use only the correct type of onboard CMOS battery. Do not install the onboard
battery upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure that the person handling it is static protected.
2-4
Page 31
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
2-3 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas-
teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
Philips Screwdriver
(1)
Philips Screws (9)
Location of Mounting Holes
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
LE2
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
J23
1-2:ENABLE
JPB1:BMC
2-3:DISABLE
USB4/5
USB6/7
USB8/9
JI2C2
1
JPB1
I2C bus for PCI-E slot
OFF:DISABLE
ON: ENABLE
JIPMB1
JPME2
S-SATA0
COM2
JVRM1
JI2C1/JI2C2
BIOS
0N: POWER FORCE ON
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JBR1
JSD2
JSD1
I-SATA4
USB11(3.0)
Standoffs (9)
Only if Needed
LE1
UID
VGA
JUIDB1
LAN2
USB2/3
LAN1
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
DIMMA2
DIMMA1
DIMMB2
DIMMB1
CPU
1
LGA2011-3
1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
BIOS
LICENSE
BAR CODE
IPMI CODE
MAC CODE
JWD1
USB0/1
IPMI_LAN
DIMMD2
DIMMD1
FAN2
DIMMC2
DIMMC1
J24
COM1
FAN5
PWR I2C
JPI2C1
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN1
Caution: 1) To avoid damaging the motherboard and its components, please do
not use a force greater than 8 lb/inch on each mounting screw during motherboard
installation. 2) Some components are very close to the mounting holes. Please take
precautionary measures to avoid damaging these components when installing the
motherboard to the chassis.
2-5
Page 32
X10SRi-F User’s Manual
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. (See the previous page.)
3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other
motherboard components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or compo-
nents might look different from those shown in this manual.
2-6
Page 33
Chapter 2: Installation
2-4 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on
the label area.
Notes:
• Always connect the power cord last, and always remove it before adding, re-
moving or changing any hardware components. Make sure that you install the
processor into the CPU socket before you install the CPU heatsink.
• If you buy a CPU separately, make sure that you use an Intel-certied multi-
directional heatsink only.
• Make sure to install the motherboard into the chassis before you install the
CPU heatsink.
• When receiving a motherboard without a processor pre-installed, make sure that
the plastic CPU socket cap is in place and none of the socket pins are bent;
otherwise, contact your retailer immediately.
• Refer to the Supermicro website for updates on CPU support.
Installing the LGA2011 Processor
1. There are two load levers on the LGA2011 socket. To open the socket cover,
rst press and release the load lever labeled 'Open 1st'.
1
OPEN 1st
Press down
on
labeled 'Open 1st'.
2
OPEN 1st
Load Lever
2-7
Page 34
X10SRi-F User’s Manual
2. Press the second load lever labeled 'Close 1st' to release the load plate that
covers the CPU socket from its locking position.
Press down on
1
3. With the lever labeled 'Close 1st' fully retracted, gently push down on the
lever labelled 'Open 1st' to open the load plate. Lift the load plate to open it
completely.
Lever 'Close 1st'
OPEN 1st
1
OPEN 1st
Load
Gently push
down to pop the
load plate open.
Pull lever away from
2
the socket
2
OPEN 1st
2-8
Page 35
Chapter 2: Installation
4. Using your thumb and the index nger, remove the 'WARNING' plastic cap
from the socket.
WARNING!
5. Using your thumb and index nger, hold the CPU on its edges. Align the CPU
keys, which are semi-circle cutouts, against the socket keys.
Socket Keys
CPU Keys
6. Once they are aligned, carefully lower the CPU straight down into the socket.
(Do not drop the CPU on the socket. Do not move the CPU horizontally or
vertically. Do not rub the CPU against the surface or against any pins of the
socket to avoid damaging the CPU or the socket.)
Warning: You can only install the CPU
inside the socket in one direction. Make
sure that it is properly inserted into the
CPU socket before closing the load
plate. If it doesn't close properly, do not
force it as it may damage your CPU.
Instead, open the load plate again to
make sure that the CPU is aligned
properly.
2-9
Page 36
X10SRi-F User’s Manual
7. With the CPU inside the socket, inspect the four corners of the CPU to make
sure that the CPU is properly installed.
8. Close the load plate with the CPU inside the socket. Lock the lever labelled
'Close 1st' rst, then lock the lever labelled 'Open 1st' second. Using your
thumb gently push the load levers down to the lever locks.
Gently close
12
the load plate.
3
Lever Lock
OPEN 1st
Push down and
lock the lever
labelled 'Open
1st'.
Push down and lock the
lever labelled 'Close 1st'.
OPEN 1st
4
OPEN 1st
2-10
Lever Lock
Page 37
Chapter 2: Installation
Installing a Passive CPU Heatsink
1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-
quired amount has already been applied.
2. Place the heatsink on top of the CPU so that the four mounting holes are
aligned with those on the Motherboard's and the Heatsink Bracket under-
neath.
3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug
(-do not over-tighten the screws to avoid possible damage to the CPU.)
4. Finish the installation by fully tightening all four screws.
Screw#1
Motherboard
Note: For optimized airow, please follow your chassis airow direction
to install the correct CPU heatsink direction. Graphic drawings included
in this manual are for reference only. They might look different from the
components installed in your system
Screw#2
OPEN 1st
Mounting Holes
2-11
Page 38
X10SRi-F User’s Manual
Removing the Heatsink
Warning: We do not recommend that the CPU or the heatsink be removed. However,
if you do need to uninstall the heatsink, please follow the instructions below to prevent
damage to the CPU or the CPU socket.
1. Unscrew the heatsink screws from the motherboard in the sequence as
shown in the illustration below.
2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive
force when wriggling the heatsink!)
3. Once the heatsink is loosened, remove the heatsink from the CPU socket.
4. Remove the used thermal grease and clean the surface of the CPU and the
heatsink. Reapply the proper amount of thermal grease on the surface before
reinstalling the heatsink.
Loosen screws
in sequence as
shown.
Screw#4
Screw#1
Motherboard
Screw#2
Screw#3
2-12
Page 39
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
2-3:DISABLE
2-5 Installing DDR4 Memory
Note: Check the Supermicro website for recommended memory mod-
ules.
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage.
Chapter 2: Installation
DIMM Installation
1. Insert the desired number of DIMMs
into the memory slots, starting with
DIMMA1 (Channel A, Slot 1, see
the next page for the location). For
the system to work properly, please
use the memory modules of the
same type and speed in the same
motherboard.
COM2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
JP3
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JBR1
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
T-SGPIO3
T-SGPIO2
I-SATA1
I-SATA4
S-SATA0
LE1
UID
VGA
JUIDB1
LAN2
JPL1:LAN1/2
1-2:ENABLE
LEDM1
CPU SLOT4 PCI-E 3.0 X8
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
X10SRi-F
1.01REV:
DESIGNED IN USA
JL1
JOH1
USB11(3.0)
USB10(3.0)
LE2
2-3:DISABLE
DIMMA2
DIMMA1
DIMMB2
DIMMB1
1
LGA2011-3
BAR CODE
PWR
ON
RST
PWR
FAIL
IPMI CODE
OH
BIOS
FF
NIC
2
JSTBY1
LICENSE
NIC
1
MAC CODE
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
COM1
FAN5
USB2/3
USB0/1
LAN1
IPMI_LAN
(3.0)
JPL1
DIMMC2
DIMMD2
DIMMC1
DIMMD1
CPU
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
JWD1
FAN2
FAN1
2. Push the release tabs outwards on
both ends of the DIMM slot to unlock
it.
3. Align the key of the DIMM mod-
ule with the receptive point on the
memory slot.
Notches
4. Align the notches on both ends of
the module against the receptive
points on the ends of the slot.
5. Use two thumbs together to press
the notches on both ends of the
module straight down into the slot
Release Tabs
until the module snaps into place.
6. Press the release tabs to the lock
positions to secure the DIMM module
into the slot.
Press both notches
straight down into
the memory slot.
2-13
Page 40
X10SRi-F User’s Manual
Removing Memory Modules
Reverse the steps above to remove the DIMM modules from the motherboard.
Memory Support
DIMMB2
DIMMB1
DIMMA2
DIMMA1
1
1
The X10SRi-F supports up to 256GB of RDIMM and 512GB of LRDIMM DDR4
2400 MHz (max.) in eight memory slots. Populating these DIMM slots with a pair of
memory modules of the same type and size will result in interleaved memory, which
will improve memory performance. Please refer to the table on the next page:
Notes:
DIMMD2
DIMMD1
DIMMC2
DIMMC1
Edge of the motherboard
• Be sure to use memory modules of the same type and speed on the same
motherboard. Mixing of memory modules of dif ferent types and speeds is
not allowed.
• Due to memory allocation to system devices, the amount of memory that
remains available for operational use will be reduced when 4 GB of RAM
is used. The reduction in memory availability is disproportional. See the
tables on the next page for details.
2-14
Page 41
Ranks Per
and
DIMM Capacity
Speed (MT/s); Voltage
(DPC)
1 Slot Per
LRDIMM
3DS
Ranks Per
and
Speed (MT/s); Voltage (V);
Channel (DPC)
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Firmware Hub ash memory (System BIOS)1 MB3.99
Local APIC4 KB3.99
Area Reserved for the chipset2 MB3.99
I/O APIC (4 Kbytes)4 KB3.99
PCI Enumeration Area 1256 MB3.76
PCI Express (256 MB)256 MB3.51
PCI Enumeration Area 2 (if needed) -Aligned on 256-MB
boundary-
512 MB3.01
VGA Memory16 MB2.85
TSEG1 MB2.84
Memory available to OS and other applications 2.84
Populating RDIMM/LRDIMM DDR4 Memory Modules for the E52600v3-based Motherboard
(V);
Slot Per Channel (SPC)
(GB)
and DIMM Per Channel
2 Slots Per Channel
Channel
1DPC 1DPC 2DPC
1.2V 1.2V 1.2V
2133 2133 1866
2133 2133 1866
2133 2133 1866
2133 2133 1866
2133 2133 2133
2133 2133 2133
DIMM
Type
Data
Width
4Gb 8Gb
RDIMM SRx4 8GB 16GB
RDIMM SRx8 4GB 8GB
RDIMM DRx8 8GB 16GB
RDIMM DRx4 16GB 32GB
LRDIMM QRx4 32GB 64GB
8Rx4 64GB 128GB
†
Populating RDIMM/LRDIMM DDR4 Memory Modules for the E52600v4-based Motherboard
DIMM Capacity
DIMM
Type
Data
Width
4Gb 8Gb
RDIMM SRx4 8GB 16GB
RDIMM SRx8 4GB 8GB
RDIMM DRx8 8GB 16GB
RDIMM DRx4 16GB 32GB
LRDIMM QRx4 32GB 64GB
LRDIMM
8Rx4 64GB 128G B
3DS
Slot Per Channel (SPC) and DIMM Per
1 Slot Per
(GB)
Channel
1DPC1DPC2DPC
1.2V1.2V1.2V
240024002133
240024002133
240024002133
240024002133
240024002400
240024002400
2 Slots Per Channel
2-15
Chapter 2: Installation
Remaining (-Available)
(4 GB Total System
Memory)
Page 42
X10SRi-F User’s Manual
F
2-6 Connectors/IO Ports
The I/O ports are color coded in conformance with the industry standards. See the
gure below for the colors and locations of the various I/O ports.
Backplane I/O Panel
JVRM2
JI2C1
JPG1
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
USB4/5
USB6/7
USB8/9
JTPM1
:TPM/PRO80
OFF:DISABLE
S-SATA0
FANA
COM2
JVRM1
JI2C2
1
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
ON: ENABLE
BIOS
JIPMB1
JPME2
0N: POWER FORCE ON
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JBR1
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
I-SATA3
I-SATA2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
I-SATA0
T-SGPIO1
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
D
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
LE1
UID
VGA
JUIDB1
LAN2
USB2/3
LAN1
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
USB0/1
IPMI_LAN
COM1
FAN5
JPL1
DIMMC2
DIMMD2
DIMMC1
DIMMA2
DIMMA1
DIMMB2
DIMMB1
DIMMD1
CPU
1
LGA2011-3
1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
FAN4
FAN3
BIOS
LICENSE
BAR CODE
IPMI CODE
MAC CODE
JWD1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
A
E
C
G
H
I
J
B
Backplane I/O Panel
A. COM1F. USB Port 3 (3.0)
B. USB Port 0 (2.0)G. LAN1
C. USB Port 1 (2.0)H. LAN2
D. IPMI_LANI. VGA Port
E. USB Port 2 (3.0)J. UID Switch
2-16
Page 43
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
F
Universal Serial Bus (USB)
Two USB 2.0 ports (0/1) and two USB 3.0 ports (2/3) are located on the I/O back
panel. In addition, three USB 2.0 headers (USB 4/5, 6/7, 8/9), and two USB 3.0
connectors (USB 10, USB 11) are also located on the motherboard to provide USB
3.0 support using USB cables (not included). USB 11 is a Type A connector. See
the tables below for pin denitions.
Back Panel USB (2.0) #0/1
Pin Denitions
Pin# Denition Pin# Denition
1+5V5+5V
2USB_PN16USB_PN0
3USB_PP17USB_PP0
4Ground8Ground
USB (3.0) (Front) USB#11
Pin Denitions
Pin# Pin# Signal Name Description
110VBUSPower
211D-USB 2.0 Differential Pair
312D+
413GroundGround of PWR Return
514StdA_SSRX- SuperSpeed Receiver
615StdA_SSRX+ Differential Pair
716GND_DRAIN Ground for Signal Return
817StdA_SSTX- SuperSpeed Transmitter
918StdA_SSTX+ Differential Pair
Front Panel USB (2.0) #4/5, 6/7, 8/9
Pin Denitions
Pin# DenitionPin# Denition
1+5V2+5V
3USB_PN24USB_PN3
5USB_PP26USB_PP3
7Ground8Ground
9Key10Ground
A. Backpanel USB 2.0 #0/1
B. Backpanel USB 3.0 #2/3
C. Front Panel USB 2.0 #4/5
D. Front Panel USB 2.0 #6/7
E. Front Panel USB 2.0 #8/9
F. Front Panel USB 3.0 #10
G. Front Panel USB 3.0 #11
A
B
LE1
UID
VGA
JUIDB1
JP3
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
I-SATA4
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
BT1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
C
USB4/5
USB6/7
D
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
E
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
S-SATA0
DIMMA1
DIMMA2
DIMMB1
BIOS
LICENSE
DIMMB2
LAN1
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
COM1
USB2/3
(3.0)
JWD1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
G
2-17
Page 44
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
Ethernet Ports
Two Gigabit Ethernet ports (LAN1/LAN2)
and an IPMI_LAN port are located on
the I/O Backpanel to provide network
connections. These ports accept RJ45
type cables.
Note: Please refer to the LED
Indicator Section for LAN LED
information.
Serial Ports (COM1/COM2)
Serial port COM1 is located next to USB
0/1 on the I/O backplane. Another Serial
port header (COM2) is located next to
the PCI-E Slot 1. See the table on the
right for pin denitions.
LAN Ports
Pin Denition
Pin# Denition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED
5TD1-14Link 1000 LED
(Green, +3V3SB)
(Yellow, +3V3SB)
6TD2+15Ground
7TD2-16Ground
8TD3+17Ground
9TD3-88Ground
(NC: No Connection)
Serial Ports
Pin Denitions
Pin# DenitionPin# Denition
1DCD6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10N/A
D
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
C
A
FAN5
A. LAN1
B. LAN2
C. IPIMI_LAN
D. COM1
USB0/1
IPMI_LAN
DIMMD2
DIMMD1
DIMMC2
COM1
DIMMC1
USB2/3
LAN1
(3.0)
JPL1
E. COM2
CPU
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
JWD1
2-3:NMI
FAN2
FAN1
B
LE1
UID
VGA
CPU SLOT6 PCI-E 3.0 X16
USB11(3.0)
LE2
JUIDB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
HDD
PWR
LED
X
NMI
JF1
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
DIMMA2
DIMMA1
DIMMB2
DIMMB1
1
BIOS
LICENSE
JD1:
SPEAKER4-7:
PWR LED1-3:
JD1
F
F
E
JP3
1-2:Normal
JBR1
JBR1
JSD2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
BT1
JOH1
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
1-2:ENABLE
2-3:DISABLE
JPG1:VGA
J23
OFF:DISABLE
1-2:ENABLE
JPB1:BMC
2-3:DISABLE
USB4/5
USB6/7
USB8/9
S-SATA0
1
JIPMB1
JPME2
COM2
JVRM1
JI2C2
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
ON: ENABLE
BIOS
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
I-SATA5
JPME2
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
2-18
Page 45
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
Unit Identier Switch/UID LED Indicator
A Unit Identier (UID) switch and an LED
Indicator are located on the motherboard.
The UID switch is located next to the VGA
port on the backplane. The UID LED (LE4)
is located next to the UID switch. When you
press the UID switch, the UID LED will be
turned on. Press the UID switch again to
turn off the LED indicator. The UID Indicator
provides easy identication of a system unit
that may be in need of service.
Note: UID can also be triggered
via IPMI on the motherboard. For
more information on IPMI, please
refer to the IPMI User's Guide
posted on our website @ http://
www.supermicro.com.
VGA Port
The onboard VGA port is located next to
LAN Ports 1/2 on the I/O backpanel. Use
the connection for VGA display.
UID Switch
Pin# Denition
1Ground
2Ground
3Button In
4Ground
UID LED
Status
Color/State Status
Blue: On Unit Identied
A. VGA
B. UID Switch
C. UID LED
A
B
C
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
1-2:Normal
JBR1
JBR1
JSD2
LEDM1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
X10SRi-F
1.01REV:
DESIGNED IN USA
JSTBY1
JL1
JOH1
T-SGPIO3
T-SGPIO2
I-SATA1
USB10(3.0)
USB11(3.0)
JF1
LE2
DIMMA2
DIMMA1
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
LICENSE
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-19
Page 46
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
1
2
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located
on a control panel at the front of the chassis. These connectors are designed spe-
cically for use with Supermicro chassis. See the gure below for the descriptions
of the front control panel buttons and LED indicators. Refer to the following section
for descriptions and pin denitions.
JVRM2
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
:TPM/PRO80
1-2:ENABLE
JPB1:BMC
USB4/5
USB6/7
USB8/9
1
JPB1
OFF:DISABLE
ON: ENABLE
JIPMB1
JPME2
S-SATA0
JI2C2
I2C bus for PCI-E slot
COM2
JVRM1
JI2C1/JI2C2
BIOS
0N: POWER FORCE ON
2-3:ME MANUFACTURUNG MODE
S-SATA3
S-SATA2
S-SATA1
JPME2
1-2:Normal
PCH SLOT2 PCI-E 2.0 X4(IN X8)
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA1
I-SATA4
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
LE1
UID
VGA
JUIDB1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
BIOS
LICENSE
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
JF1 Header Pins
PowerButton
PWR
Reset
ResetButton
P3V3
UID LED
P3V3_STB
P3V3_STB
UID SW
P3V3
X
NMI
Ground
Ground
PWR Fail LED
OH/Fan Fail LED
NIC2 LED
NIC1 LED
HDDLED
PowerLED
X
Ground
1920
2-20
Page 47
1
2
Front Control Panel Pin Denitions
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin denitions.
Chapter 2: Installation
NMI Button
Pin Denitions (JF1)
Pin# Denition
19Control
20Ground
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
LE1
UID
VGA
1.01REV:
BT1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
LE2
USB11(3.0)
JUIDB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
FAN4
FAN3
0N: POWER FORCE ON
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA4
I-SATA3
I-SATA2
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
I-SATA0
T-SGPIO1
CPU SLOT3 PCI-E 3.0 X8
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
DESIGNED IN USA
COM2
JVRM1
JVRM2
JI2C2
JI2C1
1
JPB1
JPG1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
BIOS
USB4/5
USB6/7
USB8/9
JTPM1
JIPMB1
:TPM/PRO80
JPME2
S-SATA0
FANA
USB2/3
USB0/1
LAN1
LAN2
IPMI_LAN
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
DIMMA2
DIMMA1
DIMMB1
BIOS
LICENSE
DIMMD2
DIMMB2
CPU
1
LGA2011-3
1
BAR CODE
IPMI CODE
MAC CODE
JWD1
Power LED
Pin Denitions (JF1)
Pin# Denition
153.3V
16PWR LED
A. NMI
B. PWR LED
COM1
FAN5
DIMMC2
DIMMC1
DIMMD1
PWR
Reset
PowerButton
ResetButton
P3V3
UID LED
P3V3_STB
P3V3_STB
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
UID SW
P3V3
X
NMI
A
1920
Ground
Ground
PWR Fail LED
OH/Fan Fail LED
NIC2 LED
NIC1 LED
HDDLED
PowerLED
X
Ground
B
2-21
Page 48
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
1
2
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
denitions.
NIC1/NIC2 LEDs
The NIC (Network Interface Control-
ler) LED connection for GLAN Port 1
is located on pins 11 and 12 of JF1,
and the LED connection for GLAN
Port 2 is on pins 9 and 10. Attach the
NIC LED cables to the LED indicators
mentioned above to display network
activity. Refer to the layout below for
the locations of NIC LED indicators.
HDD LED
Pin Denitions (JF1)
Pin# Denition
133.3V SB/UID_SW
14HD Active
GLAN1/2 LED
Pin Denitions (JF1)
Pin# Denition
9Vcc
10NIC 2 Link/Acitivty
LED
11Vcc
12NIC 1 Link/Acitivty
LED
A. HDD LED
B. NIC1 LED
C. NIC2 LED
LE1
UID
VGA
1.01REV:
BT1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
JUIDB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
HDD
PWR
LED
SPEAKER4-7:
X
NMI
JF1
0N: POWER FORCE ON
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA4
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
DESIGNED IN USA
COM2
JVRM1
JI2C2
1
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
BIOS
USB4/5
USB6/7
USB8/9
JIPMB1
JPME2
S-SATA0
LAN1
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
DIMMA2
DIMMA1
DIMMB2
DIMMB1
1
LGA2011-3
BAR CODE
IPMI CODE
BIOS
LICENSE
MAC CODE
JD1:
PWR LED1-3:
JD1
F
F
COM1
FAN5
USB2/3
USB0/1
IPMI_LAN
(3.0)
JPL1
DIMMC2
DIMMD2
DIMMC1
DIMMD1
CPU
PWR
Reset
PowerButton
ResetButton
P3V3
UID LED
1
P3V3_STB
P3V3_STB
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
JWD1
FAN2
FAN1
UID SW
P3V3
X
NMI
Ground
Ground
PWR Fail LED
OH/Fan Fail LED
NIC2 LED
NIC1 LED
HDDLED
PowerLED
X
Ground
C
B
A
1920
2-22
Page 49
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
1
2
Overheat (OH)/Fan Fail/PWR Fail/
UID LED
Connect an LED cable to pins 7 and
8 of Front Control Panel to use the
Overheat, Fan Fail, and Power Fail
connections. Refer to the table on the
right for pin denitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
denitions.
OH/Fan Fail/ PWR Fail/Blue_UID LED
Pin Denitions (JF1)
Pin# Denition
7Vcc
8Red_LED-Cathode/OH/Fan Fail/
Power Fail
OH/Fan Fail/PWR Fail
LED Status (Red LED)
State Denition
OffNormal
OnOverheat
Flashing
1 Hz
Flashing
1/4 Hz
Fan Fail
Redundant
Power
Supply Fail
PWR Fail LED
Pin Denitions (JF1)
Pin# Denition
53.3V
6PWR LED Status
A.OH/Fan Fail/PWR Fail/UID LED
B. PWR Fail LED
1920
Ground
Ground
PWR Fail LED
OH/Fan Fail LED
NIC2 LED
NIC1 LED
HDDLED
PowerLED
X
Ground
B
A
PowerButton
PWR
LE1
UID
VGA
JUIDB1
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
DIMMA2
DIMMA1
DIMMB2
DIMMB1
1
LGA2011-3
BAR CODE
PWR
ON
RST
PWR
FAIL
IPMI CODE
OH
BIOS
FF
NIC
2
JSTBY1
LICENSE
NIC
1
MAC CODE
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
0N: POWER FORCE ON
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA4
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
LEDM1
USB10(3.0)
X10SRi-F
DESIGNED IN USA
CPU SLOT4 PCI-E 3.0 X8
1.01REV:
BT1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
COM2
JVRM1
JI2C2
1
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
BIOS
USB4/5
USB6/7
USB8/9
JIPMB1
JPME2
S-SATA0
COM1
Reset
FAN5
USB2/3
USB0/1
LAN1
IPMI_LAN
(3.0)
JPL1
DIMMC2
DIMMD2
DIMMC1
DIMMD1
ResetButton
P3V3
UID LED
CPU
P3V3_STB
P3V3_STB
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
JWD1
FAN2
FAN1
UID SW
P3V3
X
NMI
2-23
Page 50
X10SRi-F User’s Manual
1
2
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
2-3:DISABLE
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin denitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - See Chapter
4). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table on
the right for pin denitions.
Reset Button
Pin Denitions (JF1)
Pin# Denition
3Reset
4Ground
Power Button
Pin Denitions (JF1)
Pin# Denition
1Signal
2Ground
A. Reset Button
B. PWR Button
B
PowerButton
LE1
UID
VGA
BT1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
JUIDB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
0N: POWER FORCE ON
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA4
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
USB10(3.0)
COM2
JVRM1
JI2C2
1
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
J23
BIOS
USB4/5
USB6/7
USB8/9
JIPMB1
JPME2
S-SATA0
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
DIMMA2
DIMMA1
DIMMB2
DIMMB1
CPU
1
LGA2011-3
1
BAR CODE
IPMI CODE
BIOS
LICENSE
MAC CODE
JWD1
PWR
COM1
FAN5
USB0/1
Reset
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
ResetButton
A
P3V3
UID LED
P3V3_STB
P3V3_STB
UID SW
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
P3V3
X
NMI
Ground
Ground
PWR Fail LED
OH/Fan Fail LED
NIC2 LED
NIC1 LED
HDDLED
PowerLED
X
Ground
1920
2-24
Page 51
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN3
FANA
I-SATA2
:TPM/PRO80
2-7 Connecting Cables
This section provides brief descriptions and pin-out denitions for onboard headers
and connectors. Be sure to use the correct cable for each header or connector.
For information on Backpanel USB and Front Panel USB ports, refer to page 2-17.
ATX Main PWR & CPU PWR
Connectors (J24 & JPWR1)
The 24-pin main power connector
(J24) is used to provide power to the
motherboard. The 8-pin CPU PWR
connector (JPWR1) is also required
for the processor. These power
connectors meet the SSI EPS 12V
specication. See the table on the
right for pin denitions.
24-Pin Main PWR
LE1
UID
VGA
JUIDB1
JP3
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
I-SATA0
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
BT1
JL1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB2
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
JSTBY1
JF1
LICENSE
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
FAN4
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
I-SATA3
ATX Power 24-pin Connector
Pin Denitions (JPW1)
Pin# Denition Pin # Denition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
12V 8-pin Power Connec-
tor Pin Denitions
Pin# Denition
1 through 4Ground
5 through 8+12V
(Required)
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
IPMI_LAN
(3.0)
JPL1
DIMMC2
DIMMD2
DIMMC1
DIMMD1
CPU
1
A
J24
JWD1
FAN2
FAN1
COM1
USB2/3
USB0/1
LAN1
A. 24-Pin ATX Main PWR
FAN5
B. 8-Pin PWR
PWR I2C
JPI2C1
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
B
2-25
Page 52
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
AN3
FANA
I-SATA2
F
Fan Headers (Fan 1-Fan 5 & Fan A )
The X10SRi-F has six fan headers (Fan 1-Fan
5 & Fan A). These fans are 4-pin fan headers.
Although pins 1-3 of the onboard fan headers
are backward compatible with the traditional
3-pin fans, we recommend that you use 4-pin
fans to take advantage of the fan speed control
via IPMI interface. This allows the fan speeds
to be automatically adjusted based on the moth-
erboard temperature. Refer to the table on the
right for pin denitions.
Chassis Intrusion (JL1)
A Chassis Intrusion header is located at JL1 on
the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intru-
sion when the chassis is opened.
Fan Header
Pin Denitions
Pin# Denition
1Ground (Black)
22.5A/+12V
(Red)
3Tachometer
4PWM_Control
Chassis Intrusion
Pin Denitions (JL1)
Pin# Denition
1Intrusion Input
2Ground
A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan 5
F. Fan A
G. Chassis Intrusion
LE1
UID
VGA
JUIDB1
1-2:Normal
2-3:BIOS recovery
JBR1
JSD2
I-SATA4
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
I-SATA1
LEDM1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
X10SRi-F
1.01REV:
DESIGNED IN USA
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
G
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JL1
JOH1
T-SGPIO3
T-SGPIO2
USB10(3.0)
I-SATA0
USB11(3.0)
JD1
JF1
FAN4
LE2
F
C
D
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JVRM2
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
:TPM/PRO80
USB4/5
USB6/7
USB8/9
BIOS
JBT1
I-SATA5
JIPMB1
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
S-SATA0
I-SATA3
DIMMA1
DIMMA2
DIMMB1
BIOS
LICENSE
DIMMB2
LAN1
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
COM1
FAN5
DIMMC1
J24
FAN1
A
E
PWR I2C
JPI2C1
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
USB2/3
USB0/1
IPMI_LAN
(3.0)
DIMMC2
DIMMD2
DIMMD1
1
JWD1
FAN2
B
2-26
Page 53
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
Internal Buzzer (SP1)
The Internal Buzzer (SP1) is used to
provide audible indications for various
beep codes. See the table on the right
for pin denitions.
Speaker (JD1)
On the JD1 header, close pins 4~7
with a cap to use the onboard speaker.
Close pins 1~3 with a cap for the on-
board power LED. See the table on
the right for pin denitions.
Internal Buzzer
Pin Denition
Pin# Denitions
1Pos. (+) Beep In
2Neg. (-) Alarm
Speaker Connector
Pin Denitions
Speaker
Pin# Denition
1~3Power LED
4~7Speaker
A. Internal Buzzer
B. Onboard PWR LED
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
A
JP3
JBR1
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB2
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
JSTBY1
NIC
PWR
LED
NMI
JF1
LICENSE
1
JD1:
HDD
SPEAKER4-7:
PWR LED1-3:
X
B
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-27
Page 54
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
DOM PWR Connector (JSD1)
The Disk-On-Module (DOM) power
connectors, located at JSD1 and
JSD2, provide 5V power to a solid
state DOM storage device connected
to one of the SATA ports. See the table
on the right for pin denitions.
Standby Power
The Standby Power header is located
at JSTBY1 on the motherboard. See
the layout below for the location.
DOM PWR
Pin Denitions
Pin# Denition
15V
2Ground
3Ground
Standby Power
Pin Denitions
Pin# Denition
1+5V Standby
2Ground
3No Connection
A. JSD1/JSD2 DOM PWR
B. Standby PWR
JVRM2
1-2:ENABLE
2-3:DISABLE
1-2:ENABLE
JPB1:BMC
JPG1:VGA
2-3:DISABLE
J23
USB4/5
USB6/7
USB8/9
JI2C2
1
JPB1
OFF:DISABLE
ON: ENABLE
JIPMB1
JPME2
S-SATA0
JVRM1
I2C bus for PCI-E slot
BIOS
COM2
0N: POWER FORCE ON
JI2C1/JI2C2
S-SATA3
S-SATA2
S-SATA1
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JBR1
JSD2
JSD1
I-SATA4
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
A
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
B
JL1
USB11(3.0)
LE2
LE1
UID
VGA
JUIDB1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
BIOS
LICENSE
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-28
Page 55
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
T-SGPIO 1/2/3 Headers
Three Serial-Link General Purpose Input/
Output headers (T-SGPIO 1/2/3) are
located on the motherboard. T-SGPIO
1/2/3 support onboard SATA interface.
See the table on the right for pin deni-
tions.
Power SMB (I2C) Connector
Power System Management Bus (I2C)
Connector (JPI2C1) monitors power sup-
ply, fan and system temperatures. See
the table on the right for pin denitions.
T-SGPIO/6-SGPIO
Pin Denitions
Pin# Denition Pin# Denition
2NC1NC
4Data3Ground
6Ground5Load
8NC7Clock
Note: NC= No Connection
PWR SMB
Pin Denitions
Pin# Denition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
LE1
UID
VGA
JUIDB1
JP3
1-2:Normal
JBR1
JBR1
JSD2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
C
B
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
BT1
JL1
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
BIOS
LICENSE
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
JWD1
2-3:NMI
FAN2
FAN1
A. T-SGPIO 1
B. T-SGPIO 2
C. T-SGPIO 3
D. PWR SMB
D
A
2-29
Page 56
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
TPM Header/Port 80 Header
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin deni-
tions.
Overheat/Fan Fail
Connect an LED cable to JOH1 to provide
warnings for chassis overheat/fan failure.
Refer to the table on the right for pin
denitions.
TPM/Port 80 Header
Pin Denitions
Pin# DenitionPin# Denition
1LCLK2GND
3LFRAME#4<(KEY)>
5LRESET#6+5V (X)
7LAD 38LAD 2
9+3.3V10LAD1
11LAD012GND
13SMB_CLK414SMB_DAT4
15+3V_DUAL16SERIRQ
17GND18CLKRUN# (X)
19LPCPD#20LDRQ# (X)
OH/Fan Fail Indicator
Status
State Denition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
JBR1
JSD2
LEDM1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
X10SRi-F
1.01REV:
DESIGNED IN USA
B
JSTBY1
JL1
JOH1
T-SGPIO3
T-SGPIO2
I-SATA1
USB10(3.0)
USB11(3.0)
JF1
LE2
DIMMA2
DIMMA1
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JVRM2
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
A
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
BIOS
LICENSE
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
COM1
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
J24
JWD1
FAN2
FAN1
A. TPM/Port 80
FAN5
B. Overheat/Fan Fail
PWR I2C
JPI2C1
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
2-30
Page 57
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
2-8 Jumper Settings
Explanation of Jumpers
To modify the operation of the mother-
board, jumpers can be used to choose
between optional settings. Jumpers create
shorts between two pins to change the
function of the connector. Pin 1 is identied
with a square solder pad on the printed
circuit board.
Note: On two-pin jumpers,
"Closed" means the jumper is on,
and "Open" means the jumper is
off the pins.
Chapter 2: Installation
LAN1/LAN2 Enable/Disable
Jumper JPL1 enables or disables LAN
ports 1/2 on the motherboard. See the
table on the right for jumper settings. The
default setting is enabled.
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
JBR1
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
HDD
PWR
LED
SPEAKER4-7:
X
NMI
JF1
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
DIMMA2
DIMMA1
DIMMB2
DIMMB1
1
LGA2011-3
BIOS
LICENSE
JD1:
PWR LED1-3:
JD1
F
MAC CODE
F
BAR CODE
IPMI CODE
Jumper Settings
Pin# Denition
1-2Enabled (default)
2-3Disabled
A. JPL1: LAN1/LAN2 Enable
COM1
USB0/1
IPMI_LAN
DIMMD2
DIMMD1
DIMMC2
DIMMC1
FAN5
USB2/3
LAN1
(3.0)
JPL1
A
CPU
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
JWD1
2-3:NMI
FAN2
FAN1
GLAN Enable
2-31
Page 58
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
2-3:DISABLE
CMOS Clear (JBT1)
JBT1 is used to clear the saved system setup conguration stored in the CMOS
chip. To clear the contents of the CMOS, completely shut down the system, remove
the AC power cord and then short JBT1 with a jumper. Remove the jumper before
powering on the system again. This will erase all user settings and revert everything
to their factory-set defaults.
PCI-E Slot SMB Enable (JI2C1/JI2C2)
Use Jumpers JI2C1/JI2C2 to enable
PCI-E SMB (System Management Bus)
support to improve system management
for the PCI-E slots. See the table on the
right for jumper settings.
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
A
JP3
JBR1
JBR1
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
JOH1
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
JL1
CPU SLOT6 PCI-E 3.0 X16
USB11(3.0)
LE2
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
B
C
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
DIMMA1
DIMMA2
DIMMB1
BIOS
LICENSE
DIMMB2
PCI-E Slot_SMB Enable
Jumper Settings
Pin# Denition
1-2Enabled
2-3Disabled (Default)
JPI2C1
A. Clear CMOS
2
B. JI
C1
2
C. JI
C2
COM1
USB0/1
IPMI_LAN
DIMMD2
DIMMD1
FAN2
DIMMC2
DIMMC1
J24
FAN1
FAN5
PWR I2C
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
1
BAR CODE
IPMI CODE
MAC CODE
JWD1
2-32
Page 59
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
Manufacturer Mode Select
Close this jumper (JPME2) to bypass
SPI ash security and force the system
to use the Manufacturer mode which
will allow the user to ash the system
rmware from a host server to modify
system settings. See the table on the
right for jumper settings.
VRM SMB Clock/Data
The VRM SMB Clock/Data is used to
select where the voltage Regulator Mod-
ule's System Management Bus clock sig-
nal (JVRM1) or Data (JVRM2) is directed
to. Select between BMC or PCH.
ME Mode Select
Jumper Settings
Pin# Denition
1-2Normal (Default)
2-3Manufacture Mode
VRM SMB Clock/Data
Jumper Settings
Pin# Denition
1-2BMC (Normal)
2-3PCH
A. JPME2
B. JVRM1
C. JVRM2
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
I-SATA1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB2
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
JSTBY1
JF1
LICENSE
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JVRM2
B
C
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
:TPM/PRO80
USB4/5
USB6/7
USB8/9
JIPMB1
S-SATA0
BIOS
JBT1
I-SATA5
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
A
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-33
Page 60
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
VGA Enable
Jumper JPG1 allows the user to enable
the onboard VGA connector. The default
setting is 1-2 to enable the connection.
See the table on the right for jumper
settings.
BIOS Recovery Enable
Close pins 2 and 3 of jumper JBR1 for
BIOS recovery. The default setting is on
pins 1 and 2 for normal operation. See
the table on the right for jumper settings.
VGA Enable
Jumper Settings
Pin# Denition
1-2Enabled (Default)
2-3Disabled
BIOS Recovery
Jumper Settings
Pin# Denition
1-2Normal
2-3BIOS Recovery
A. VGA Enable
B. BIOS Recovery
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
B
JBR1
I-SATA1
LEDM1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
JOH1
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
JL1
CPU SLOT6 PCI-E 3.0 X16
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB2
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
JSTBY1
NIC
HDD
PWR
LED
NMI
JF1
BIOS
2
LICENSE
1
JD1:
SPEAKER4-7:
PWR LED1-3:
X
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
A
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
LAN2
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
USB2/3
LAN1
(3.0)
JPL1
CPU
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-34
Page 61
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system moni-
tor that can reboot the system when a
software application hangs. Close pins
1-2 to reset the system if an applica-
tion hangs. Close pins 2-3 to generate a
non-maskable interrupt signal for the ap-
plication that hangs. See the table on the
right for jumper settings. Watch Dog must
also be enabled in the BIOS.
BMC Enable
Jumper JPB1 allows you to enable the
embedded WPCM 450 BMC (Baseboard
Management) Controller to provide IPMI
2.0/KVM support. See the table on the
right for jumper settings.
Watch Dog
Jumper Settings
Pin# Denition
1-2Reset (Default)
2-3NMI
OpenDisabled
BIOS Reset Select
Jumper Settings
Pin# Denition
1-2BIOS Reset
2-3Normal (Default)
A. Watch Dog Enable
b. BMC Enable
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
I-SATA1
LEDM1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
X10SRi-F
1.01REV:
DESIGNED IN USA
JOH1
CPU SLOT5 PCI-E 3.0 X4(IN X8)
BT1
JL1
CPU SLOT6 PCI-E 3.0 X16
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
JSTBY1
NIC
HDD
PWR
LED
NMI
JF1
LICENSE
1
JD1:
SPEAKER4-7:
PWR LED1-3:
X
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
B
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
1
BAR CODE
IPMI CODE
MAC CODE
JWD1
USB0/1
IPMI_LAN
DIMMD2
DIMMC2
DIMMD1
FAN2
DIMMC1
J24
FAN1
COM1
FAN5
PWR I2C
JPI2C1
JPWR1
1-2:RST
JWD1:Watch Dog
2-3:NMI
A
2-35
Page 62
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
LAN 1/LAN 2
2-9 Onboard Indicators
LAN 1/LAN 2 LEDs
Two LAN ports (LAN 1/LAN 2) are located
on the I/O backplane of the motherboard.
Each Ethernet LAN port has two LEDs.
The yellow LED indicates activity, while the
Link LED may be green, amber, or off to
indicate the speed of the connections. See
the tables on the right for more information.
IPMI Dedicated LAN LEDs
In addition to the Gigabit Ethernet ports,
an IPMI Dedicated LAN is also located
above the Backplane USB ports 2/3 on the
motherboard. The yellow LED on the right
indicates activity, while the green/amber
LED on the left indicates the speed of the
connection. See the table on the right for
more information.
LAN1/LAN2
Link LED
GLAN 1/2 Activity Indicator
LED Settings
Color Status Denition
YellowFlashingActive
GLAN Ports 1/2 Link Indicator
LED Settings
LED Color Denition
OffNo Connection/10 Mbps/
Green100 Mbps
Amber1 Gbps
IPMI LAN
Link LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color/State Denition
Link (Left)Amber: Solid1 Gbps
Green: Solid100 Mbps
Activity (Right) Yellow: Blinking Active
Activity LED
Activity LED
A. LAN 1/2 LEDs
B. IPMI_LAN LED
A
B
LE1
UID
VGA
JUIDB1
JP3
1-2:Normal
JBR1
JBR1
JSD2
CPU SLOT3 PCI-E 3.0 X8
PCH SLOT2 PCI-E 2.0 X4(IN X8)
T-SGPIO3
T-SGPIO2
I-SATA1
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
2-3:BIOS recovery
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
BIOS
LICENSE
DIMMB2
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
JWD1
2-3:NMI
FAN2
FAN1
2-36
Page 63
Chapter 2: Installation
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
Onboard Power LED (LE2)
An Onboard Power LED is located
at LE2 on the motherboard. When
LE2 is on, the AC power cable is
connected. Make sure to disconnect
the power cable before removing or
installing any component. See the
layout below for the LED location.
BMC Heartbeat LED
A BMC Hear tbeat LED is located at
LEDM1 on the X10SRi-F. See the table
on the right for more information.
Onboard PWR LED Indicator
LED Status
Status Denition
OffSystem Off
OnSystem on, or
System off and PWR
Cable Connected
BMC Heartbeat LED
Status
Color/State Denition
Green:
Blinking
BMC: Normal
A. PWR LED
B. BMC Heartbeat LED
2-3:DISABLE
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
J23
1-2:ENABLE
OFF:DISABLE
JPB1:BMC
USB4/5
USB6/7
USB8/9
1
JIPMB1
S-SATA0
JI2C2
JPB1
ON: ENABLE
JPME2
COM2
JVRM1
I2C bus for PCI-E slot
BIOS
0N: POWER FORCE ON
JI2C1/JI2C2
JPME2
2-3:ME MANUFACTURUNG MODE
1-2:Normal
S-SATA3
S-SATA2
S-SATA1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
PCH SLOT1 PCI-E 2.0 X2(IN X8)
SP1
JBT1
JP3
I-SATA5
1-2:Normal
2-3:BIOS recovery
JBR1
JBR1
JSD2
JSD1
I-SATA1
I-SATA4
LEDM1
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
USB10(3.0)
B
CPU SLOT4 PCI-E 3.0 X8
BT1
X10SRi-F
1.01REV:
DESIGNED IN USA
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
LE1
UID
VGA
JUIDB1
DIMMA2
DIMMA1
DIMMB2
DIMMB1
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
PWR
ON
RST
PWR
FAIL
OH
FF
NIC
2
JSTBY1
NIC
1
JD1:
HDD
PWR
LED
SPEAKER4-7:
PWR LED1-3:
X
NMI
JD1
JF1
F
BAR CODE
IPMI CODE
BIOS
LICENSE
MAC CODE
F
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
A
2-37
Page 64
X10SRi-F User’s Manual
JTPM1
T-SGPIO1
JPG1
JI2C1
JVRM2
AN4
AN3
FANA
I-SATA0
I-SATA2
I-SATA3
:TPM/PRO80
F
2-10 SATA Connections
SATA Connections
Ten SATA 3.0 connectors (I-SATA 0-5) and (S-
SATA 0-3) are located on the board. I-SATA 0-5
ports are supported by the AHCI controller and
are compatible with RAID 0, 1, 5, 10. S-SATA 0-3
ports are supported by the sSATA controller and
are compatible with RAID 0, 1, 5, 10. These Serial
Link connections provide faster data transmission
than legacy Parallel ATA. See the table on the
right for pin denitions.
SATA/SAS Connectors
Pin Denitions
Pin# Signal
1Ground
2SATA_TXP
3SATA_TXN
4Ground
5SATA_RXN
6SATA_RXP
7Ground
A. I-SATA 0
B. I-SATA 1
C. I-SATA 2
D. I-SATA 3
E. I-SATA 4
F. I-SATA 5
G. S-SATA 0
H. S-SATA 1
K
I. S-SATA 2
J. S-SATA 3
LE1
UID
VGA
JUIDB1
PCH SLOT2 PCI-E 2.0 X4(IN X8)
JP3
JBR1
B
I-SATA1
C
A
CPU SLOT3 PCI-E 3.0 X8
T-SGPIO3
T-SGPIO2
LEDM1
X10SRi-F
DESIGNED IN USA
USB10(3.0)
CPU SLOT4 PCI-E 3.0 X8
BT1
1.01REV:
JOH1
CPU SLOT6 PCI-E 3.0 X16
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JL1
USB11(3.0)
LE2
DIMMA2
DIMMA1
DIMMB2
DIMMB1
PWR
ON
RST
PWR
FAIL
OH
BIOS
FF
NIC
2
JSTBY1
NIC
HDD
PWR
LED
NMI
JF1
LICENSE
1
JD1:
SPEAKER4-7:
PWR LED1-3:
X
JD1
F
F
COM2
PCH SLOT1 PCI-E 2.0 X2(IN X8)
JVRM1
JI2C2
1
0N: POWER FORCE ON
JPB1
I2C bus for PCI-E slot
JI2C1/JI2C2
OFF:DISABLE
ON: ENABLE
1-2:ENABLE
JPB1:BMC
1-2:ENABLE
JPG1:VGA
2-3:DISABLE
2-3:DISABLE
J23
SP1
BIOS
USB4/5
USB6/7
USB8/9
JBT1
I-SATA5
JIPMB1
JPME2
1-2:Normal
2-3:BIOS recovery
JBR1
2-3:ME MANUFACTURUNG MODE
1-2:Normal
JPME2
J
I
H
G
JSD2
S-SATA3
JSD1
S-SATA2
S-SATA1
I-SATA4
S-SATA0
D
E
USB2/3
LAN1
LAN2
(3.0)
JPL1:LAN1/2
1-2:ENABLE
2-3:DISABLE
JPL1
CPU
1
LGA2011-3
BAR CODE
IPMI CODE
MAC CODE
JWD1
COM1
FAN5
USB0/1
IPMI_LAN
DIMMC2
DIMMD2
DIMMC1
DIMMD1
1
PWR I2C
JPI2C1
JPWR1
J24
1-2:RST
JWD1:Watch Dog
2-3:NMI
FAN2
FAN1
2-38
L
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Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Always disconnect the AC power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that the Standby PWR LED is not on. (Note: If it is on, the
onboard power is on. Be sure to unplug the power cable before installing or
removing the components.)
2. Make sure that there are no short circuits between the motherboard and
chassis.
3. Disconnect all ribbon/wire cables from the motherboard, including those for
the keyboard and mouse. Also, be sure to remove all add-on cards.
4. Install a CPU and heatsink (be sure that it is fully seated) and then connect
the chassis speaker and the power LED to the motherboard. Check all jumper
settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
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X10SRi-F User’s Manual
No Video
1. If the power is on, but you have no video--in this case, you will need to re-
move all the add-on cards and cables rst.
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A
for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the alarm is on,
check the specications of memory modules, reset the memory or try a differ-
ent one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully seated in
the slots.
2. You should be using ECC DDR4 2400 MHz (max.) memory recommended by
the manufacturer. Also, it is recommended that you use the memory modules
of the same type and speed for all DIMMs in the system. Do not use memory
modules of different sizes, different speeds and different types on the same
motherboard.
3. Check for bad DIMM modules or slots by swapping modules between slots to
see if you can locate the faulty ones.
4. Check the switch of 115V/230V power supply.
Losing the System’s Setup Conguration
1. Please be sure to use a high quality power supply. A poor quality power sup-
ply may cause the system to lose CMOS setup information. Refer to Section
1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem, contact your
vendor for repairs.
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Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have followed all
the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro
does not sell directly to end users, so it is best to rst check with your distributor or
reseller for troubleshooting services. They should know of any possible problem(s)
with the specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/support/faqs/) before contacting Technical Sup-
port.
2. BIOS upgrades can be downloaded from our website at (http://www.supermi-
cro.com/support/bios/).
Note: Not all BIOS can be ashed. Some cannot be ashed; it depends
on the boot block code of the BIOS.
3. If you've followed the instructions above to troubleshoot your system, and still
cannot resolve the problem, then contact Supermicro's technical support and
provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system rst boots up)
• System conguration
• An example of a Technical Support form is on our website at (http://www.su-
permicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can be
reached by e-mail at support@supermicro.com, by phone at: (408) 503-
8000, option 2, or by fax at (408)503-8019.
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X10SRi-F User’s Manual
3-3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X10SRi-F supports up to 256GB of RDIMM and 512Gb of LRDIMM
DDR4 2400 MHz (max.) in eight memory slots. See Section 2-5 for details on
installing memory.
Question: How do I update my BIOS?
Answer: We do NOT recommend that you upgrade your BIOS if you are not ex-
periencing any problems with your system. Updated BIOS les are located on our
website at http://www.supermicro.com/support/bios/. Please check our BIOS warn-
ing message and the information on how to update your BIOS on our web site.
Select your motherboard model and download the BIOS ROM le to your computer.
Also, check the current BIOS revision to make sure that it is newer than your BIOS
before downloading. You may choose the zip le. If you choose the zipped BIOS
le, please unzip the BIOS le onto a bootable device or a USB pen/thumb drive.
To ash the BIOS, run the batch le named "ash.bat" with the new BIOS ROM
le from your bootable device or USB pen/thumb drive. Use the following format:
F:\> ash.bat BIOS-ROM-lename.xxx <Enter>
Note: Alw ay s use the l e na med “ as h.bat ” to up date th e BIO S, an d in ser t
a space between "ash.bat" and the lename. The BIOS-ROM-lename
will bear the motherboard name (i.e., X10SRi-F) and build version as the
extension. For example, "X10SRi-F.115".
When the BIOS ashing screen is completed, power off the system to
reboot. Power on and at this point, you will need to load the BIOS de-
faults. Press <Del> to go to the BIOS setup screen, and select "Restore
Defaults" to load the default settings. Next, press <F4> to save and exit.
Then reboot the system.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!
Note: The SPI BIOS chip installed on this motherboard is not removable.
To repair or replace a damaged BIOS chip, please send your motherboard
to RMA at Supermicro for service.
Question: I think my BIOS is corrupted. How can I recover my BIOS?
Answer: Please see Appendix C - BIOS Recovery for detailed instructions.
Question: What is the heatsink part number for my X10SRi-F motherboard?
Answer: For the 1U passive heatsink, use SNK-P0047PS (back plate is included).
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Chapter 3: Troubleshooting
3-4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
OR
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X10SRi-F User’s Manual
3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required
before any warranty service will be rendered. You can obtain service by calling
your vendor for a Returned Merchandise Authorization (RMA) number. For faster
service, you may also obtain RMA authorizations online (http://www.supermicro.
com/RmaForm/). When you return the motherboard to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton, and
mailed prepaid or hand-carried. Shipping and handling charges will be applied for
all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover damages
incurred in shipping or from failure due to the alteration, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product prob-
lems.
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Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS setup utility for the X10SRi-F. The ROM BIOS
is stored in a Flash EEPROM and can be easily updated. This chapter describes
the basic navigation of the AMI BIOS setup utility screens.
Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery
Instructions in Appendix C.
Starting BIOS Setup Utility
To enter the AMI BIOS setup utility screens, press the <Delete> key while the
system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI BIOS
setup screen. There are a few cases when other keys are used, such as
<F1>, <F2>, etc.
Each main BIOS menu option is described in this manual. The AMI BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for a text message. When an option is selected in the
left frame, it is highlighted in white. Often a text message will accompany it.
Note: the AMI BIOS has default text messages built in. Supermicro retains
the option to include, omit, or change any of these text messages.
The AMI BIOS setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during the
setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow
keys, etc.
Note: Options printed in Bold are default settings.
How To Change the Conguration Data
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS setup utility. This setup utility can be accessed by pressing
<Del> at the appropriate time during system boot.
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X10SRi-F User’s Manual
How to Start the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS setup utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen, below the copyright message.
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall Supermicro be liable for direct, indirect, special, incidental, or consequential dam-
ages arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system while the BIOS is updating. This is to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS setup screen is shown below.
The following Main menu items will be displayed:
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Chapter 4: AMI BIOS
System Date/System Time
Use this option to change the system date and time. Highlight System Date or
System Time using the arrow keys. Enter new values using the keyboard. Press the
<Tab> key or the arrow keys to move between elds. The date must be entered in
Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears
as 17:30:00.
Supermicro X10SRI-F
BIOS Version: This item displays the version of the BIOS ROM used in the
system.
Build Date: This item displays the date when the version of the BIOS ROM
used in the system was built.
Memory Information
Total Memory: This item displays the total size of memory available in the
system.
Memory Speed: This item displays the default speed of the memory modules
installed in the system..
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X10SRi-F User’s Manual
4-3 Advanced Setup Congurations
Use the arrow keys to select Advanced setup and press <Enter> to access the
submenu items:
Warning: Take Caution when changing the Advanced settings. An incorrect value, a
very high DRAM frequency or an incorrect BIOS timing setting may cause the system
to malfunction. When this occurs, restore the setting to the manufacture default setting.
Boot Feature
Quiet Boot
Use this feature to select the screen between displaying POST messages or the
OEM logo at bootup. Select Disabled to display the POST messages. Select En-
abled to display the OEM logo instead of the normal POST messages. The options
are Enabled and Disabled.
AddOn ROM Display Mode
Use this item to set the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
Use this feature to set the Power-on state for the Numlock key. The options are
Off and On.
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Chapter 4: AMI BIOS
Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error
occurs. The options are Disabled and Enabled.
INT19 (Interrupt 19) Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Inter-
rupt 19 at bootup immediately and allow the drives that are attached to these host
adaptors to function as bootable disks. If this item is set to Postponed, the ROM
BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the
drives attached to these adaptors to function as bootable devices at bootup. The
options are Immediate and Postponed.
Re-try Boot
When EFI Boot is selected, the system BIOS will automatically reboot the system
from an EFI boot device after its initial boot failure. Select Legacy Boot, to allow
the BIOS to automatically reboot the system from a Legacy boot device after its
initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Power Conguration
DeepSx Power Policies
Use this item to congure the Advanced Conguration and Power Interface (ACPI)
settings for the system. Enable S3 to use Standby Mode (Suspend-to- RAM) and
maintain power supply to the system RAM when the system is in the sleep mode.
Enable S4 to use Hibernation mode (Suspend to Disk) so that all data stored in of
the main memory can be saved in a non-volatile memory area such as in a hard
drive and then power down the system. Enable S5 to power off the whole system
except the power supply unit (PSU) and keep the power button "alive" so that the
user can "wake-up" the system by using an USB keyboard or mouse. The options
are Disabled, Enabled in S5, Enabled in S4-S5, and Enabled in S3-S4-S5,
Watch Dog Function
Select Enabled to allow the Watch Dog timer to reboot the system when it is inac-
tive for more than 5 minutes. The options are Enabled and Disabled.
Power Button Function
This feature controls how the system shuts down when the power button is pressed.
Select 4 Seconds Override for the user to power off the system after pressing and
holding the power button for 4 seconds or longer. Select Instant Off to instantly
power off the system as soon as the user presses the power button. The options
are 4 Seconds Override and Instant Off.
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X10SRi-F User’s Manual
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last power state before a power loss. The options are Power-On,
Stay-Off and Last State.
CPU Conguration
Warning: Setting the wrong values in the following sections may cause the system
to malfunction.
CPU Conguration
The following CPU information will be displayed:
• Processor Socket
• Processor ID
• Processor Frequency
• Processor Max Ratio
• Processor Min Ratio
• Microcode Revision
• L1 Cache RAM
• L2 Cache RAM
• L3 Cache RAM
• CPU1 Version
Clock Spread Spectrum
Select Enable for Clock Spectrum support, which will allow the BIOS to monitor
and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. Select Disabled to enhance system stability. The
options are Disabled and Enabled.
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Chapter 4: AMI BIOS
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU perfor-
mance. The options are Enable and Disable.
Execute Disable Bit (Available if supported by the OS & the CPU)
Set to Enabled for Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and
where it cannot, thus preventing a worm or a virus from ooding illegal codes to over-
whelm the processor or damaging the system during a virus attack. The options are
Enable and Disable. (Refer to Intel and Microsoft websites for more information.)
PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in
the system. The options are Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If this item is set to Enable, the hardware prefetcher will prefetch streams of data
and instructions from the main memory to the Level 2 (L2) cache to improve CPU
performance. The options are Disable and Enable.
Adjacent Cache Line Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.
Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options
are Disable and Enable.
Note: If there is any change to this setting, you will need to power off and
reboot the system for the change to take effect. Please refer to Intel’s
web site for detailed information.
DCU Streamer Prefetcher (Available when supported by the CPU)
If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will
prefetch data streams from the cache memory to the DCU (Data Cache Unit) to
speed up data accessing and processing for CPU performance enhancement. The
options are Disable and Enable.
DCU IP Prefetcher
If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will
prefetch IP addresses to improve network connectivity and system performance.
The options are Enable and Disable.
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X10SRi-F User’s Manual
DCU (Data Cache Unit) Mode
Use this item to set the DCU data-prefecting mode. The options are 32KB 8Way
Without ECC and 16KB 4Way With ECC.
Direct Cache Access (DCA)
Select Enable to use Intel DCA (Direct Cache Access) Technology to maximize ef-
ciency in memory data transferring and accessing. The options are Auto, Enable
and Disable.
DCA Prefetch Delay
A DCA prefetcher is used with a TOE (TCP/IP Ofoad Engine) adapter to prefetch
data to shorten execution cycles and to maximize data processing efciency.
Prefetching data too frequently can saturate the cache directory and delay necessary cache access. This feature reduces or increases the frequency of system data
prefetching activities. The options are Disable, [8], [16], [32], [40], [48], [56], [64],
[72], [80], [88], [96], [104], and [112].
Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the
operating system. During the CPU C3 State, the CPU clock generator is turned
off. The options are Enable and Disable.
CPU C6 Report (Available when Power Technology is set to Custom)
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the
operating system. During the CPU C6 state, power to all caches is turned off.
The options are Enable and Disable.
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X10SRi-F User’s Manual
Enhanced Halt State (C1E)
Select Enabled to enable "Enhanced Halt State" support, which will signicantly
reduce the CPU's power consumption by minimizing CPU's clock cycles and
voltage use during a "Halt State." The options are Disable and Enable.
CPU T State Control
ACPI (Advanced Conguration Power Interface) T-States
If this item is set to Enable, CPU throttling will be supported by the operating
system to reduce power consumption. The options are Enable and Disable.
CPU Advanced PM Tuning
Energy Perf BIAS
Energy Performance Tuning
When enabled, this item selects whether the BIOS or Operating System can
turn on the energy performance bias tuning. The options are Enable and
Disable.
Energy Performance BIAS Setting
This feature allows balancing Power Efciency vs Performance. This will
override whatever setting is in the Operating System. The options are Per-
formance, Balanced Performance, Balanced Power, and Power.
Power/Performance Switch
This feature allows dynamic switching between Power and Performance
power efciency. The options are Enabled, and Disabled.
Workload Conguration
This feature allows for optimization of workload Balanced is recommended.
The options are Balanced and I/O Sensitive.
Averaging Time Window
This feature is used to control the effective window average for C0 and P0
times. Enter a numeric values using the keyboard.
P0 TotalTimeThreshold Low
The hardware switching mechanism will disable the performance setting when
the total P0 time is less than this threshold. Enter a numeric value.
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Chapter 4: AMI BIOS
P0 TotalTimeThreshold High
The hardware switching mechanism will disable the performance setting
when the total P0 time is greater than this threshold. Enter a numeric value.
Socket RAPL (Running Average Power Limit) Cong
FAST_RAPL_NSTRIKE_PL2_DUTY_CYCLE
This feature displays the value of the item above within the range between 25
(10%) and 64 (25%).
Turbo Power Limit Lock
Select Enable to set the power use limit for the machine when it is running in
the turbo mode. The options are Enable and Disable.
Long Power Limit Override
Select Enable to support long-term power limit override. If this feature is disabled,
BIOS will set the default value. The options are Enable and Disable.
Long Duration Power Limit
This item displays the power limit set by the user during which long duration
power is maintained. The default setting is 0.
Package Clamping Limit1
Use this item to set the limit on power performance states for the run-time proces-
sor, with P0 being the state with the highest frequency (clock speed) and power
(consumption), and P1, a step lower in performance than P0, with its frequency
and voltage scaled back a notch. The options are Between P1/P0 and Below P1.
Short Duration Power Limit Enable
Select Enable to support Short Duration Power Limit (Power Limit 2). The options
are Enable and Disable.
Short Duration Power Limit
This item displays the time period during which short duration power is main-
tained. The default setting is 0.
Package Clamping Limit2
Use this item to set the limit on power performance states for the processor
operating in turbo mode, with P0 being the state with the highest frequency
(clock speed) and power (consumption), and P1, a step lower in performance
than P0, with its frequency and voltage scaled back a notch. The options are
Between P1/P0 and Below P1.
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Chipset Conguration
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
IIO Conguration
EV DFX (Device Function On-Hide) Feature
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
IIO1 Conguration
CPU SLOT3 PCI-E 3.0 X8
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).
CPU SLOT6 PCI-E 3.0 X16
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).
CPU SLOT4 PCI-E 3.0 X8
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).
CPU SLOT5 PCI-E 3.0 X4
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied
by the user. The options are Gen 1 (2.5GT/s), Gen 2 (5 GT/s), and Gen 3 (8GT/s).
IOAT Conguration
Enable I/OAT
Select Enable to enable Intel I/OAT (I/O Acceleration Technology), which signi-
cantly reduces CPU overhead by leveraging CPU architectural improvements
and freeing the system resource for other tasks. The options are Enable and
Disable.
No Snoop
Select Enable to support no-snoop mode for each CB device. The options are
Disable and Enable.
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Chapter 4: AMI BIOS
Relaxed Ordering
Select Enable to enable Relaxed Ordering support which will allow certain trans-
actions to violate the strict-ordering rules of PCI and to be completed prior to
other transactions that have already been enqueued. The options are Disable
and Enable.
Intel VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d
support by reporting the I/O device assignments to the VMM (Virtual Machine
Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O
resource sharing across Intel platforms, providing greater reliability, security and
availability in networking and data-sharing. The options are Enable and Disable.
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance.
The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct
Memory Access) to enhance system performance. The options are Enable and
Disable.
Coherency Support (Isoch)
Select Enable for the Iscoh VT-d engine to pass through ATS to enhance system
performance. The options are Enable and Disable.
QPI (Quick Path Interconnect) Conguration
QPI Status
The following information will display:
• Number of CPU
• Number of IIO
• Current QPI Link Speed
• Current QPI Link Frequency
• QPI Global MMIO Low Base/Limit
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• QPI Global MMIO High Base/Limit
• QPI PCIe Conguration Base/Size
Link Speed Mode
Use this item to select the data transfer speed for QPI Link connections. The
options are Fast and Slow.
Link Frequency Select
Use this item to select the desired frequency for QPI Link connections. The op-
tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited.
Link L0p Enable
Select Enable for Link L0p support. The options are Enable, Auto, and Disable.
Link L1 Enable
Select Enable for Link L1 support. The options are Enable, Auto, and Disable.
COD Enable (Available when the OS and the CPU support this feature)
Select Enabled for Cluster-On-Die support to enhance system performance in
cloud computing. The options are Enabled and Disabled.
Early Snoop (Available when the OS and the CPU support this feature)
Select Enabled for Early Snoop support to enhance system performance. The
options are Enable, Disable, and Auto.
Isoc Mode
Select Enabled for Isochronous support to meet QoS (Quality of Service) require-
ments. This feature is especially important for Virtualization Technology. The
options are Enable and Disable.
Memory Conguration
Enforce POR
Select Enable to enforce POR restrictions for DDR4 frequency and voltage
programming. The options are Enabled and Disabled.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory
modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,
2200, 2400, 2600, 2667, and Reserved (Do not select Reserved).
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ECC Support
Select Enable to enable Error Checking & Correction (ECC) support for onboard
memory modules. The options are Auto, Enable and Disable.
Enhanced Log Parsing
Select Enable to enable Error Checking & Correction (ECC) support for onboard
memory modules. The options are Auto, Enable and Disable.
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Auto, Disabled and Enabled.
Enable ADR
Select Enabled for ADR (Automatic Diagnostic Repository) support to enhance
memory performance. The options are Enabled and Disabled.
DRAM RAPL (Running Average Power Limit) Baseline
Use this feature to set the run-time power-limit baseline for DRAM modules. The
options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.
Set Throttling Mode
Throttling improves reliability and reduces power consumption in the proces-
sor via automatic voltage control during processor idle states. The options are
Disabled and CLTT (Closed Loop Thermal Throttling).
Socket Interleave Below 4GB
Select Enabled for the memory above the 4G Address space to be split between
two sockets. The options are Enable and Disable.
Channel Interleaving
Use this item to set DIMM channel interleaving mood. The options are Auto,
1 Way Interleave, 2 Way Interleave, 3, Way Interleave, and 4 Way Interleave.
Rank Interleaving
Use this item to select a rank memory interleaving method. The options are Auto,
1 Way, 2 Way, 4, Way, and 8 Way.
A7 Mode
Select Enabled to support A7 (Addressing) Mode to improve memory perfor-
mance. The options are Enable and Disable.
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DIMM Information
This item displays the status of a DIMM module specied.