Supermicro X10SRH-CF operation manual

X10SRH-CF/

CLN4F

USER’S MANUAL

Revision 1.1a

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our web site at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all
claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy and, if not installed and used in accordance with the instruc­tions, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interfer­ence to radio or television reception, which can be determined by turning the equipment off and on,
the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and receiver.

• Connect the equipment to an outlet on a circuit different from that to which the receiver

is connected.

• Consult the authorized dealer or an experienced radio/TV technician for help.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warn­ing applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to the
State of California to cause birth defects and other repro­ductive harm.

Manual Revision 1.1a
Release Date: August 23, 2016

Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Copyright © 2016 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

This manual is written for system integrators, IT professionals, and

knowledgeable end users. It provides information for the installation and use of the

X10SRH-CF/CLN4F motherboard.

About This Motherboard

The X10SRH-CF/CLN4F supports a single Intel® E5-2600/1600 Series

Processor in an LGA2011 R3 socket. With the Intel® C612 Express chipset built

in, the motherboard offers great system enhancement to high performance storage

platforms. Please refer to our website (http://www.supermicro.com/products/) for

processor and memory support updates. This product is intended to be installed

and serviced by professional technicians.

Manual Organization

Chapter 1 describes the features, specications and performance of the mother-

board, and provides detailed information on the Intel® C612 Express chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules and other hardware components into the

system. If you encounter any problems, see Chapter 3, which describes trouble-

shooting procedures for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information

on running the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C contains UEFI BIOS Recovery instructions.

Appendix D contains Dual Boot Block instructions.

Preface

iii

X10SRH-CF/CLN4F User’s Manual

Conventions Used in the Manual:

Special attention should be given to the following symbols for proper system instal-

lation:

Warning: Critical information given to prevent damage to the components or injury

to yourself.

Note: Additional Information provided for correct system setup.

iv

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Web Site: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Web Site: www.supermicro.nl

Contacting Supermicro

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Web Site: www.supermicro.com.tw

v

X10SRH-CF/CLN4F User’s Manual

Table of Contents

Preface

Chapter 1 Introduction

1-1 Overview ......................................................................................................... 1-1

1-2 Chipset Overview ..........................................................................................1-11

1-3 Special Features ........................................................................................... 1-12

1-4 PC Health Monitoring .................................................................................... 1-12

1-5 ACPI Features ............................................................................................... 1-13

1-6 Power Supply ................................................................................................ 1-13

1-7 Super I/O ....................................................................................................... 1-14

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

2-2 Static-Sensitive Devices .................................................................................. 2-4

Precautions ..................................................................................................... 2-4

Unpacking ....................................................................................................... 2-4

2-3 Motherboard Installation .................................................................................. 2-5

Tools Needed .................................................................................................. 2-5

Location of Mounting Holes ............................................................................ 2-5

Installing the Motherboard .............................................................................. 2-6

2-4 Processor and Heatsink Installation................................................................ 2-7

Installing the LGA2011 Processor .................................................................2-7

Installing a Passive CPU Heatsink ................................................................2-11

Removing the Heatsink ................................................................................. 2-12

2-5 Installing DDR4 Memory ............................................................................... 2-13

DIMM Installation .......................................................................................... 2-13

Removing Memory Modules ......................................................................... 2-14

Memory Support ............................................................................................ 2-14

2-6 Connectors/IO Ports ...................................................................................... 2-16

Backplane I/O Panel ..................................................................................... 2-16

Universal Serial Bus (USB) ...................................................................... 2-17

Ethernet Ports .......................................................................................... 2-18

Serial Ports (COM1/COM2)...................................................................... 2-18

Unit Identier Switch/UID LED Indicator .................................................. 2-19

VGA Port ..................................................................................................2-19

Front Control Panel ....................................................................................... 2-20

Front Control Panel Pin Denitions............................................................... 2-21

NMI Button ............................................................................................... 2-21

Power LED .............................................................................................. 2-21

vi

Table of Contents

HDD LED .................................................................................................. 2-22

NIC1/NIC2 LEDs ...................................................................................... 2-22

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-23

Power Fail LED ........................................................................................ 2-23

Reset Button ........................................................................................... 2-24

Power Button ........................................................................................... 2-24

2-7 Connecting Cables ........................................................................................ 2-25

ATX Main PWR & CPU PWR Connectors (J24 & JPW1) ....................... 2-25

Fan Headers (Fan 1-Fan 5 & Fan A-Fan C ) .......................................... 2-26

Chassis Intrusion (JL1) ........................................................................... 2-26

Internal Buzzer (SPKR1) .......................................................................... 2-27

Speaker (JD1) .......................................................................................... 2-27

DOM PWR Connector (JSD1/JSD2) ........................................................ 2-28

Standby Power ......................................................................................... 2-28

T-SGPIO 1/2/3 Headers ........................................................................... 2-29

Power SMB (I2C) Connector .................................................................... 2-29

TPM Header/Port 80 Header ................................................................... 2-30

2-8 Jumper Settings ............................................................................................ 2-31

Explanation of Jumpers ................................................................................ 2-31

LAN Ports Enable/Disable ........................................................................ 2-31

CMOS Clear (JBT1) ................................................................................. 2-32

PCI-E Slot SMB Enable (JI2C1/JI2C2) ...................................................... 2-32

Manufacture Mode Select ........................................................................ 2-33

SAS Enable .............................................................................................. 2-33

VGA Enable .............................................................................................. 2-34

Watch Dog Enable/Disable ...................................................................... 2-34

BMC Enable ............................................................................................ 2-35

Overheat (OH)/Fan Fail ............................................................................ 2-35

BIOS Recovery Enable ............................................................................ 2-36

2-9 Onboard Indicators ........................................................................................ 2-37

LAN 1/LAN 2 LEDs .................................................................................. 2-37

IPMI Dedicated LAN LEDs ....................................................................... 2-37

Onboard Power LED (LE2) ..................................................................... 2-38

BMC Heartbeat LEDM1 ........................................................................... 2-38

SAS Heartbeat LED ................................................................................. 2-39

2-10 SATA Connections .........................................................................................2-40

SATA/SAS Connections ........................................................................... 2-40

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

vii

X10SRH-CF/CLN4F User’s Manual

3-2 Technical Support Procedures ........................................................................ 3-3

3-3 Frequently Asked Questions ........................................................................... 3-4

3-4 Battery Removal and Installation .................................................................... 3-5

3-5 Returning Merchandise for Service................................................................. 3-6

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

Starting BIOS Setup Utility .............................................................................. 4-1

How To Change the Conguration Data ......................................................... 4-1

How to Start the Setup Utility ......................................................................... 4-2

4-2 Main Setup ...................................................................................................... 4-2

The following Main menu items will be displayed: ..................................... 4-3

System Date/System Time ........................................................................ 4-3

Supermicro X10SRH-CF/CLN4F ................................................................ 4-3

Version: This item displays the version of the BIOS ROM used in the

system. ....................................................................................................... 4-3

Build Date: This item displays the date when the version of the BIOS ROM

used in the system was built. ................................................................... 4-3

Memory Information ................................................................................... 4-3

Total Memory: This item displays the total size of memory available in the

system. ....................................................................................................... 4-3

Memory Speed: This item displays the default speed of the memory

modules installed in the system. ................................................................ 4-3

4-3 Advanced Setup Congurations...................................................................... 4-4



Boot Feature ................................................................................................. 4-4

Quiet Boot .................................................................................................. 4-4

AddOn ROM Display Mode ........................................................................ 4-4

Bootup Num-Lock State ............................................................................. 4-4

Wait For 'F1' If Error ................................................................................... 4-5

INT19 (Interrupt 19) Trap Response .......................................................... 4-5

Re-try Boot ................................................................................................. 4-5

Power Conguration ........................................................................................ 4-5

DeepSx Power Policies .............................................................................. 4-5

Watch Dog Function ................................................................................... 4-5

Power Button Function ............................................................................... 4-5

Restore on AC Power Loss ........................................................................ 4-6

CPU Conguration ....................................................................................... 4-6

CPU Conguration ..................................................................................... 4-6

Clock Spread Spectrum ............................................................................. 4-6

viii

Table of Contents

Hyper-Threading (All) ................................................................................. 4-6

Cores Enabled ............................................................................................ 4-7

Execute-Disable Bit (Available if supported by the OS & the CPU) .......... 4-7

PPIN Control .............................................................................................. 4-7

Hardware Prefetcher (Available when supported by the CPU) ................. 4-7

Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-7

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by

the CPU) ..................................................................................................... 4-7

DCU IP Prefetcher...................................................................................... 4-7

DCU Mode .................................................................................................. 4-8

Direct Cache Access (DCA) ....................................................................... 4-8

DCA Prefetch Delay ................................................................................... 4-8

X2 APIC (Advanced Programmable Interrupt Controller) .......................... 4-8

AES-NI ........................................................................................................ 4-8

Intel Virtualization Technology .................................................................... 4-8

 ...................................................Advanced Power Management Conguration

4-8

Advanced Power Management Conguration ............................................ 4-8

Power Technology ...................................................................................... 4-8

Chipset Conguration .................................................................................4-11

North Bridge ................................................................................................4-11

IIO Conguration .........................................................................................4-11

 Intel VT for Directed I/O (VT-d) ................................................................ 4-13

QPI (Quick Path Interconnect) Conguration ............................................ 4-14



South Bridge Conguration ........................................................................ 4-17



USB Conguration ...................................................................................... 4-17

Legacy USB Support ................................................................................ 4-17

XHCI Hand-Off ......................................................................................... 4-18

EHCI Hand-Off ......................................................................................... 4-18

USB Mass Storage Driver Support .......................................................... 4-18

Port 60/64 Emulation ................................................................................ 4-18

USB 3.0 Support ...................................................................................... 4-18

EHCI1 ....................................................................................................... 4-18

EHCI2 ....................................................................................................... 4-18

XHCI Pre-Boot Drive ................................................................................ 4-18

XHCI Idle L1 ............................................................................................. 4-18

PCH DMI ASPM ....................................................................................... 4-19



SATA Conguration .................................................................................... 4-19

SATA Controller ........................................................................................ 4-19

ix

X10SRH-CF/CLN4F User’s Manual

Congure SATA as ................................................................................... 4-19

*If the item above "Congure SATA as" is set to IDE, the following items

will display: ............................................................................................... 4-20

*If the item above "Congure SATA as" is set to RAID, the following items

will display: ............................................................................................... 4-20



sSATA Conguration ................................................................................... 4-21

sSATA Controller ......................................................................................4-21

Congure sSATA as ................................................................................. 4-21

*If the item above "Congure sSATA as" is set to IDE, the following items

will display: ............................................................................................... 4-22

*If the item above "Congure sSATA as" is set to RAID, the following items

will display: ............................................................................................... 4-23

Server ME (Management Engine) Conguration ....................................... 4-24

PCIe/PCI/PnP Conguration ...................................................................... 4-24

The following PCI information will be displayed: ..................................... 4-24

VGA Palette Snoop .................................................................................. 4-24

PCI AER (Advanced Error-Reporting) Support ........................................ 4-24

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
4-24

SR-IOV (Available if the system supports Single-Root Virtualization) ..... 4-24

Maximum Payload .................................................................................... 4-25

Maximum Read Request .......................................................................... 4-25

ASPM Support .......................................................................................... 4-25

MMIOHBase ............................................................................................. 4-25

MMIO High Size ....................................................................................... 4-25

PCH Slot2 PCI-E 2.0 x4 (In x8) (OPROM)/PCH Slot3 PCI-E 2.0 x2 (In
x4) (OPROM)/CPU Slot4 PCI-E 3.0 x8 (OPROM)/CPU Slot5 PCI-E 3.0 x8
(OPROM)/CPU Slot6 PCI-E 3. x8 (In x16) (OPROM)/CPU Slot7 PCI-E 3.0

x4 (In x8) (OPROM) ................................................................................. 4-25

Onboard SAS Option ROM Type ............................................................. 4-25

Onboard LAN Option ROM Type ............................................................. 4-25

Onboard LAN1 Option ROM/Onboard LAN2 Option ROM/Onboard LAN3
Option ROM/Onboard LAN4 Option ROM/Onboard Video Option ROM 4-26

VGA Priority .............................................................................................. 4-26

Network Stack .......................................................................................... 4-26

Ipv4 PXE Support (Available when Network Stack is set to Enabled) .... 4-26

Ipv6 PXE Support (Available when Network Stack is set to Enabled) .... 4-26



Super IO Conguration ............................................................................. 4-26



Serial Port 1 Conguration/Serial Port 2 Conguration ........................ 4-26

Serial Port 1/Serial Port 2 ........................................................................ 4-26

Device Settings ........................................................................................ 4-27

x

Table of Contents

Change Port 1 Settings/Change Port 2 Settings ..................................... 4-27

Serial Port 2 Attribute ............................................................................... 4-27



Serial Port Console Redirection ................................................................. 4-27

COM 1 ...................................................................................................... 4-27

COM 1 Console Redirection .................................................................... 4-27

SOL/COM2 ............................................................................................... 4-29

SOL/COM2 Console Redirection Settings ................................................. 4-29

Trusted Computing (Available when a TPM device is installed and detected

by the BIOS) ................................................................................................. 4-32

Conguration ............................................................................................ 4-32

Security Device Support ........................................................................... 4-32

TPM State ................................................................................................ 4-32

Pending Operation ................................................................................... 4-32

Current Status Information ....................................................................... 4-32



ACPI Settings ............................................................................................ 4-33

WHEA Support ......................................................................................... 4-33

High Precision Timer ................................................................................ 4-33

NUMA (Available when the OS supports this feature) ............................. 4-33

4-4 Event Logs .................................................................................................... 4-34

Change SMBIOS Event Log Settings ....................................................... 4-34

Enabling/Disabling Options ...................................................................... 4-34

SMBIOS Event Log .................................................................................. 4-34

Runtime Error Logging Support ............................................................... 4-34

Memory Corrected Error Enabling (Available when the item above-Runtime

Error Logging Support is set to Enable) .................................................. 4-34

PCI-Ex (PCI-Express) Error Enable ......................................................... 4-34

Memory Correctable Error Threshold ....................................................... 4-35

Erasing Settings ....................................................................................... 4-35

Erase Event Log ....................................................................................... 4-35

When Log is Full ...................................................................................... 4-35

SMBIOS Event Log Standard Settings .................................................... 4-35

Log System Boot Event ........................................................................... 4-35

MECI (Multiple Event Count Increment) .................................................. 4-35

METW (Multiple Event Count Time Window) ........................................... 4-35

View SMBIOS Event Log...............................................4-35

4-5 IPMI ............................................................................................................... 4-36

IPMI Firmware Revision ........................................................................... 4-36

IPMI Status ............................................................................................... 4-36

System Event Log ..................................................................................... 4-36

xi

X10SRH-CF/CLN4F User’s Manual

Enabling/Disabling Options ...................................................................... 4-36

SEL Components ..................................................................................... 4-36

Erasing Settings ....................................................................................... 4-36

Erase SEL ................................................................................................ 4-36

When SEL is Full ...................................................................................... 4-37

BMC Network Conguration ...................................................................... 4-37

Update IPMI LAN Conguration ............................................................... 4-37

Conguration Address Source (Available when the item above - Update

IPMI LAN Conguration is set to Yes) .................................................... 4-37

4-6 Security Settings ........................................................................................... 4-38

Password Check ...................................................................................... 4-38

Administrator Password ........................................................................... 4-38

User Password ......................................................................................... 4-38

4-7 Boot Settings ................................................................................................. 4-39

Boot Conguration ........................................................................................ 4-39

Setup Prompt Timeout ............................................................................. 4-39

Boot Mode Select ..................................................................................... 4-39

Fixed Boot Order Priorities ....................................................................... 4-39

Add New Boot Option .............................................................................. 4-40

Boot Option File Path ............................................................................... 4-40



Delete Boot Option ................................................................................ 4-40



Hard Disk Drive BBS Priorities ............................................................. 4-41



Network Drive BBS Priorities ................................................................ 4-41



UEFI Application Boot Priorities ............................................................ 4-41

4-8 Save & Exit ................................................................................................... 4-42

Discard Changes and Exit ...................................................................... 4-42

Save Changes and Reset ........................................................................ 4-42

Save Options ............................................................................................ 4-42

Save Changes .......................................................................................... 4-42

Discard Changes ...................................................................................... 4-42

Restore Defaults ....................................................................................... 4-43

Save As User Defaults ............................................................................. 4-43

Restore User Defaults .............................................................................. 4-43

Boot Override ........................................................................................... 4-43

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes .................................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Installing SuperDoctor5 ...................................................................................B-2

xii

Table of Contents

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

Appendix D Dual Boot Block on Grantley Platforms

D-1 IPMI GUI Browser ...........................................................................................D-2

D-2 IPMI Command Sets .......................................................................................D-7

User Approach ............................................................................................................D-9

xiii

X10SRH-CF/CLN4F User’s Manual

Notes

xiv

Chapter 1: Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention to

detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.

If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box:

• One (1) Supermicro Motherboard

• Ten (10) SATA cables

• One (1) I/O shield

• One (1) Quick Reference Guide

Note: For your system to work properly, please follow the links below to

download all necessary drivers/utilities and the user's manual for your

motherboard.

Supermicro product manuals: http://www.supermicro.com/support/manuals/

Product Drivers and utilities: ftp://ftp.supermicro.com/

If you have any questions, please contact our support team at support@supermicro.

com.

1-1

X10SRH-CF/CLN4F User’s Manual

X10SRH-CF/CLN4F Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB Revision

available at the time of publishing of the manual. Your motherboard or components

may or may not look exactly the same as the graphics shown in this manual.

1-2

LE1

USB4/5

USB6/7

USB8/9

JIPMB1

T-SGPIO3

T-SGPIO2

T-SGPIO1

Chapter 1: Introduction

X10SRH-CF/CLN4F Motherboard Layout

JUIDB1

UID-LED

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

i350

VGA

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

IPMI_LAN

JVR1

DIMMD2

DIMMD1

DIMMC2

JP4

DIMMC1

USB0/1

COM1

FAN5

FAN4

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1
HDD

JD1:

LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

FAN3

SAS CODE

BIOS
LICENSE

BAR CODE

IPMI CODE

MAC CODE

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

FAN2

321

FAN1

123

BMC

LEDM1

JPG1:VGA

1-2:ENABLE

2-3:DISABLE

L-SAS0-3

JPB1:BMC

BT1

JPL1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

USB11(3.0)

J33

COM2

JPME2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

S-SATA2

S-SATA1

S-SATA0

I-SATA1

I-SATA0

FANC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

SP1

JVRM2

JVRM1

J23

1

JI2C1

JPG1

JPB1

JI2C2

JPS1

JOH1

JBR1

S-SATA3

I-SATA3

I-SATA2

JL1

POWER

CHASSIS
INTRUSION

+

POWERSATA DOM

SATA DOM

SATA DOM

+
POWER

BIOS

PCH
C610

JPSAS1

I-SATA5

JSD2

JSD1
I-SATA4

JTPM1

:TPM/PRO80

FANB

USB10(3.0)

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE
2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

LEDS1

LSI
3008

L-SAS4-7

FANA

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

• " " indicates the location of "Pin 1".

• Jumpers not indicated are for testing only.

• When the onboard Power LED Indicator (LE2) is on, system power is on.

Unplug the power cable before installing or removing any components.

1-3

X10SRH-CF/CLN4F User’s Manual

X10SRH-CF/CLN4F Quick Reference

123

BMC

2-3:ME MANUFACTURING MODE

1-2:Normal

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

JI2C1/JI2C2

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

L-SAS0-3

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

DESIGNED IN USA

USB4/5

USB6/7

USB8/9

JIPMB1

T-SGPIO3

T-SGPIO2

T-SGPIO1

J33

COM2

JPME2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

S-SATA2

S-SATA1

S-SATA0

I-SATA1

I-SATA0

FANC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

JVRM2

JVRM1

J23

1

JI2C1

JPG1

JPB1

JI2C2

JPS1

JL1

JOH1

CHASSIS
INTRUSION

JBR1

S-SATA3

I-SATA5

+

POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

+
POWER

PCH SLOT3 PCI-E 2.0 X2(IN X4)

BIOS

JPME2

PCH
C610

JPSAS1

LSI
3008

JTPM1

L-SAS4-7

:TPM/PRO80

FANA

FANB

USB10(3.0)

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

1.00REV:

USB11(3.0)

LE1
UID-LED

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JF1

JSTBY1

JF1

JUIDB1
UID-SW

i350

VGA

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

IPMI_LAN

JVR1

DIMMD2

DIMMD1

JP4

DIMMC1

DIMMC2

USB0/1

COM1

FAN5

FAN4

CPU

1

LGA2011-3

1

PWR
ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:

LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

FAN3

SAS CODE

BIOS
LICENSE

BAR CODE

IPMI CODE

MAC CODE

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

FAN2

321

FAN1

X10SRH-CF/CLN4F Jumpers

Jumper Description Default

JBR1 BIOS Recovery Pins 1-2 (Normal)

JBT1 CMOS Clear (See Chapter 2)

2

C1/JI2C2 SMB to PCI-E Slots Pins 2-3 (Disabled)

JI

JPB1 BMC Enable/Disable Pins 1-2 (Enabled)

JPG1 VGA Enable Pins 1-2 (Enabled)

JPL1 LAN1/2/3/4 Enable Pins 1-2 (Enabled)

JPME2 Manufacture Mode Select Pins 1-2 (Normal)

JPS1 SAS Enable Pins 1-2 (Enabled)

JWD1 Watch Dog Enable Pins 1-2 (Reset)

1-4

Chapter 1: Introduction

X10SRH-CF/CLN4F Headers/Connectors

Connector Description

BT1 Onboard Battery

COM1/COM2 COM1 (Port)/COM2 (Header)

Fan1 - Fan5

System/CPU Fan Headers

FanA - FanC

J24 24-pin ATX Main Power Connector (Required)

JD1 Speaker/Buzzer (Pins 1-3: Power LED, Pins 4-7: Speaker)

JF1 Front Panel Control Header

JL1 Chassis Intrusion Header

JOH1 Overheat LED/Fan Fail

2

JPI

C1 Power SMB (System Management Bus)

JPWR1 +12V 8-pin CPU Power Connector (Required)

JSD1/JSD2 SATA DOM (Device_On_Module) Power Connector

JSTBY1 Standby Power Header

JTPM1 Trusted Platform Module/Port 80 Connector

JUIDB1 UID (Unit Identier) Switch

LAN1 Gigabit (RJ45) Port (LAN1)

LAN2/LAN3/LAN4 Gigabit (RJ45) Ports (LAN2/3/4)

IPMI_LAN IPMI_Dedicated LAN

I-SATA0 - I-SATA3 SATA 3.0 Ports

I-SATA4 - I-SATA5 SATA DOM (Device_On_Module) Ports

S-SATA0 - S-SATA3 SATA 3.0 Ports

L-SAS 0-3, 4-7 SAS Connectors 0-7 (supported by the LSI 3008 SAS controller)

(PCH) Slot 2/3 PCI-Express 2.0 (one x2 in x4 slot, one x4 in x8 slot)

(CPU) Slot 4/5/6/7 PCI-Express 3.0 (one x4 in x8 slot, two x8 slots, one x8 in x16 slot)

SP1 Internal Speaker/Buzzer

T-SGPIO 1/2/3 Serial_Link General Purpose I/O Headers 1/2 for SATA Connections

USB 0/1 Backpanel USB 2.0 Ports 0/1

USB 2/3, 10, 11 Backpanel USB 2.0 ports and Front Panel Accessible USB 3.0 Port

(USB 10: Type A Connector)

USB 4/5, 6/7, 8/9 Front Panel Accessible USB 2.0 Headers

VGA Backpanel VGA Port

1-5

X10SRH-CF/CLN4F User’s Manual

X10SRH-CF/CLN4F LED Indicators

LED Description State/Color Status

LE1 UID LED Blue On Unit Identied

LE2 Power LED On Power On

LEDM1 BMC Heartbeat LED Green Blinking BMC Normal

LEDS1 SAS LED

Green Blinking SAS Active

Solid On SAS Error

1-6

Chapter 1: Introduction

Motherboard Features

CPU Single Intel® E5-2600/1600 Series processor in an

LGA2011 R3 socket.

Note: Both E5-2600v4 and E5-1600v4 re-

quire Revision 2.0 BIOS (or higher).

Memory Supports DDR4 memory up to 256GB RDIMM or 512GB

LRDIMM at 2400 MHz (max.) in eight (8) DIMM slots.

Dual-channel memory

DIMM sizes

RDIMM 1 GB, 2 GB, 4GB, 8GB, 16GB, 32GB

Chipset Intel

Expansion Slots Two (2) PCI Express 2.0: 1 (x2 in x4), 1 (x4 in x8)

I/O Devices SATA/SAS Connections

®

C612 Express

Four (4) PCI Express 3.0: 1 (x4 in x8), 1 (x8 in x16), 2 (x8)

Four (4) RJ-45 rear I/O panel connectors with Link and
Activity LEDs

Ten (10) SATA3 ports

• AHCI controller supports six (6)

SATA3 drives compatible with

RAID 0, 1, 5, 10.

• sSATA controller supports four

SATA 3.0 (6Gb/s)

(4) SATA3 drives compatible

with RAID 0, 1, 5, 10.

• RAID array and volume(s) can-

not span across the two (AHCI

and sSATA) controllers.

SATA DOM Two (2) SATA DOM Ports (SATA 4/5)

USB Devices

Eight (8) USB 2.0 ports ( 2 rear, 6 via headers)

Four (4) USB 3.0 headers for USB 3.0 support (2 rear, 1
Type-A, 1 via header)

Serial (COM) Ports

One (1) COM Port

Graphics Controller

AST 2400 Graphics Controller

Super I/O

AST 2400

Disk-On-Module

Two (2) SMC SSD-DOM connector (yellow color)

1-7

X10SRH-CF/CLN4F User’s Manual

Network Intel® i350 Gigabit Dual-Channel Ethernet controller for

LAN1/LAN2 ports (X10SRH-CF)

Intel® i350 Gigabit Quad-Channel Ethernet controller for
LAN1/LAN2/LAN3/LAN4 ports (X10SRH-CLN4F)

BIOS 128 Mb AMI BIOS

®

SPI Flash BIOS

Plug and Play (PnP), DMI 2.3, PCI 2.3, ACPI 1.0/2.0/3.0,
USB Keyboard and SMBIOS 2.5

Power Conguration ACPI/APM Power Management

Main Switch Override Mechanism

Keyboard Wake-up from Soft-Off

Power-on mode for AC power recovery

PC Health Monitoring CPU Monitoring

Onboard voltage monitors for CPU core, +3.3V, +5V,+12V,
+3.3V Stdby, VBAT, Memory

CPU 5-phase switching voltage regulator

CPU/System overheat LED and control

CPU Thermal Trip support

Thermal Monitor 2 (TM2) support

Fan Control

Fan status monitoring with rmware 4-pin fan speed con­trol via IPMI interface

Low noise fan speed control

System Management PECI (Platform Environment Conguration Interface) 2.0

support

UID (Unit Identier)/Remote UID

System resource alert via SuperDoctor

SuperDoctor

®

5, Watch Dog, NMI

®

5

Chassis Intrusion header and detection

BIOS ash upgrade utility

Dimensions ATX form factor: 9.6" x 12" (243.84mm x 304.8mm)

1-8

X10SRH-CF Block Diagram

Chapter 1: Introduction

MINI SAS HD

MINI SAS HD

RJ45

BMC Boot Flash

LSI SAS3008

PCIe3.0 x8SLOT4

SLOT5

LAN3

RTL8211E-VB-CG

DDR3

SPI

VGA CONN

Temp Sensor

EMC1402-1 *2 at diff SMBUS

PCIe3.0 x8

RJ45

RJ45

RGRMII

BMC

AST2400

COM1

Connector

0-6

0-5

DDRIV

LAN
i350

RMII / NCSI

0-8

0-7

PCI-E X8 Gen3

PCI-E X8 Gen3

PCI-E X8 Gen3

BIOS

MUX

PCI-E X1 Gen2

COM2
Header

6

5

USB

USB 3.0

USB 2.0

SPI

LPC

2

PCI-E X4 Gen2

1

SPI

7

13 (USB2.0)

TPM HEADER
Debug Card

FRONT PANEL

VR12.5
5 PHASE
145W

Skt-R3
LGA2011-3

A2A1

3A

3D

PCH

DMI2

3C

DMI2

PCI-E X4 Gen2

1/2/3/4

PCI-E X2 Gen2

5/6

6.0 Gb/S

USB 2.0

SYSTEM POWER

FAN SPEED

CTRL

C2

PCI-E X8 Gen3

PCI-E X4 Gen3

3

2

1

0

3

2

1

0

4

SATA

4

USB

6

5

6

5

PCIe2.0 x8
(x4 in x8)

PCIe2.0 x4
(x2 in x4)

9

8

7

11

10

9

7

0-2

0-1

12

0-4

0-3

DDRIV

PCIe3.0 X16
( X8 in X16 )

PCIe3.0 X8
( X4 in X8 )

SLOT6

SLOT7

SLOT2

SLOT3

System Block Diagram

Note: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features

pages for the actual specications of each motherboard.

1-9

X10SRH-CF/CLN4F User’s Manual

X10SRH-CLN4F Block Diagram

MINI SAS HD

MINI SAS HD

RJ45

BMC Boot Flash

LSI SAS3008

PCIe3.0 x8SLOT4

SLOT5

LAN3

RTL8211E-VB-CG

DDR3

VGA CONN

Temp Sensor

EMC1402-1 *2 at diff SMBUS

PCIe3.0 x8

SPI

RJ45

RJ45

RJ45

RJ45

RGRMII

BMC

AST2400

COM1
Connector

0-7

0-6

0-5

DDRIV

LAN
i350

RMII / NCSI

0-8

PCI-E X8 Gen3

PCI-E X8 Gen3

PCI-E X8 Gen3

BIOS

MUX

PCI-E X1 Gen2

USB 2.0

COM2
Header

PCI-E X4 Gen2

6

5

2

1

USB

USB 3.0

SPI

SPI

LPC

VR12.5

5 PHASE

145W

Skt-R3

LGA2011-3

3A

PCH

7

13 (USB2.0)

TPM HEADER
Debug Card

FRONT PANEL

A2A1

3D

DMI2

3C

DMI2

PCI-E X4 Gen2

1/2/3/4

PCI-E X2 Gen2

5/6

6.0 Gb/S

USB 2.0

SYSTEM POWER

FAN SPEED

CTRL

C2

PCI-E X8 Gen3

PCI-E X4 Gen3

3

2

1

0

3

2

1

0

4

SATA

4

USB

6

5

6

5

PCIe2.0 x8
(x4 in x8)

PCIe2.0 x4
(x2 in x4)

9

8

7

11
10
9

7

0-1

12

0-4

0-3

0-2

DDRIV

PCIe3.0 X16
( X8 in X16 )

PCIe3.0 X8
( X4 in X8 )

SLOT6

SLOT7

SLOT2

SLOT3

System Block Diagram

Note: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features

pages for the actual specications of each motherboard.

1-10

Chapter 1: Introduction

1-2 Chipset Overview

The X10SRH-CF/CLN4F supports a single Intel® E5-2600/1600 Series Processor

in an LGA2011 R3 socket. Built upon the functionality and the capability of the

Intel C612 Express chipset, the motherboard provides substantial enhancement

to system performance and storage capability for high performance platforms in a

sleek package.

The high-speed Direct Media Interface (DMI) featured in the Intel® C612 Express

chipset supports high-speed Direct Media Interface (DMI) for chip-to-chip true

isochronous communication, providing up to 5 Gb/s of software -transparent data

transfer rate on each read/write direction. In addition, the X10SRH-CF/CLN4F

also features a TCO timer which allows the system to recover from a software/

hardware lock and perform tasks, including Function Disable and Intruder Detect.

Intel C612 Express Chipset Features

• Direct Media Interface (up 5 Gb/s transfer, Full Duplex)

• Dual NAND Interface

®

• Intel

• Intel

I/O Virtualization (VT-d) Support

®

Trusted Execution Technology Support

• PCI Express 2.0 Interface (up to 5.0 GT/s)

• SATA Controller (up to 6Gb/sec)

• Advanced Host Controller Interface (AHCI)

Note: Both E5-2600v4 and E5-1600v4 require Revision 2.0 BIOS (or

higher).

1-11

X10SRH-CF/CLN4F User’s Manual

1-3 Special Features

Recovery from AC Power Loss

Basic I/O System (BIOS) provides a setting for you to determine how the system will

respond when AC power is lost and then restored to the system. You can choose

for the system to remain powered off, (in which case you must press the power

switch to turn it back on), or for it to automatically return to a power-on state. See

the Advanced BIOS Setup section to change this setting. The default setting is

Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the board. All have an

onboard System Hardware Monitoring chip that supports PC health monitoring. An

onboard voltage monitor will scan these onboard voltages continuously: CPU Vcore,

12V, 5V, 3.3V, 3.3VSB, Memory, and Battery voltages. Once a voltage becomes

unstable, a warning is given, or an error message is sent to the screen. The user

can adjust the voltage thresholds to dene the sensitivity of the voltage monitor.

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn

on the thermal control fan whenever the CPU temperature exceeds a user-dened

threshold. The overheat circuitry runs independently from the CPU. Once the ther-

mal sensor detects that the CPU temperature is too high, it will automatically turn

on the thermal fans to prevent the CPU from overheating. The onboard chassis

thermal circuitry can monitor the overall system temperature and alert the user when

the chassis temperature is too high.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

System Resource Alert

This feature is available when the system is used with SuperDoctor® 5 in the

Windows OS environment or used with SuperDoctor II in Linux. SuperDoctor

is used to notify the user of certain system events. For example, you can also

congure SuperDoctor to provide you with warnings when the system temperature,

CPU temperatures, voltages and fan speeds go beyond predened thresholds.

1-12

Chapter 1: Introduction

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-

tion denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a PC system, including

its hardware, operating system and application software. This enables the system

to automatically turn on and off peripherals such as CD-ROMs, network cards, hard

disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also

provides a generic system event mechanism for Plug and Play, and an operating

system-independent interface for conguration control. ACPI leverages the Plug and

Play BIOS data structures, while providing a processor architecture-independent

implementation that is compatible with Windows

2008 Operating Systems.

®

7, Windows® 8, and Windows

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start to blink

to indicate that the CPU is in suspend mode. When the user presses any key, the

CPU will "wake up", and the LED will automatically stop blinking and remain on.

1-6 Power Supply

®

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

This motherboard accommodates 24-pin ATX power supplies. Although most

power supplies generally meet the specications required by the CPU, some are

inadequate. In addition, the 12V 8-pin power connector located at JPW1 is also

required to ensure adequate power supply to the system.

Warning: To avoid damaging the power supply or motherboard, please use a power

supply that contains a 24-pin and an 8-pin power connectors. Be sure to connect the

24-pin (J24) and the 8-pin (JPW1) power connectors on the motherboard to the power

supply. Failure in doing so will void the manufacturer warranty on your power supply

and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX

power supply Specication 2.02 or above. It must also be SSI compliant. (For more

information, please refer to the website at http://www.ssiforum.org/). Additionally, in

areas where noisy power transmission is present, you may choose to install a line lter

to shield the computer from noise. It is recommended that you also install a power

surge protector to help avoid problems caused by power surges.

1-13

X10SRH-CF/CLN4F User’s Manual

1-7 Super I/O

The Super I/O supports two high-speed, 16550 compatible serial communication

ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable

baud rate generator, complete modem control capability and a processor interrupt

system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps

as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which

support higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Conguration

and Power Interface), which includes support of legacy and ACPI power manage-

ment through an SMI or SCI function pin. It also features auto power management

to reduce power consumption.

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user

of situations which have the potential for bodily injury. Should you have questions or

experience difculty, contact Supermicro's Technical Support department for assis-

tance. Only certied technicians should attempt to install or congure components.

Read this section in its entirety before installing or conguring components in the

Supermicro chassis.

Battery Handling

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the

battery only with the same or equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメー
カーが推奨する型、または同等のものを使用下さい。 使用済電池は製造元の指示に従

って処 分して下さい。

警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更
换原有电池。请按制造商的说明处理废旧电池。

警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有
電池。請按照製造商的說明指示處理廢棄舊電池。

Warnung

Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.

Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

2-1

X10SRH-CF/CLN4F User’s Manual

Attention

Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.

Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!

Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-

dado por el fabricante. Desechar las baterías gastadas según las instrucciones

del fabricante.

!הרהזא

תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי

גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.

תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל









경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing

Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-

bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften

afgevoerd te worden.

2-2

Chapter 2: Installation

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws

and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が

ありま す。

警告
本产品的废弃处理应根据所有国家的法律和规章进行。

警告
本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung

Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.

¡Advertencia!

Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.

Attention

La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de

l'organisme compétent.

רצומה קוליס

!הרהזא

ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח

2-3

X10SRH-CF/CLN4F User’s Manual

 

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Waarschuwing

De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

2-2 Static-Sensitive Devices

Electrostatic-Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your system board, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic

bag.

• Handle the board by its edges only; do not touch its components, peripheral

chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in

use.

• For grounding purposes, make sure your computer chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

• Use only the correct type of onboard CMOS battery. Do not install the onboard

battery upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When

unpacking the board, make sure that the person handling it is static protected.

2-4

Chapter 2: Installation

LE1

JUIDB1

2-3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Although a chassis may have both plastic and metal mounting fas-

teners, metal ones are highly recommended because they ground the motherboard

to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

Philips Screwdriver

(1)

Philips Screws (9)

Location of Mounting Holes

123

BMC

2-3:ME MANUFACTURING MODE

JPME2

L-SAS4-7

2-3:DISABLE

1-2:Normal

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

I2C bus for PCI-E slot

JI2C1/JI2C2

2-3:DISABLE

LEDS1

1-2:ENABLE

JPG1:VGA

1-2:ENABLE

2-3:DISABLE

L-SAS0-3

JPB1:BMC

BT1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

+
POWERSATA DOM

I-SATA3

I-SATA1

SATA DOM

POWER

SATA DOM

I-SATA2

I-SATA0

+

POWER

FANC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

1

JPB1

BIOS

PCH
C610

JPSAS1

I-SATA5

JSD2

JSD1

I-SATA4

LSI
3008

JTPM1

:TPM/PRO80

FANA

FANB

USB10(3.0)

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

USB11(3.0)

UID-LED

JPL1:LAN1/2/3/4

CPU SLOT7 PCI-E 3.0 X4(IN X8)

PWR

JF1

ON
RST
X

OH
FF
NIC
2
NIC
1
HDD
LED
PWR
LED
X

NMI

JSTBY1

JF1

Standoffs (9)

Only if Needed

UID-SW

VGA

i350

LAN2/LAN4

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

USB2/3(3.0)

LAN1/LAN3

CPU

1

LGA2011-3

1

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

LICENSE

JD1

LE2

FAN3

FAN2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

Caution: 1) To avoid damaging the motherboard and its components, please do

not use a force greater than 8 lb/inch on each mounting screw during motherboard

installation. 2) Some components are very close to the mounting holes. Please take

precautionary measures to avoid damaging these components when installing the

motherboard to the chassis.

2-5

X10SRH-CF/CLN4F User’s Manual

Installing the Motherboard

1. Install the I/O shield into the back of the chassis.

2. Locate the mounting holes on the motherboard. (See the previous page.)

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other

motherboard components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo-

nents might look different from those shown in this manual.

2-6

Chapter 2: Installation

2-4 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the

label area of the fan.

Notes:

• Always connect the power cord last, and always remove it before adding, re-

moving or changing any hardware components. Make sure that you install the

processor into the CPU socket before you install the CPU heatsink.

• If you buy a CPU separately, make sure that you use an Intel-certied multi-

directional heatsink only.

• Make sure to install the system board into the chassis before you install the

CPU heatsink.

• When receiving a server board without a processor pre-installed, make sure that

the plastic CPU socket cap is in place and none of the socket pins are bent;

otherwise, contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

Installing the LGA2011 Processor

1. There are two load levers on the LGA2011 socket. To open the socket cover,

rst press and release the load lever labeled 'Open 1st'.

1

OPEN 1st

Press down

on

labeled 'Open 1st'.

2

OPEN 1st

Load Lever

2-7

X10SRH-CF/CLN4F User’s Manual

2. Press the second load lever labeled 'Close 1st' to release the load plate that

covers the CPU socket from its locking position.

1

3. With the 'Close 1st' lever fully retracted, gently push down on the 'Open 1st'

lever to open the load plate. Lift the load plate to open it completely.

Press down on

Lever 'Close 1st'

OPEN 1st

1

OPEN 1st

Load

Gently push
down to pop the
load plate open.

Pull lever away from

2

the socket

OPEN 1st

2

2-8

Chapter 2: Installation

4. Using your thumb and the index nger, loosen the CPU lever and open the

load plate.

5. Use your thumb and index nger to hold the CPU on its edges. Align the CPU

keys, which are semi-circle cutouts, against the socket keys.

Socket Keys

CPU Keys

6. Once they are aligned, carefully lower the CPU straight down into the socket.

(Do not drop the CPU on the socket. Do not move the CPU horizontally or

vertically. Do not rub the CPU against the surface or against any pins of the

socket to avoid damaging the CPU or the socket.)

Warning: You can only install the

CPU inside the socket in one direc-

tion. Make sure that it is properly

inserted into the CPU socket before

closing the load plate. If it doesn't

close properly, do not force it as it

may damage your CPU. Instead,

open the load plate again and dou-

ble-check that the CPU is aligned

properly.

2-9

X10SRH-CF/CLN4F User’s Manual

7. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

8. Close the load plate with the CPU inside the socket. Lock the lever labelled

'Close 1st' rst, then lock the lever labelled 'Open 1st' second. Using your

thumb gently push the load levers down to the lever locks.

Gently close

1 2

the load plate.

3

Lever Lock

OPEN 1st

Push down and

lock the lever

labelled 'Open

1st'.

Push down and lock the
lever labelled 'Close 1st'.

OPEN 1st

4

OPEN 1st

2-10

Lever Lock

Chapter 2: Installation

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the Motherboard's and the Heatsink Bracket under-

neath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug

(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Screw#1

Motherboard

Note: For optimized airow, please follow your chassis airow direction

to install the correct CPU heatsink direction. Graphic drawings included

in this manual are for reference only. They might look different from the

components installed in your system

Screw#2

OPEN 1st

Mounting Holes

2-11

X10SRH-CF/CLN4F User’s Manual

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the heatsink, please follow the instructions below to prevent

damage to the CPU or the CPU socket.

1. Unscrew the heatsink screws from the motherboard in the sequence as

shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive

force when wriggling the heatsink!)

3. Once the heatsink is loosened, remove the heatsink from the CPU socket.

4. Remove the used thermal grease and clean the surface of the CPU and the

heatsink. Reapply the proper amount of thermal grease on the surface before

reinstalling the heatsink.

Loosen screws
in sequence as
shown.

Screw#4

Screw#1

Motherboard

Screw#2

Screw#3

2-12

LE1

JUIDB1

2-5 Installing DDR4 Memory

Note: Check the Supermicro website for recommended memory mod-

ules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage.

Chapter 2: Installation

DIMM Installation

1. Insert the desired number of DIMMs

into the memory slots, starting with

DIMMA1 (Channel A, Slot 1, see

the next page for the location). For

the system to work properly, please

use the memory modules of the

same type and speed in the same

motherboard.

2. Push the release tabs outwards on

both ends of the DIMM slot to unlock

it.

3. Align the key of the DIMM mod-

ule with the receptive point on the

memory slot.

4. Align the notches on both ends of

the module against the receptive

points on the ends of the slot.

5. Use two thumbs together to press

the notches on both ends of the

module straight down into the slot

until the module snaps into place.

6. Press the release tabs to the lock

positions to secure the DIMM module

into the slot.

123

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

+

POWER

FANB

FANC

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

BMC

LEDM1

JPL1

CPU SLOT5 PCI-E 3.0 X8

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH
C610

JTPM1

:TPM/PRO80

USB10(3.0)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

BIOS

JPSAS1

FANA

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

LEDS1

X10SRH-CF

1.00REV:

DESIGNED IN USA

LSI
3008

JSTBY1

L-SAS4-7

L-SAS0-3

USB11(3.0)

Release Tabs

Press both notches

straight down into

the memory slot.

UID-LED

JF1

JF1

UID-SW

PWR
ON
RST

X

OH
FF
NIC
2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

VGA

i350

LAN2/LAN4

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

SAS CODE

BIOS
LICENSE

FAN3

Notches

COM1

USB0/1

USB2/3(3.0)

FAN5

FAN4

IPMI_LAN

LAN1/LAN3

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

BAR CODE

IPMI CODE

MAC CODE

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

2-13

X10SRH-CF/CLN4F User’s Manual

Removing Memory Modules

Reverse the steps above to remove the DIMM modules from the motherboard.

Memory Support

DIMMB2
DIMMB1
DIMMA2
DIMMA1

1

1

The X10SRH-CF/CLN4F supports DDR4 memory up to 256GB RDIMM or 512GB

LRDIMM at 2400 MHz (max.) in eight (8) DIMM slots. Populating these DIMM

modules with a pair of memory modules of the same type and same size will

result in interleaved memory, which will improve memory performance. Please

refer to the table below:

Notes:

DIMMD2
DIMMD1
DIMMC2
DIMMC1

Edge of the motherboard

• Be sure to use memory modules of the same type, speed, and capacity

on the same motherboard. Mixing of memory modules of different types

and speeds is not allowed.

• Due to memory allocation to system devices, the amount of memory that

remains available for operational use will be reduced when 4 GB of RAM

is used. The reduction in memory availability is disproportional. See the

following table for details.

2-14

Chapter 2: Installation

Ranks Per

and

Speed (MT/s); Voltage

(DPC)

1 Slot Per

LRDIMM

3DS

Ranks Per

and

Speed (MT/s); Voltage (V);

Channel (DPC)

Possible System Memory Allocation & Availability

System Device Size Physical Memory

Firmware Hub ash memory (System BIOS) 1 MB 3.99

Local APIC 4 KB 3.99

Area Reserved for the chipset 2 MB 3.99

I/O APIC (4 Kbytes) 4 KB 3.99

PCI Enumeration Area 1 256 MB 3.76

PCI Express (256 MB) 256 MB 3.51

PCI Enumeration Area 2 (if needed) -Aligned on 256-MB
boundary-

512 MB 3.01

VGA Memory 16 MB 2.85

TSEG 1 MB 2.84

Memory available to OS and other applications 2.84

Remaining (-Available)

(4 GB Total System

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v3-based Motherboard

(V);

Slot Per Channel (SPC)

(GB)

and DIMM Per Channel

2 Slots Per Channel

Channel

1DPC 1DPC 2DPC

1.2V 1.2V 1.2V

2133 2133 1866

2133 2133 1866

2133 2133 1866

2133 2133 1866

2133 2133 2133

2133 2133 2133

DIMM Capacity

DIMM

Type

Data

Width

4Gb 8Gb

RDIMM SRx4 8GB 16GB

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

8Rx4 64GB 128GB

†

Memory)

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v4-based Motherboard

DIMM Capacity

DIMM

Type

Data

Width

4Gb 8Gb

RDIMM SRx4 8GB 16GB

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

LRDIMM

8Rx4 64GB 128GB

3DS

Slot Per Channel (SPC) and DIMM Per

1 Slot Per

(GB)

Channel

1DPC 1DPC 2DPC

1.2V 1.2V 1.2V

2400 2400 2133

2400 2400 2133

2400 2400 2133

2400 2400 2133

2400 2400 2400

2400 2400 2400

2 Slots Per Channel

2-15

X10SRH-CF/CLN4F User’s Manual

LE1

F

2-6 Connectors/IO Ports

The I/O ports are color coded in conformance with the industry standards. See the

gure below for the colors and locations of the various I/O ports.

Backplane I/O Panel

JUIDB1

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA2

DIMMA1

DIMMB1

LAN2/LAN4

JF2

DIMMB2

LAN1/LAN3

USB2/3(3.0)

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

SAS CODE

BIOS
LICENSE

BAR CODE

IPMI CODE

MAC CODE

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

PWR

JF1

ON
RST

X

OH

FF

NIC

2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

FAN3

123

BMC

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal
2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA3

I-SATA1

I-SATA2

I-SATA0

FANC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

J23

1

JPG1

JPB1

BIOS

CHASSIS
INTRUSION

PCH
C610

JPSAS1

I-SATA5

+
POWERSATA DOM

JSD2

SATA DOM

POWER

SATA DOM

JSD1
I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANA

FANB

USB10(3.0)

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE
I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

LSI
3008

L-SAS4-7

L-SAS0-3

D

H

A

C

E

G

J

I

K

B

Backplane I/O Panel

A. COM1 G. LAN1

B. USB Port 0 (2.0) H. LAN3

C. USB Port 1 (2.0) I. LAN2

D. IPMI_LAN J. LAN4

E. USB Port 2 (3.0) K. VGA Port for IPMI

F. USB Port 3 (3.0)

2-16

Chapter 2: Installation

F

Universal Serial Bus (USB)

Two Universal Serial Bus 2.0 ports (0/1) and two USB 3.0 ports (2/3) are located

on the I/O back panel. In addition, six USB 2.0 headers (4/5, 6/7, 8/9), and two

USB 3.0 headers (10, 11) are also located on the motherboard to provide USB 3.0

support using USB cables (not included). USB 10 is a Type A connector. See the

tables below for pin denitions.

Back Panel USB (2.0) #0/1

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 5 +5V

2 USB_PN0 6 USB_PN1

3 USB_PP0 7 USB_PP1

4 Ground 8 Ground

USB (3.0) USB#11

Pin Denitions

Pin# Description

1 VBUS

2 SSRX-

3 SSRX+

4 Ground

5 SSTX-

6 SSTX+

7 GND_DRAIN

8 D-

9 D+

123

PCH SLOT2 PCI-E 2.0 X4(IN X8)

BIOS

PCH
C610

JPSAS1

JTPM1

:TPM/PRO80

USB10(3.0)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:Normal

BMC

1-2:ENABLE

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

I2C bus for PCI-E slot

JI2C1/JI2C2

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

L-SAS0-3

J33

COM2

SP1

USB4/5

C

JVRM2

USB6/7

D

E

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

+
POWER

FANB

FANC

LEDM1

JPL1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

Front Panel USB (2.0) #4/5, 6/7, 8/9

Pin Denitions

Pin # Denition Pin # Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 NC

A. Backpanel USB 2.0 #0/1

B. Backpanel USB 3.0 #2/3

C. Front Panel USB 2.0 #4/5

D. Front Panel USB 2.0 #6/7

E. Front Panel USB 2.0 #8/9

F. Type A USB #10

G. Front Panel USB 3.0 #11

A

JF2

DIMMB2

LAN2/LAN4

1

LGA2011-3

BAR CODE

IPMI CODE

MAC CODE

LAN1/LAN3

B

USB2/3(3.0)

IPMI_LAN

JVR1

DIMMD1

DIMMD2

CPU

1

FAN2

LE1

JUIDB1

UID-LED

UID-SW

VGA

i350

DIMMA2

DIMMA1

DIMMB1

PWR

JF1

ON

RST

X

SAS CODE

OH

FF

NIC

2

NIC

1
HDD
LED
PWR
LED

NMI

JF1

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

X

LICENSE

JD1

LE2

FAN3

COM1

USB0/1

FAN5

FAN4

JP4

DIMMC1

DIMMC2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

G

2-17

X10SRH-CF/CLN4F User’s Manual

LE1

F

Ethernet Ports

Four Gigabit Ethernet ports (LAN1/

LAN2/LAN3/LAN4) and an IPMI_LAN

port are located on the I/O backplane

to provide network connections. These

ports accept RJ45 type cables.

Note: Please refer to the LED

Indicator Section for LAN LED

information.

Serial Ports (COM1/COM2)

Serial port COM1 is located next to

USB 0/1 and the IPMI_LAN on the I/O

backplane. Another Serial port header

(COM2) is located on the motherboard.

See the table on the right for pin deni-

tions.

LAN Ports

Pin Denition

Pin# Denition

1 MDI_N0 10 GND

2 MDI_P0 11 Act LED

3 MDI_N1 12 Link Up

4 MDI_P1 13 Link 1000 LED

5 MDI_N2 14 Link 100 LED

(Yellow, +3V3SB)

(Green, +3V3SB)

6 MDI_P2 15 Ground

7 MDI_N3 16 Ground

8 MDI_P3 17 Ground

9 COMMCT 18 Ground

(NC: No Connection)

Serial Ports

Pin Denitions

Pin # Denition Pin # Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

E

1

LGA2011-3

BAR CODE

IPMI CODE

MAC CODE

D

LAN1/LAN3

A

USB2/3(3.0)

IPMI_LAN

C

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

A. LAN1

B. LAN2

C. LAN3

D. LAN4

E. IPIMI_LAN

CPU

F. COM1

G. COM2

1

JPI2C1

JWD1

JPWR1

J24

1-2:RST
JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

B

JUIDB1

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

PWR

JF1

ON
RST

X

SAS CODE

OH

FF

NIC

2

NIC

1

HDD

BIOS

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

LICENSE

NMI

JD1

LE2

FAN3

123

PCH SLOT2 PCI-E 2.0 X4(IN X8)

BIOS

PCH
C610

JPSAS1

JTPM1

:TPM/PRO80

USB10(3.0)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

2-3:DISABLE

BMC

1-2:ENABLE
I2C bus for PCI-E slot

JI2C1/JI2C2

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

LEDS1

2-3:DISABLE

L-SAS0-3

1-2:ENABLE

JPB1:BMC

BT1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

DESIGNED IN USA

G

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

+
POWER

FANB

FANC

2-18

Chapter 2: Installation

LE1

JUIDB1

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and an LED

Indicator are located on the motherboard.

The UID switch is located next to the VGA

port on the backplane. The UID LED (LE1)

is located next to the UID switch. When you

press the UID switch, the UID LED will be

turned on. Press the UID switch again to

turn off the LED indicator. The UID Indicator

provides easy identication of a system unit

that may be in need of service.

Note: UID can also be triggered

via IPMI on the motherboard. For

more information on IPMI, please

refer to the IPMI User's Guide

posted on our website @ http://

www.supermicro.com.

VGA Port

The onboard VGA port is located next to

LAN Ports 2/4 on the I/O backpanel. Use

the connection for VGA display.

UID Switch

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

UID LED

Status

Color/State Status

Blue: On Unit Identied

B

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

A

UID-LED

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

JF1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

FAN4

A. VGA

B. UID Switch

C. UID LED

C

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE
I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

1.00REV:

DESIGNED IN USA

L-SAS0-3

USB11(3.0)

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

USB6/7

USB8/9

JIPMB1

T-SGPIO3

T-SGPIO2

T-SGPIO1

JVRM2

JVRM1

J23

1

JPME2

JI2C1

JPG1

JPB1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

CLEARCMOS

1-2:Normal

2-3:BIOS recovery

S-SATA2

S-SATA1

S-SATA0

I-SATA1

I-SATA0

FANC

BIOS

JPS1

JL1

JOH1

CHASSIS
INTRUSION

JBT1

JBR1

JBR1

PCH
C610

JPSAS1

S-SATA3

I-SATA5

+
POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

USB10(3.0)

2-19

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

1920

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located

on a control panel at the front of the chassis. These connectors are designed spe-

cically for use with Supermicro chassis. See the gure below for the descriptions

of the front control panel buttons and LED indicators. Refer to the following section

for descriptions and pin denitions.

UID-LED

1.00REV:

USB11(3.0)

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JPL1:LAN1/2/3/4

CPU SLOT7 PCI-E 3.0 X4(IN X8)

PWR

JF1

ON
RST
X

OH
FF
NIC
2
NIC
1
HDD
LED
PWR
LED
X

NMI

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:
PWR LED1-3:

LICENSE

JD1

LE2

FAN3

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE
I2C bus for PCI-E slot

JI2C1/JI2C2

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

Ground

PowerLED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

JF1 Header Pins

X

2

2-20

1

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

PWR

ResetButton

PowerButton

LE1

JUIDB1

USB10(3.0)

1920

Front Control Panel Pin Denitions

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

Chapter 2: Installation

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

UID-LED

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

1

LGA2011-3

PWR

JF1

ON
RST

X

OH

FF
NIC
2
NIC
1
HDD
LED
PWR
LED
X

NMI

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

LICENSE

JD1

LE2

FAN3

123

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA3

I-SATA1

POWER

I-SATA2

I-SATA0

FANC

BMC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

CPU SLOT4 PCI-E 3.0 X8

J23

1

JPB1

INTRUSION

I-SATA5

+
POWERSATA DOM

JSD2

SATA DOM

SATA DOM

JSD1
I-SATA4

+
POWER

FANB

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BIOS

1-2:ENABLE
I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

PCH
C610

LEDS1

JPSAS1

LSI
3008

JTPM1

L-SAS4-7

L-SAS0-3

:TPM/PRO80

FANA

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

A. NMI

B. PWR LED

COM1

USB0/1

USB2/3(3.0)

CPU

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

1

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

Ground

PowerLED

B

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

X

Ground

Ground

A

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

ResetButton

PowerButton

PWR

2

1

2-21

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

USB10(3.0)

1920

HDD LED

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach a

cable here to indicate HDD activ-

ity. See the table on the right for pin

denitions.

NIC1/NIC2 LEDs

The NIC (Network Interface Control-

ler) LED connection for GLAN Port 1

is located on pins 11 and 12 of JF1,

and the LED connection for GLAN

Port 2 is on pins 9 and 10. Attach the

NIC LED cables to the LED indicators

mentioned above to display network

activity. Refer to the layout below for

the locations of NIC LED indicators.

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 3.3V SB/UID_SW

14 HD Active

GLAN1/2 LED

Pin Denitions (JF1)

Pin# Denition

9 Vcc

10 NIC 2 Link/Acitivty

LED

11 Vcc

12 NIC 1 Link/Acitivty

LED

A. HDD LED

B. NIC1 LED

C. NIC2 LED

UID-LED

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

CPU

1

LGA2011-3

PWR

JF1

ON
RST

X

OH
FF
NIC
2
NIC
1
HDD
LED
PWR
LED

X

NMI

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

LICENSE

JD1

LE2

FAN3

COM1

USB0/1

USB2/3(3.0)

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

1

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

Ground

PowerLED

HDD LED

A

NIC1 LED

B

NIC2 LED

C

OH/Fan Fail LED

PWR Fail LED

X

Ground

Ground

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

ResetButton

PowerButton

PWR

2

1

123

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA3

I-SATA1

POWER

I-SATA2

I-SATA0

FANC

BMC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

CPU SLOT4 PCI-E 3.0 X8

J23

1

JPB1

INTRUSION

I-SATA5

+
POWERSATA DOM

JSD2

SATA DOM

SATA DOM

JSD1
I-SATA4

+
POWER

FANB

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA
2-3:DISABLE

2-3:DISABLE

BIOS

1-2:ENABLE
I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

PCH
C610

LEDS1

JPSAS1

LSI
3008

JTPM1

L-SAS4-7

L-SAS0-3

:TPM/PRO80

FANA

2-22

Chapter 2: Installation

LE1

JUIDB1

USB10(3.0)

1920

Overheat (OH)/Fan Fail/PWR Fail/ UID LED

Connect an LED cable to pins 7 and

8 of Front Control Panel to use the

Overheat, Fan Fail, and Power Fail

connections. Refer to the table on the

right for pin denitions.

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

denitions.

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Denitions (JF1)

Pin# Denition

7 Vcc

8 Red_LED-Cathode/OH/Fan Fail/

Power Fail

OH/Fan Fail/PWR Fail

LED Status (Red LED)

State Denition

Off Normal

On Overheat

Flashing
1 Hz

Flashing
1/4 Hz

Pin Denitions (JF1)

Fan Fail

Redundant
Power
Supply Fail

PWR Fail LED

Pin# Denition

5 3.3V

6 PWR LED Status

A.OH/Fan Fail/PWR Fail/UID LED

B. PWR Fail LED

UID-LED

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

CPU

1

LGA2011-3

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1
HDD
LED
PWR
LED

X

NMI

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

LICENSE

JD1

LE2

FAN3

COM1

USB0/1

USB2/3(3.0)

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

1

JPI2C1

JWD1

JPWR1

J24

1-2:RST
JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

Ground

PowerLED

HDD LED

NIC1 LED

NIC2 LED

A

OH/Fan Fail LED

PWR Fail LED

B

X

Ground

Ground

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

ResetButton

PowerButton

PWR

2

1

123

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

+
POWERSATA DOM

I-SATA3

I-SATA1

POWER

SATA DOM

I-SATA2

I-SATA0

+
POWER

FANC

BMC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

CPU SLOT4 PCI-E 3.0 X8

J23

1

JPB1

I-SATA5

JSD2

SATA DOM

JSD1
I-SATA4

FANB

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BIOS

1-2:ENABLE

I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

PCH
C610

LEDS1

JPSAS1

LSI
3008

JTPM1

L-SAS4-7

L-SAS0-3

:TPM/PRO80

FANA

2-23

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

1920

Reset Button

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case. Refer to the table on the right for

pin denitions.

Power Button

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. This button can also be con-

gured to function as a suspend button

(with a setting in the BIOS - See Chapter

4). To turn off the power when the system

is in suspend mode, press the button for

4 seconds or longer. Refer to the table on

the right for pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

A. Reset Button

B. PWR Button

UID-LED

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

CPU

1

LGA2011-3

PWR

JF1

ON
RST

X

OH
FF
NIC
2
NIC
1
HDD
LED
PWR
LED

X

NMI

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS

JD1:

SPEAKER4-7:

PWR LED1-3:

LICENSE

JD1

LE2

FAN3

COM1

USB0/1

USB2/3(3.0)

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

1

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

Ground

PowerLED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

X

Ground

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

PWR

2

1

ResetButton

PowerButton

A

B

123

J33

COM2

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

S-SATA1

S-SATA3

S-SATA0

I-SATA3

I-SATA1

POWER

I-SATA2

I-SATA0

FANC

BMC

PCH SLOT2 PCI-E 2.0 X4(IN X8)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

CPU SLOT4 PCI-E 3.0 X8

J23

1

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA
2-3:DISABLE

JPB1

INTRUSION

I-SATA5

+
POWERSATA DOM

JSD2

SATA DOM

SATA DOM

JSD1
I-SATA4

+
POWER

2-3:DISABLE

BIOS

1-2:ENABLE
I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

JPME2

BT1

PCH
C610

LEDS1

JPSAS1

LSI
3008

JTPM1

L-SAS4-7

L-SAS0-3

:TPM/PRO80

FANA

FANB

USB10(3.0)

2-24

Chapter 2: Installation

LE1

JUIDB1

2-7 Connecting Cables

This section provides brief descriptions and pin-out denitions for onboard headers

and connectors. Be sure to use the correct cable for each header or connector.

For information on Backpanel USB and Front Panel USB ports, refer to page 2-17.

ATX Main PWR & CPU PWR Connectors (J24 & JPW1)

The 24-pin main power connector

(J24) is used to provide power to the

motherboard. The 8-pin CPU PWR

connector (JPWR1) is also required

for the processor. These power

connectors meet the SSI EPS 12V

specication. See the table on the

right for pin denitions.

24-Pin Main PWR

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA2

DIMMA1

DIMMB1

PWR

JF1

ON
RST

X

SAS CODE

OH
FF
NIC
2
NIC
1
HDD

BIOS

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

LICENSE

NMI

JD1

LE2

FAN3

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal
2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+

POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

ATX Power 24-pin Connector

Pin Denitions (J24)

Pin# Denition Pin # Denition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 COM 3 COM

16 PS_ON 4 +5V

17 COM 5 COM

18 COM 6 +5V

19 COM 7 COM

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 COM 12 +3.3V

12V 8-pin Power Connec-

tor Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

(Required)

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMB2

IPMI_LAN

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

B. 8-Pin PWR

COM1

A. 24-Pin ATX Main PWR

USB0/1

CPU

1

LGA2011-3

1

BAR CODE

IPMI CODE

MAC CODE

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

B

321

FAN1

A

2-25

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

F

Fan Headers (Fan 1-Fan 5 & Fan A-Fan C )

The X10SRH-CF/CLN4F has eight fan head-

ers (Fan 1-Fan 5 & Fan A-Fan C). These fans

are 4-pin fan headers. Although pins 1-3 of the

onboard fan headers are backward compatible

with the traditional 3-pin fans, we recommend

that you use 4-pin fans to take advantage of the

fan speed control via IPMI interface. This allows

the fan speeds to be automatically adjusted

based on the motherboard temperature. Refer

to the table on the right for pin denitions.

Chassis Intrusion (JL1)

A Chassis Intrusion header is located at JL1 on

the motherboard. Attach the appropriate cable

from the chassis to inform you of a chassis intru-

sion when the chassis is opened.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 2.5A/+12V

(Red)

3 Tachometer

4 PWM_Control

Chassis Intrusion

Pin Denitions (JL1)

Pin# Denition

1 Intrusion Input

2 Ground

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

E

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

C

FAN3

FAN2

B

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

A

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:Normal

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

I2C bus for PCI-E slot
JI2C1/JI2C2

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

T-SGPIO1

H

I

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

G

D

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan A

G. Fan B

H. Fan C

I. Chassis Intrusion

2-26

A. Fan 1

Chapter 2: Installation

LE1

JUIDB1

Internal Buzzer (SPKR1)

The Internal Buzzer (SP1) is used to

provide audible indications for various

beep codes. See the table on the right

for pin denitions.

Speaker (JD1)

On the JD1 header, pins 4-7 are used

for internal speaker. Close pins 4-7

with a cap to use the speaker. See the

table on the right for pin denitions.

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm

JD1 Jumper

Pin Denitions

Speaker

Pin# Denition

1-3 Power LED

4-7 Speaker

A. Internal Buzzer

B. Onboard Speaker

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

B

FAN3

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

2-3:DISABLE

JI2C1/JI2C2

LEDS1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

JPG1:VGA

2-3:DISABLE

BT1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

A

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-27

X10SRH-CF/CLN4F User’s Manual

LE1

DOM PWR Connector (JSD1/JSD2)

The Disk-On-Module (DOM) power

connectors, located at JSD1 and

JSD2, provide 5V power to a solid

state DOM storage device connected

to one of the SATA ports. See the table

on the right for pin denitions.

Standby Power

The Standby Power header is located

at JSTBY1 on the motherboard. See

the layout below for the location.

DOM PWR

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

Standby Power

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

A. DOM PWR

B. Standby PWR

JUIDB1

UID-LED

JPL1

1.00REV:

B

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON

RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

2-3:DISABLE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

I2C bus for PCI-E slot

JI2C1/JI2C2

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

LEDS1

1-2:ENABLE

JPB1:BMC

2-3:DISABLE

BT1

L-SAS0-3

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

DESIGNED IN USA

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

A

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-28

Chapter 2: Installation

LE1

T-SGPIO 1/2/3 Headers

Three Serial-Link General Purpose Input/

Output headers (T-SGPIO 1/2/3) are

located on the motherboard. T-SGPIO

1/2/3 support onboard SATA interface,

and. See the table on the right for pin

denitions.

Power SMB (I2C) Connector

Power System Management Bus (I2C)

Connector (JPI2C1) monitors power sup-

ply, fan and system temperatures. See

the table on the right for pin denitions.

T-SGPIO/6-SGPIO

Pin Denitions

Pin# Denition Pin# Denition

2 NC 1 NC

4 Data 3 Ground

6 Ground 5 Load

8 NC 7 Clock

Note: NC= No Connection

PWR SMB

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PWR Fail

4 Ground

5 +3.3V

A. T-SGPIO 1

B. T-SGPIO 2

JUIDB1

UID-LED

1.00REV:

USB11(3.0)

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

JF1

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

USB2/3(3.0)

IPMI_LAN

USB0/1

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR
ON
RST

X

OH

FF
NIC
2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

J24

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

I2C bus for PCI-E slot

JI2C1/JI2C2

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

USB6/7

USB8/9

JPME2

JIPMB1

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

T-SGPIO3

C

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

B

T-SGPIO1

S-SATA2

A

S-SATA1

S-SATA0

I-SATA1

I-SATA0

FANC

JVRM2

JVRM1

J23

1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1

JL1

JOH1

CHASSIS
INTRUSION

JBR1

PCH
C610

JPSAS1

S-SATA3

I-SATA5

+

POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

USB10(3.0)

COM1

FAN5

JWD1

JPWR1

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN4

JPI2C1

D

C. T-SGPIO 3

D. PWR SMB

2-29

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

TPM Header/Port 80 Header

A Trusted Platform Module/Port 80

header is located at JTPM1 to provide

TPM support and Port 80 connection.

Use this header to enhance system

performance and data security. See

the table on the right for pin deni-

tions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 +5V (X)

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

11 LAD0 12 GND

13 SMB_CLK4 14 SMB_DAT4

15 +3V_DUAL 16 SERIRQ

17 GND 18 CLKRUN# (X)

19 LPCPD# 20 LDRQ# (X)

A. TPM/Port 80

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

2-3:DISABLE

JI2C1/JI2C2

LEDS1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

JPG1:VGA

2-3:DISABLE

BT1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

A

2-30

LE1

2-8 Jumper Settings

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers create

shorts between two pins to change the

function of the connector. Pin 1 is identied

with a square solder pad on the printed

circuit board.

Note: On two-pin jumpers,

"Closed" means the jumper is on,

and "Open" means the jumper is

off the pins.

Chapter 2: Installation

LAN Ports Enable/Disable

Jumper JPL1 enable or disable LAN ports

1/2/3/4 on the motherboard. See the table

on the right for jumper settings. The de-

fault setting is enabled.

JUIDB1

UID-LED

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE
1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

I2C bus for PCI-E slot

JI2C1/JI2C2

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE
2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+

POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

A

1.00REV:

USB11(3.0)

2-3:DISABLE

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JPL1:LAN1/2/3/4

1-2:ENABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

PWR

JF1

ON
RST

OH

FF
NIC
2
NIC
1
HDD

LED
PWR
LED

NMI

JSTBY1

JF1

UID-SW

VGA

i350

LAN2/LAN4

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

1

LGA2011-3

X

JD1:

SPEAKER4-7:
PWR LED1-3:

X

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

LAN1/LAN3

GLAN Enable

Jumper Settings

Pin# Denition

1-2 Enabled (default)

2-3 Disabled

A. JPL1: LAN1/2/3/4 Enable

COM1

USB0/1

USB2/3(3.0)

CPU

1

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

2-31

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

CMOS Clear (JBT1)

JBT1 is used to clear the saved system setup conguration stored in the CMOS

chip. To clear the contents of the CMOS, completely shut down the system, remove

the AC power cord and then short JBT1 with forceps. Remove the forceps before

powering on the system again. This will erase all user settings and revert everything

to their factory-set defaults.

PCI-E Slot SMB Enable (JI2C1/JI2C2)

Use Jumpers JI2C1/JI2C2 to enable

PCI-E SMB (System Management Bus)

support to improve system management

for the PCI-E slots. See the table on the

right for jumper settings.

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

PWR

JF1

ON
RST
X

OH

FF
NIC
2

NIC

1
HDD

JD1:

LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

FAN3

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

C

B

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

A

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

S-SATA0

I-SATA1

I-SATA0

JPSAS1

S-SATA3

I-SATA5

+

POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

DIMMA1

SAS CODE

PCI-E Slot_SMB Enable

Jumper Settings

Pin# Denition

1-2 Enabled

2-3 Disabled

(Default)

A. Clear CMOS

2

B. JI

C1

2

C. JI

C2

COM1

USB0/1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

CPU

1

LGA2011-3

1

BAR CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN5

FAN4

IPMI_LAN

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

2-32

Chapter 2: Installation

LE1

JUIDB1

Manufacture Mode Select

Close jumper JPME2 to bypass SPI ash

security and force the system to use the

Manufacture Mode which will allow the

user to ash the system rmware from

a host server to modify system settings.

See the table on the right for jumper

settings.

SAS Enable

Jumper JPS1 allows the user to enable

the onboard SAS connectors (L-SAS

Ports 0-7). The default setting is 1-2 to

enable the connection. See the table on

the right for jumper settings.

ME Mode Select

Jumper Settings

Pin# Denition

1-2 Normal (Default)

2-3 Manufacture Mode

SAS Enable

Jumper Settings

Pin# Denition

1-2 Enabled (Default)

2-3 Disabled

A. JPME2

B. SAS Enable

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE
2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:ME MANUFACTURING MODE

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

USB6/7

USB8/9

JIPMB1

A

T-SGPIO3

T-SGPIO2

T-SGPIO1

S-SATA2

S-SATA1

S-SATA0

I-SATA1

I-SATA0

JVRM2

JVRM1

J23

1

JPME2

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

JL1

JOH1

B

CHASSIS
INTRUSION

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

JBR1

PCH
C610

JPSAS1

S-SATA3

I-SATA5

+
POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-33

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

VGA Enable

Jumper JPG1 allows the user to enable

the onboard VGA connector. The default

setting is 1-2 to enable the connection.

See the table on the right for jumper

settings.

Watch Dog Enable/Disable

Watch Dog (JWD1) is a system moni-

tor that can reboot the system when a

software application hangs. Close Pins

1-2 to reset the system if an applica-

tion hangs. Close pins 2-3 to generate a

non-maskable interrupt signal for the ap-

plication that hangs. See the table on the

right for jumper settings. Watch Dog must

also be enabled in the BIOS.

VGA Enable

Jumper Settings

Pin# Denition

1-2 Enabled (Default)

2-3 Disabled

Watch Dog

Jumper Settings

Pin# Denition

1-2 Reset (default)

2-3 NMI

Open Disabled

A. VGA Enable

B. Watch Dog Enable

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

JPI2C1

JWD1

B

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

2-3:DISABLE

JI2C1/JI2C2

LEDS1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

JPG1:VGA

2-3:DISABLE

BT1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

A

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-34

Chapter 2: Installation

BMC Enable

Jumper JPB1 allows you to enable

the embedded the Aspeed 2400 BMC

(Baseboard Management) Controller to

provide IPMI 2.O/KVM support on the

motherboard. See the table on the right

for jumper settings.

Overheat (OH)/Fan Fail

Connect an LED cable to JOH1 to provide

warnings for chassis overheat/fan failure.

Refer to the table on the right for pin

denitions.

BMC Enable

Jumper Settings

Pin# Denition

1-2 BMC Enable

2-3 Normal (Default)

OH/Fan Fail Indicator Status

State Denition

Off Normal

On Overheat

Flashing Fan Fail

A. BMC Enable

B. Overheat/Fan Fail LED

LE1

JUIDB1

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST
X

OH
FF
NIC
2
NIC
1
HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC
1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

A

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

B

JBR1

PCH

S-SATA2

C610

S-SATA1

S-SATA0

I-SATA1

I-SATA0

JPSAS1

S-SATA3

I-SATA5

+
POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-35

X10SRH-CF/CLN4F User’s Manual

LE1

BIOS Recovery Enable

Close pins 2 and 3 of jumper JBR1 for

BIOS recovery. The default setting is on

pins 1 and 2 for normal operation. See

the table on the right for jumper settings.

BIOS Recovery

Jumper Settings

Pin# Denition

1-2 Normal

2-3 BIOS Recovery

A. BIOS Recovery

JUIDB1

UID-LED

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

JF1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

JPME2

LSI
3008

L-SAS4-7

FANA

LEDM1

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

2-3:DISABLE

1-2:ENABLE
I2C bus for PCI-E slot

2-3:DISABLE

JI2C1/JI2C2

1-2:Normal

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS

INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

A

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+

POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-36

Chapter 2: Installation

LE1

LAN 1/LAN 2

2-9 Onboard Indicators

LAN 1/LAN 2 LEDs

Four LAN ports (LAN 1/LAN 2) are located

on the I/O backplane of the motherboard.

Each Ethernet LAN port has two LEDs.

The yellow LED indicates activity, while the

Link LED may be green, amber, or off to

indicate the speed of the connections. See

the tables on the right for more information.

IPMI Dedicated LAN LEDs

In addition to the Gigabit Ethernet ports,

an IPMI Dedicated LAN is also located

above the Backplane USB ports 0/1 on the

motherboard. The yellow LED on the right

indicates activity, while the green/amber

LED on the left indicates the speed of the

connection. See the table on the right for

more information.

Activity LED

LAN1/LAN2

Link LED

GLAN 1/2 Activity Indicator

LED Settings

Color Status Denition

Yellow Flashing Active

GLAN Ports 1/2 Link Indicator

LED Settings

LED Color Denition

Off No Connection/10 Mbps/

Green 100 Mbps

Amber 1 Gbps

IPMI LAN

Link LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Activity LED

Color/State Denition

Link (Left) Amber: Solid 1 Gbps

Green: Solid 100 Mbps

Activity (Right) Yellow: Blinking Active

A

JUIDB1

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

PWR

JF1

ON

RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

LE2

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

1-2:ENABLE
I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

2-3:DISABLE

JI2C1/JI2C2

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

BT1

LEDS1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

T-SGPIO3

T-SGPIO2

CLEARCMOS

1-2:Normal

2-3:BIOS recovery

T-SGPIO1

S-SATA2

S-SATA1

S-SATA0

I-SATA1

I-SATA0

FANC

BIOS

JPS1

JL1

JOH1

CHASSIS
INTRUSION

JBT1

JBR1

JBR1

PCH
C610

JPSAS1

S-SATA3

I-SATA5

+
POWERSATA DOM

I-SATA3

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

JTPM1

+
POWER

:TPM/PRO80

FANB

USB10(3.0)

A

VGA

i350

LAN2/LAN4

JF2

DIMMA2

DIMMA1

DIMMB1

DIMMB2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

LAN1/LAN3

1

LGA2011-3

B

USB2/3(3.0)

IPMI_LAN

CPU

1

FAN2

COM1

USB0/1

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

J24

FAN1

B. IPMI_LAN LED

FAN5

FAN4

JPI2C1

JWD1

JPWR1

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

2-37

A. LAN 1/2/3/4 LEDs

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

Onboard Power LED (LE2)

An Onboard Power LED is located

at LE2 on the motherboard. When

LE2 is on, the AC power cord is

connected. Make sure to disconnect

the power cable before removing or

installing any component. See the

layout below for the LED location.

BMC Heartbeat LEDM1

A BMC Hear tbeat LED is located at

LEDM1 on the X10SRH- CF/CLN4F. See

the table on the right for more informa-

tion.

Onboard PWR LED Indicator

LED Status

Status Denition

Off System Off

On System on, or

System off and PWR
Cable Connected

BMC Heartbeat LED

Status

Color/State Denition

Green:

Blinking

BMC: Normal

A. PWR LED

B. BMC Heartbeat LED

UID-LED

JPL1

1.00REV:

USB11(3.0)

JPL1:LAN1/2/3/4

1-2:ENABLE

2-3:DISABLE

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

JF1

UID-SW

VGA

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON
RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:
PWR LED1-3:

X

NMI

JD1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN2

FAN1

123

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+

POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

BMC

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

2-3:DISABLE

JI2C1/JI2C2

LEDS1

B

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

JPG1:VGA

2-3:DISABLE

BT1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

A

2-38

Chapter 2: Installation

SAS Heartbeat LED

A SAS Heartbeat LED is located at

LEDS1 on the motherboard. See the

table on the right for more information.

SAS Heartbeat LED Status

(LEDS1)

Color/State Denition

Green:

Blinking

SAS Active

Red: Solid On SAS Error

A. SAS Heartbeat LED

LE1

JUIDB1

UID-LED

1.00REV:

USB11(3.0)

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT7 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

UID-SW

VGA

JPL1:LAN1/2/3/4

i350

DIMMA1

USB2/3(3.0)

LAN2/LAN4

LAN1/LAN3

JF2

DIMMA2

DIMMB1

DIMMB2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

CPU

1

LGA2011-3

1

PWR

JF1

ON

RST

X

OH

FF

NIC

2

NIC

1

HDD

JD1:
LED
PWR
LED

SPEAKER4-7:

PWR LED1-3:

X

NMI

JD1

JF1

LE2

BAR CODE

SAS CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

FAN3

FAN2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

123

BMC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

2-3:ME MANUFACTURING MODE

1-2:Normal

JPME2

LSI
3008

L-SAS4-7

FANA

2-3:DISABLE

1-2:ENABLE

I2C bus for PCI-E slot

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

2-3:DISABLE

JI2C1/JI2C2

A

LEDS1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

1-2:ENABLE

JPB1:BMC

JPG1:VGA

2-3:DISABLE

BT1

X10SRH-CF

DESIGNED IN USA

L-SAS0-3

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

J23

USB8/9

1

JPME2

JIPMB1

JI2C1

JPG1

JPB1

JI2C2

BIOS

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

PCH

S-SATA2

C610

S-SATA1

JPSAS1

S-SATA3

S-SATA0

I-SATA5

+
POWERSATA DOM

I-SATA3

I-SATA1

JSD2

SATA DOM

POWER

SATA DOM

JSD1

I-SATA2

I-SATA4

I-SATA0

JTPM1

+
POWER

:TPM/PRO80

FANB

FANC

USB10(3.0)

2-39

X10SRH-CF/CLN4F User’s Manual

LE1

JUIDB1

F

2-10 SATA Connections

SATA/SAS Connections

Ten SATA 3.0 connectors (I-SATA 0-5) and (S-

SATA 0-3) are located on the board. I-SATA 0-5

ports are supported by the AHCI controller and

are compatible with RAID 0, 1, 5, 10. S-SATA 0-3

ports are supported by the sSATA controller and

are compatible with RAID 0, 1, 5, 10. In addition to

SATA connections, there are eight SAS connec-

tions (L-SAS 0-7) supported by the LSI 3008 SAS

controller. These Serial Link connections provide

faster data transmission than legacy Parallel ATA.

See the table on the right for pin denitions.

UID-LED

123

BMC

JPME2

L-SAS4-7

K

2-3:ME MANUFACTURING MODE

1-2:Normal

1-2:ENABLE

I2C bus for PCI-E slot

2-3:DISABLE

CPU SLOT4 PCI-E 3.0 X8

1-2:ENABLE

JPG1:VGA

2-3:DISABLE

JI2C1/JI2C2

LEDS1

1-2:ENABLE

2-3:DISABLE

L-SAS0-3

L

JPB1:BMC

BT1

LEDM1

CPU SLOT5 PCI-E 3.0 X8

X10SRH-CF

1.00REV:

DESIGNED IN USA

J33

COM2

PCH SLOT2 PCI-E 2.0 X4(IN X8)

SP1

USB4/5

JVRM2

USB6/7

JVRM1

USB8/9

JPME2

JIPMB1

JI2C1

JPG1

JI2C2

JPS1:SAS

1-2:ENABLE

2-3:DISABLE

JPS1

T-SGPIO3

JL1

JOH1

CHASSIS
INTRUSION

T-SGPIO2

CLEARCMOS

JBT1

1-2:Normal

2-3:BIOS recovery

JBR1

T-SGPIO1

JBR1

S-SATA2

I

S-SATA1

H

S-SATA3

S-SATA0

J

G

B

D

A

C

+
POWERSATA DOM

I-SATA3

I-SATA1

POWER

SATA DOM

I-SATA2

I-SATA0

+
POWER

FANC

PCH SLOT3 PCI-E 2.0 X2(IN X4)

J23

1

JPB1

BIOS

PCH
C610

JPSAS1

I-SATA5

JSD2

SATA DOM

JSD1
I-SATA4

LSI
3008

JTPM1

E

:TPM/PRO80

FANA

FANB

USB10(3.0)

1-2:ENABLE

2-3:DISABLE

JPL1

CPU SLOT6 PCI-E 3.0 X8(IN X16)

JSTBY1

USB11(3.0)

JPL1:LAN1/2/3/4

CPU SLOT7 PCI-E 3.0 X4(IN X8)

PWR

JF1

ON

RST

X

OH

FF

NIC

2

NIC

1
HDD
LED
PWR
LED

X

NMI

JF1

UID-SW

VGA

i350

JD1:

SPEAKER4-7:

PWR LED1-3:

JD1

LE2

FAN3

DIMMA2

DIMMA1

SAS CODE

SATA/SAS Connectors

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

A. I-SATA 0

B. I-SATA 1

C. I-SATA 2

D. I-SATA 3

E. I-SATA 4 (SATA DOM)

F. I-SATA 5 (SATA DOM)

G. S-SATA 0

H. S-SATA 1

I. S-SATA 2

J. S-SATA 3

L. L-SAS 0-3

K. L-SAS 4-7

LAN1/LAN3

1

LGA2011-3

BAR CODE

IPMI CODE

MAC CODE

USB2/3(3.0)

CPU

1

JF2

DIMMB1

DIMMB2

BIOS
LICENSE

LAN2/LAN4

FAN2

IPMI_LAN

COM1

USB0/1

FAN5

FAN4

JP4

JVR1

DIMMD1

DIMMC1

DIMMC2

DIMMD2

JPI2C1

JWD1

JPWR1

J24

1-2:RST

JWD1:Watch Dog

2-3:NMI

321

FAN1

L

2-40

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the ‘Technical Support

Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Always disconnect the AC power cord before adding, changing or installing any

hardware components.

Before Power On

1. Make sure that the Standby PWR LED is not on. (Note: If it is on, the

onboard power is on. Be sure to unplug the power cable before installing or

removing the components.)

2. Make sure that there are no short circuits between the motherboard and

chassis.

3. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse. Also, be sure to remove all add-on cards.

4. Install a CPU and heatsink (-be sure that it is fully seated) and then connect

the chassis speaker and the power LED to the motherboard. Check all jumper

settings as well.

No Power

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Make sure that all jumpers are set to their default positions.

3. Check if the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to make sure that it still

supplies ~3VDC. If it does not, replace it with a new one.

3-1

X10SRH-CF/CLN4F User’s Manual

No Video

1. If the power is on, but you have no video--in this case, you will need to re-

move all the add-on cards and cables rst.

2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A

for details on beep codes.)

3. Remove all memory modules and turn on the system. (If the alarm is on,

check the specications of memory modules, reset the memory or try a differ-

ent one.)

Memory Errors

1. Make sure that the DIMM modules are properly installed and fully seated in

the slots.

2. You should be using ECC DDR4 2400 MHz (max.) memory recommended by

the manufacturer. Also, it is recommended that you use the memory modules

of the same type and speed for all DIMMs in the system. Do not use memory

modules of different sizes, different speeds and different types on the same

motherboard.

3. Check for bad DIMM modules or slots by swapping modules between slots to

see if you can locate the faulty ones.

4. Check the switch of 115V/230V power supply.

Losing the System’s Setup Conguration

1. Please be sure to use a high quality power supply. A poor quality power sup-

ply may cause the system to lose CMOS setup information. Refer to Section

1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the Setup Conguration problem, contact your

vendor for repairs.

3-2

Chapter 3: Troubleshooting

3-2 Technical Support Procedures

Before contacting Technical Support, please make sure that you have followed all

the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro

does not sell directly to end users, so it is best to rst check with your distributor or

reseller for troubleshooting services. They should know of any possible problem(s)

with the specic system conguration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/support/faqs/) before contacting Technical Sup-

port.

2. BIOS upgrades can be downloaded from our website at (http://www.supermi-

cro.com/support/bios/).

Note: Not all BIOS can be ashed. Some cannot be ashed; it depends

on the boot block code of the BIOS.

3. If you've followed the instructions above to troubleshoot your system, and still

cannot resolve the problem, then contact Supermicro's technical support and

provide them with the following information:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your

system rst boots up)

• System conguration

• An example of a Technical Support form is on our website at (http://www.su-

permicro.com/support/contact.cfm).

4. Distributors: For immediate assistance, please have your account number

ready when placing a call to our technical support department. We can be

reached by e-mail at [e-mail], by phone at: (408) 503-

8000, option 2, or by fax at [phone].

3-3

X10SRH-CF/CLN4F User’s Manual

3-3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X10SRH-CF/CLN4F supports up to 256GB of RDIMM and 512GB

of LRDIMM DDR4 2400 MHz (max.) in eight memory slots. See Section 2-5 for

details on installing memory.

Question: How do I update my BIOS?

Answer: We do NOT recommend that you upgrade your BIOS if you are not ex-

periencing any problems with your system. Updated BIOS les are located on our

website at http://www.supermicro.com/support/bios/. Please check our BIOS warn-

ing message and the information on how to update your BIOS on our web site.

Select your motherboard model and download the BIOS ROM le to your computer.

Also, check the current BIOS revision to make sure that it is newer than your BIOS

before downloading. You may choose the zip le. If you choose the zipped BIOS

le, please unzip the BIOS le onto a bootable device or a USB pen/thumb drive.

To ash the BIOS, run the batch le named "ash.bat" with the new BIOS ROM

le from your bootable device or USB pen/thumb drive. Use the following format:

F:\> ash.bat BIOS-ROM-lename.xxx <Enter>

Note: Always use the le named “ash.bat” to update the BIOS, and

insert a space between "ash.bat" and the lename. The BIOS -ROM -

lename will bear the motherboard name (i.e., X10SRH- CF/CLN4F) and

build version as the extension. For example, "X10SRH-CF/CLN4F.115".

When completed, your system will automatically reboot.

When the BIOS ashing screen is completed, power off to reboot the

system. Power on and at this point, you will need to load the BIOS de-

faults. Press <Del> to go to the BIOS setup screen, and select "Restore

Defaults" to load the default settings. Next, press <F4> to save and exit.

Then reboot the system.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!

Note: The SPI BIOS chip installed on this motherboard is not removable.

To repair or replace a damaged BIOS chip, please send your motherboard

to RMA at Supermicro for service.

Question: I think my BIOS is corrupted. How can I recover my BIOS?

Answer: Please see Appendix C - BIOS Recovery for detailed instructions.

Question: What is the heatsink part number for my X10SRH-CF/CLN4F mother-

board?

Answer: For the 1U passive heatsink, use SNK-P0047PS (back plate is included).

3-4

Chapter 3: Troubleshooting

3-4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue

below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a

click to ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

OR

3-5

X10SRH-CF/CLN4F User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required

before any warranty service will be rendered. You can obtain service by calling

your vendor for a Returned Merchandise Authorization (RMA) number. For faster

service, you may also obtain RMA authorizations online (http://www.supermicro.

com/RmaForm/). When you return the motherboard to the manufacturer, the RMA

number should be prominently displayed on the outside of the shipping carton, and

mailed prepaid or hand-carried. Shipping and handling charges will be applied for

all orders that must be mailed when service is complete.

This warranty only covers normal consumer use and does not cover damages

incurred in shipping or from failure due to the alteration, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product prob-

lems.

3-6

Chapter 4: AMI BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10DRL-CF/CLN4F. The

ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter

describes the basic navigation of the AMI BIOS setup utility screens.

Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery

Instructions in Appendix C.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Delete> key while the

system is booting up.

Note: In most cases, the <Delete> key is used to invoke the AMI BIOS

setup screen. There are a few cases when other keys are used, such as

<F1>, <F2>, etc.

Each main BIOS menu option is described in this manual. The AMI BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for a text message. When an option is selected in the

left frame, it is highlighted in white. Often a text message will accompany it.

Note: the AMI BIOS has default text messages built in. Supermicro retains

the option to include, omit, or change any of these text messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during the

setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow

keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Del> at the appropriate time during system boot.

4-1

X10SRH-CF/CLN4F Motherboard User’s Manual

How to Start the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen, below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall

Supermicro be liable for direct, indirect, special, incidental, or consequential damages

arising from a BIOS update. If you have to update the BIOS, do not shut down or reset

the system while the BIOS is updating to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS setup screen is shown below.

4-2

Chapter 4: AMI BIOS

The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or

System Time using the arrow keys. Enter new values using the keyboard. Press the

<Tab> key or the arrow keys to move between elds. The date must be entered in

Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears

as 17:30:00.

Supermicro X10SRH-CF/CLN4F

Version: This item displays the version of the BIOS ROM used in the system.

Build Date: This item displays the date when the version of the BIOS ROM used

in the system was built.

Memory Information

Total Memory: This item displays the total size of memory available in the system.

Memory Speed: This item displays the default speed of the memory modules

installed in the system.

4-3

X10SRH-CF/CLN4F Motherboard User’s Manual

4-3 Advanced Setup Congurations

Use the arrow keys to select Advanced setup and press <Enter> to access the

submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, a

very high DRAM frequency or an incorrect BIOS timing setting may cause the system

to malfunction. When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen display between POST messages or the OEM

logo at bootup. Select Disabled to display the POST messages. Select Enabled

to display the OEM logo instead of the normal POST messages. The options are

Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to

use the current AddOn ROM display setting. Select Force BIOS to use the Option

ROM display mode set by the system BIOS. The options are Force BIOS and

Keep Current.

Bootup Num-Lock State

Use this feature to set the Power-on state for the Numlock key. The options are

Off and On.

4-4

Chapter 4: AMI BIOS

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error

occurs. The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Inter-

rupt 19 at bootup immediately and allow the drives that are attached to these host

adaptors to function as bootable disks. If this item is set to Postponed, the ROM

BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the

drives attached to these adaptors to function as bootable devices at bootup. The

options are Immediate and Postponed.

Re-try Boot

When EFI Boot is selected, the system BIOS will automatically reboot the system

from an EFI boot device after its initial boot failure. Select Legacy Boot to allow

the BIOS to automatically reboot the system from a Legacy boot device after its

initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

DeepSx Power Policies

Use this item to congure the Advanced Conguration and Power Interface (ACPI)

settings for the system. Enable S3 to use Standby Mode (Suspend-to- RAM) and

maintain power supply to the system RAM when the system is in the sleep mode.

Enable S4 to use Hibernation mode (Suspend to Disk) so that all data stored in of

the main memory can be saved in a non-volatile memory area such as in a hard

drive and then power down the system. Enable S5 to power off the whole system

except the power supply unit (PSU) and keep the power button "alive" so that the

user can "wake-up" the system by using an USB keyboard or mouse. The options

are Disabled, Enabled in S5, Enabled in S4-S5, and Enabled in S3-S4-S5,

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inac-

tive for more than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed.

Select 4 Seconds Override for the user to power off the system after pressing and

holding the power button for 4 seconds or longer. Select Instant Off to instantly

power off the system as soon as the user presses the power button. The options

are 4 Seconds Override and Instant Off.

4-5

X10SRH-CF/CLN4F Motherboard User’s Manual

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for

the system power to remain off after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power-On,

Stay-Off and Last State.

CPU Conguration

Warning: Setting the wrong values in the following sections may cause the system

to malfunction.

CPU Conguration

The following CPU information will be displayed:

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• CPU 1 Version

Clock Spread Spectrum

Select Enabled to allow the BIOS to monitor and attempt to reduce the level of

Electromagnetic Interference caused by the components whenever needed. The

options are Disabled and Enabled.

Hyper-Threading (All)

4-6

Chapter 4: AMI BIOS

Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-

formance. The options are Enable and Disable.

Cores Enabled

Select Enabled to enable all CPU cores. The default setting is 0.

Execute-Disable Bit (Available if supported by the OS & the CPU)

Select Enable for Execute Disable Bit Technology support, which will allow the

processor to designate areas in the system memory where an application code can

execute and where it cannot, thus preventing a worm or a virus from ooding illegal

codes to overwhelm the processor to damage the system during an attack. This

feature is used in conjunction with the items: "Clear MCA," "VMX," "Enable SMX,"

and "Lock Chipset" for Virtualization media support. The options are Enable and

Disable. (Refer to Intel and Microsoft websites for more information.)

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in

the system. The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instruc-

tions from the main memory to the L2 cache to improve CPU performance. The

options are Disable and Enable.

Adjacent Cache Line Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

Note: Please reboot the system for changes on this setting to take effect.

Please refer to Intel’s website for detailed information.

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by

the CPU)

If set to Enable, the DCU Streamer Prefetcher will prefetch data streams from the

cache memory to the DCU (Data Cache Unit) to speed up data accessing and

processing to enhance CPU performance. The options are Disable and Enable.

DCU IP Prefetcher

If set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP

addresses to improve network connectivity and system performance. The options

are Enable and Disable.

4-7

X10SRH-CF/CLN4F Motherboard User’s Manual

DCU Mode

Use this feature to set the data-prefecting mode for the DCU (Data Cache Unit).

The options are 32KB 8Way Without ECC and 16KB 4Way With ECC.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to improve the

efciency of data transferring and accessing. The options are Auto, Enable, and

Disable.

DCA Prefetch Delay

A DCA Prefetcher is used with a TOE (TCP/IP Ofoad Engine) adapter to prefetch
data in order to shorten execution cycles and maximize data processing efciency.

Prefetching data too frequently can saturate the cache directory and delay neces­sary cache access. This feature reduces or increases the frequency the system
prefetches data. The options are [8], [16], [16], [24], [32], [40], [48], [56], [64], [72],
[80], [88], [96], [104], [112].

X2 APIC (Advanced Programmable Interrupt Controller)

Based on Intel's Hyper-Threading architecture, each logical processor (thread) is

assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to En-

able, the APIC ID will be expanded (X2) from 8 bits to 16 bits to provide 512 APIDs

to each thread to enhance CPU performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d sup­port by reporting the I/O device assignments to the VMM (Virtual Machine Monitor)

through the DMAR ACPI tables. This feature offers fully-protected I/O resource

sharing across Intel platforms, providing greater reliability, security and availability

in networking and data-sharing. The options are Enable and Disable

 Advanced Power Management Conguration

Advanced Power Management Conguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to customize

system power settings. Select Max Performance to optimize system performance.

Select Disabled to disable power-saving settings. The options are Disable, Energy

Efcient, and Custom.

4-8

Chapter 4: AMI BIOS

If the option is set to Energy Efcient or Custom, the following items will display:

Cong TDP (Conguring Thermal Design Power)

Select Enable to congure TDP power settings to enhance thermal management.

The options are Enable and Disable.

Cong TDP Level (Available when Cong TDP above is set to Enable)

Use this item to set TDP conguration level to enhance thermal management.

The options are Nominal, Level 1, and Level 2.

 CPU P State Control (Available when Power Technology
is set to Custom)

EIST (P-states)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically

adjust processor voltage and core frequency to reduce power consumption and

heat dissipation. The options are Disable and Enable.

Turbo Mode

Select Enabled to use the Turbo Mode to boost system performance. The options

are Enable and Disable.

P-state Coordination

This feature is used to change the P-state (Power-Performance State) coordi-

nation type. P-state is also known as "SpeedStep" for Intel processors. Select

HW_ALL to change the P-state coordination type for hardware components only.

Select SW_ALL to change the P-state coordination type for all software installed

in the system. Select SW_ANY to change the P-state coordination type for a soft-

ware program in the system. The options are HW_All, SW_ALL, and SW_ANY.

 CPU C State Control (Available when Power Technology
is set to Custom)

Package C State limit

Use this item to set the limit on the C-State package register. The options are

C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state.

CPU C3 Report

Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

4-9

X10SRH-CF/CLN4F Motherboard User’s Manual

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the

operating system. During the CPU C6 state, power to all cache is turned off.

The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly

reduce the CPU's power consumption by reducing the CPU's clock cycle and

voltage during a Halt-state. The options are Disable and Enable.

 CPU T State Control (Available when Power Technology
is set to Custom)

ACPI (Advanced Conguration Power Interface) T-States

Select Enable to support CPU throttling by the operating system to reduce power

consumption. The options are Enable and Disable.

 Socket RAPL (Running Average Power Limit) Conguration

FAST_RAPL_NSTRIKE_PL2_DUTY_CYCLE

This feature displays the value of the item above within the range between 25

(10%) and 64 (25%). The default setting is 64.

Turbo Power Limit Lock

Select Enable to set the power use limit for the machine when it is running in

the turbo mode. The options are Enable and Disable.

Long Power Limit Override

Select Enable to support long-term power limit override. If this feature is disabled,

BIOS will set the default value. The options are Enable and Disable.

Long Duration Power Limit

This item displays the power limit set by the user during which long duration

power is maintained. The default setting is 0.

Long Duration Time Window

This item displays the time window set by the user during which long duration

power is maintained. The default setting is 10.

4-10

Chapter 4: AMI BIOS

Package Clamping Limit1

Use this item to set the limit on power performance states for the runtime proces-

sor, with P0 being the state with the highest frequency (clock speed) and power

(consumption), and P1, a step lower in performance than P0, with its frequency

and voltage scaled back a notch. The options are Between P1/P0 and Below P1.

Short Duration Power Limit Enable

Select Enable to support Short Duration Power Limit (Power Limit 2). The options

are Enable and Disable.

Short Duration Power Limit

This item displays the time period during which short duration power is main-

tained. The default setting is 0.

Package Clamping Limit2

Use this item to set the limit on power performance states for the processor

operating in turbo mode, with P0 being the state with the highest frequency

(clock speed) and power (consumption), and P1, a step lower in performance

than P0, with its frequency and voltage scaled back a notch. The options are

Between P1/P0 and Below P1.

Chipset Conguration

Warning! Please set the correct settings for the items below. A wrong conguration

setting may cause the system to become malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

IIO Conguration

EV DFX (Device Function On-Hide) Feature

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a

processor will always remain clear during electric tuning. The options are Dis-

able and Enable.

IIO1 Conguration/IIO2 Conguration

IOU2 (II0 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, X8, and Auto.

4-11

X10SRH-CF/CLN4F Motherboard User’s Manual

PORT 1A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s) and

Gen 3 (Generation 3) (8 GT/s).

IOU0 (II0 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto

PORT 2A Link Speed

Use this item to congure the link speed of a PCI-E port specied by the user.

The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s)

and Gen 3 (Generation 3) (8 GT/s).

PORT 2C Link Speed

Use this item to congure the link speed of a PCI-E port specied by the user.

The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s)

and Gen 3 (Generation 3) (8 GT/s).

IOU1 (II0 PCIE Port 3)

Use this item to congure the PCI-E port Bifuraction setting for a PCI-E port speci-

ed by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

PORT 3A Link Speed

Use this item to congure the link speed of a PCI-E port specied by the user.

The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s)

and Gen 3 (Generation 3) (8 GT/s).

PORT 3C Link Speed

Use this item to congure the link speed of a PCI-E port specied by the user.

The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s)

and Gen 3 (Generation 3) (8 GT/s).

PORT 3D Link Speed

Use this item to congure the link speed of a PCI-E port specied by the user.

The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s)

and Gen 3 (Generation 3) (8 GT/s).

4-12

Chapter 4: AMI BIOS

IOAT (Intel® IO Acceleration) Conguration

Enable IOAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support, which

signicantly reduces CPU overhead by leveraging CPU architectural improve-

ments and freeing the system resource for other tasks. The options are Enable

and Disable.

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain

transactions to violate the strict-ordering rules of PCI bus for a transaction to

be completed prior to other transactions that have already been enqueued. The

options are Disable and Enable.

 Intel VT for Directed I/O (VT-d)

Intel VT for Direct I/O (VT-d)

®

VT for Directed I/O (VT-d)

Intel

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d
support by reporting the I/O device assignments to the VMM (Virtual Machine

Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O

resource sharing across Intel platforms, providing greater reliability, security and

availability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance.

The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct

Memory Access) to enhance system performance. The options are Enable and

Disable.

Coherency Support (Isoch)

Select Enable for the Iscoh VT-d engine to pass through ATS to enhance system

performance. The options are Enable and Disable.

4-13

X10SRH-CF/CLN4F Motherboard User’s Manual

QPI (Quick Path Interconnect) Conguration

QPI Status

The following information will display:

• Number of CPU

• Number of IIO

• Current QPI Link Speed

• Current QPI Link Frequency

• QPI Global MMIO Low Base/Limit

• QPI Global MMIO High Base/Limit

• QPI PCIe Conguration Base/Size

Link Speed Mode

Use this item to select the data transfer speed for QPI Link connections. The

options are Fast and Slow.

Link Frequency Select

Use this item to select the desired frequency for QPI Link connections. The op-

tions are 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto, and Auto Limited.

Link L0p Enable

Select Enable for Link L0p support. The options are Enable and Disable.

Link L1 Enable

Select Enable for Link L1 support. The options are Enable and Disable.

COD Enable (Available when the OS and the CPU support this feature)

Select Enabled for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Enable, Disable, and Auto.

Early Snoop (Available when the OS and the CPU support this feature)

Select Enabled for Early Snoop support to enhance system performance. The

options are Enable, Disable, and Auto.

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Chapter 4: AMI BIOS

Isoc Mode

Select Enabled for Isochronous support to meet QoS (Quality of Service) require-

ments. This feature is especially important for Virtualization Technology. The

options are Enable and Disable.

Memory Conguration

Enforce POR

Select Enable to enforce POR restrictions on DDR4 frequency and voltage

programming. The options are Enabled and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory

modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,

2200, 2400, 2600, 2667, and Reserved (Do not select Reserved).

ECC Support

Select Enable to allow additional output in the debug log to make machine pars-

ing easier. The options are Disable, Enable, and Auto.

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Auto, Disabled and Enabled.

Enable ADR

Select Enabled for ADR (Automatic Diagnostic Repository) support to enhance

memory performance. The options are Enabled and Disabled.

DRAM RAPL Baseline

Use this feature to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Set Throttling Mode

Throttling improves reliability and reduces power consumption in the proces-

sor via automatic voltage control during processor idle states. The options are

Disabled and CLTT (Closed Loop Thermal Throttling).

Socket Interleave Below 4GB

Select Enabled for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

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X10SRH-CF/CLN4F Motherboard User’s Manual

Channel Interleaving

Use this item to set DIMM channel interleaving mood. The options are Auto,

1-Way Interleave, 2-Way Interleave, 3-Way Interleave, and 4-Way Interleave.

Rank Interleaving

Use this item to select a rank memory interleaving method. The options are Auto,

1-Way, 2-Way, 4-Way, and 8-Way.

A7 Mode

Select Enabled to support the A7 (Addressing) mode to improve memory per-

formance. The options are Enable and Disable.

DIMM Information

This item displays the status of a DIMM module specied by the user.

• P1-DIMMA1 - P1-DIMMD1

• P2-DIMMA2 - P2-DIMMD2

Memory RAS (Reliability_Availability_Serviceability)

Conguration

Use this submenu to congure the following Memory RAS settings.

RAS Mode

When Disable is selected, RAS is not supported. When Mirror is selected, the

motherboard maintains two identical copies of all data in memory for data backup.

When Lockstep is selected, the motherboard uses two areas of memory to run

the same set of operations in parallel to boost performance. The options are

Disable, Mirror, and Lockstep Mode.

Lockstep x4 DIMMs

Select Enable to enable Lockstep support for x4 DIMM modules. The options

are Auto, Disabled, and Enabled.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve

memory performance. The options are Disabled and Enabled.

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Chapter 4: AMI BIOS

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected on a memory module and send the correction to the requestor

(the original source). When this item is set to Enabled, the IO hub will read and

write back one cache line every 16K cycles, if there is no delay caused by internal

processing. By using this method, roughly 64 GB of memory behind the IO hub

will be scrubbed every day. The options are Enable and Disable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before

the next complete patrol scrub is performed. Use the keyboard to enter a value

from 0-24. The Default setting is 24.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable

memory errors found on a memory module. When the CPU or I/O issues a

demand-read command, and the read data from memory turns out to be a

correctable error, the error is corrected and sent to the requestor (the original

source). Memory is updated as well. Select Enable to use Demand Scrubbing

for ECC memory correction. The options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable and Enable.



South Bridge Conguration

The following South Bridge information will display:



USB Conguration

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable

legacy support if there are no legacy USB devices present. Select Disable to have

all USB devices available for EFI applications only. The options are Enabled,

Disabled and Auto.

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X10SRH-CF/CLN4F Motherboard User’s Manual

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Ex-

tensible Host Controller Interface) hand-off. The XHCI ownership change should be

claimed by the XHCI driver. The settings are Enabled and Disabled.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

USB Mass Storage Driver Support

Select Enabled for USB mass storage device support. The options are Disabled

and Enabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide

complete legacy USB keyboard support for the operating systems that do not support

legacy USB devices. The options are Disabled and Enabled.

USB 3.0 Support

Select Enabled for USB 3.0 support. The options are Smart Auto, Auto, Enabled,

Disabled and Manual.

EHCI1

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #1 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

EHCI2

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #2 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

XHCI Pre-Boot Drive

Select Enabled to enable XHCI (Extensible Host Controller Interface) support on a

pre-boot drive specied by the user. The options are Enabled and Disabled.

XHCI Idle L1

Select Enabled for XHCI (Extensible Host Controller Interface) Idle Level 1 support on

a USB 3.0 connector specied by the user. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

PCH DMI ASPM

Select Enabled to enable ASPM (Active State Power Management) support for a

PCH DMI drive. The options are Disabled and Enabled.



SATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the Intel PCH chip and displays the fol-

lowing items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH chip. The options are Enabled and Disabled.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

*If the item above "Congure SATA as" is set to AHCI, the following items will display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the

particular SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

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X10SRH-CF/CLN4F Motherboard User’s Manual

Port 0 ~ Port 5 Hot Plug

Select Enabled to enable hot-plugging support for a port specied by the user,

which will allow the user to replace a SATA disk drive installed on this port without

shutting down the system. The options are Enabled and Disabled.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the

device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to IDE, the following items will
display:

Serial ATA Port 0~ Port 5

This item indicates that a SATA port specied by the user is installed (present)

or not.

Port 0 ~ Port 5 SATA Device Type (Available when a SATA port is

detected)

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure SATA as" is set to RAID, the following items will
display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

driver for system boot. The options are Disabled, EFI, and Legacy.

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Chapter 4: AMI BIOS

Serial ATA Port 0~ Port 5

This item displays the information detected on the installed SATA drives on the

particular SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Port 0 ~ Port 5 Hot Plug

Select Enabled to enable hot-plugging support for a port specied by the user,

which will allow the user to replace a SATA disk drive installed on this port without

shutting down the system. The options are Enabled and Disabled.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.



sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of

the SATA devices that are supported by the PCH-sSATA controller and displays

the following items:

sSATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH-sSATA controller. The options are Enabled and Disabled.

Congure sSATA as

Select IDE to congure an sSATA drive specied by the user as an IDE drive. Select

AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select

RAID to congure an sSATA drive specied by the user as a RAID drive. The op-

tions are IDE, AHCI, and RAID.

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X10SRH-CF/CLN4F Motherboard User’s Manual

*If the item above "Congure sSATA as" is set to AHCI, the following items will

display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

sSATA Port 0~ Port 3

This item displays the information detected on the installed on the sSATA port.

specied by the user.

• Model number of drive and capacity

• Software Preserve Support

sSATA Port 0~ Port 3

Select Enabled to enable an sSATA port specied by the user. The options are

Disabled and Enabled.

sSATA Port 0 ~ Port 3 Hot Plug

Select Enabled to enable hot-plugging support for a port specied by the user,

which will allow the user to replace a sSATA disk drive installed on this port

without shutting down the system. The options are Enabled and Disabled.

sSATA Port 0 ~ Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 3 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure sSATA as" is set to IDE, the following items will
display:

sSATA Port 0~ Port 3

This item indicates that an sSATA port specied by the user is installed (pres-

ent) or not.

4-22

Chapter 4: AMI BIOS

Port 0 ~ Port 3 sSATA Device Type (Available when a SATA port is

detected)

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

*If the item above "Congure sSATA as" is set to RAID, the following items will
display:

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link to a low power state when

the I/O is inactive for an extended period of time, and the power state will return

to normal when the I/O becomes active. The options are Enabled and Disabled.

sSATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

driver for system boot. The options are Disabled, EFI, and Legacy.

sSATA Port 0~ Port 3

This item displays the information detected on the installed sSATA drives on the

particular sSATA port.

• Model number of drive and capacity

• Software Preserve Support

sSATA Port 0~ Port 3

Select Enabled to enable an sSATA port specied by the user. The options are

Disabled and Enabled.

sSATA Port 0 ~ Port 3 Hot Plug

This feature designates this port for hot plugging. Set this item to Enabled for

hot-plugging support, which will allow the user to replace an sSATA drive without

shutting down the system. The options are Enabled and Disabled.

sSATA Port 0 ~ Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

Port 0 ~ Port 3 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

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X10SRH-CF/CLN4F Motherboard User’s Manual

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

• General ME Conguration

• Operational Firmware Version

• Recovery Firmware Version

• ME Firmware Features

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

VGA Palette Snoop

Select Enabled to support VGA palette register snooping which will allow a PCI

card that does not contain its own VGA color palette to examine a video card pal-

ette and mimic it for proper color display. The options are Disabled and Enabled.

PCI AER (Advanced Error-Reporting) Support

Select Enabled to support Advanced Error-Reporting for onboard PCI devices. The

options are Disabled and Enabled.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G

Address. The options are Enabled and Disabled.

SR-IOV (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled

and Disabled.

4-24

Chapter 4: AMI BIOS

Maximum Payload

Select Auto for the system BIOS to automatically set the maximum payload value

for a PCI-E device to enhance system performance. The options are Auto, 128

Bytes, and 256 Bytes.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read

request for a PCI-E device to enhance system performance. The options are Auto,

128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

ASPM Support

Use this item to set the Active State Power Management (ASPM) level for a PCI-E

device. Select Auto for the system BIOS to automatically set the ASPM level based

on the system conguration. Select Disabled to disable ASPM support. The options

are Disabled, and Auto.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

MMIOHBase

Use this item to select the base memory size according to memory-address map-

ping for the IO hub. The base memory size must be between 4032G to 4078G. The

options are 56T, 48T, 24T, 512G, and 256G.

MMIO High Size

Use this item to select the high memory size according to memory-address mapping

for the IO hub. The options are 256G, 128G, 512G, and 1024G.

PCH Slot2 PCI-E 2.0 x4 (In x8) (OPROM)/PCH Slot3 PCI-E 2.0 x2 (In x4) (OPROM)/CPU Slot4 PCI-E 3.0 x8 (OPROM)/CPU Slot5 PCI-E 3.0 x8 (OPROM)/CPU Slot6 PCI-E 3. x8 (In x16) (OPROM)/CPU Slot7 PCI-E 3.0 x4 (In x8) (OPROM)

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy

and EFI.

Onboard SAS Option ROM Type

Select Enabled to enable Option ROM support to boot the computer using a SAS

device specied by the user. The options are Disabled, Legacy and EFI.

Onboard LAN Option ROM Type

Select Enabled to enable Option ROM support to boot the computer using a

network device specied by the user. The options are Disabled, Legacy and EFI.

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X10SRH-CF/CLN4F Motherboard User’s Manual

Onboard LAN1 Option ROM/Onboard LAN2 Option ROM/Onboard LAN3 Option ROM/Onboard LAN4 Option ROM/Onboard Video Option ROM

Use this option to select the type of device installed in LAN Port1, LAN Por t2, LAN

Port3, LAN Port4, or the onboard video device used for system boot. The default

setting for LAN1 Option ROM is PXE, for LAN2 Option ROM, LAN3 Option ROM,

or LAN4 Option ROM is Disabled, and for Onboard Video Option ROM is Legacy.

VGA Priority

Use this item to select the graphics device to be used as the primary video display

for system boot. The options are Onboard and Offboard.

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Uni-

ed Extensible Firmware Interface) for net work stack support. The options are

Enabled and Disabled.

Ipv4 PXE Support (Available when Network Stack is set to Enabled)

Select Enabled to enable Ipv4 PXE (Preboot Execution Environment) for boot sup-

port. If this feature is set to Disabled, Ipv4 PXE boot option will not be supported.

The options are Enabled and Disabled.

Ipv6 PXE Support (Available when Network Stack is set to Enabled)

Select Enabled to enable Ipv6 PXE (Preboot Execution Environment) for boot sup-

port. If this feature is set to Disabled, Ipv6 PXE boot option will not be supported.

The options are Enabled and Disabled.

PXE boot wait time (Available when Network Stack is set to Enabled)

This item displays the boot wait time for a network device used to boot the system.

The default setting is 0.

Media detect time (Available when Network Stack is set to Enabled)

This item displays the wait time in seconds for the system to detect media. The

default setting is 0



Super IO Conguration

Super IO Chip AST2400



Serial Port 1 Conguration/Serial Port 2 Conguration

Serial Port 1/Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options

are Enabled and Disabled.

4-26