Supermicro X10SRG-F operation manual

X10SRG-F

USER’S MANUAL

Revision 1.0c

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our web site at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all
claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class B
digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reason­able protection against harmful interference in a residential installation. This equipment generates,
uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
manufacturer’s instruction manual, may cause interference with radio communications. However,
there is no guarantee that interference will not occur in a particular installation. If this equipment
does cause harmful interference to radio or television reception, which can be determined by turn­ing the equipment off and on, you are encouraged to try to correct the interference by one or more
of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and the receiver.

• Connect the equipment into an outlet on a circuit different from that to which the
receiver is connected.

• Consult the dealer or an experienced radio/television technician for help.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warn­ing applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product
may expose you to lead, a chemical known to the State of California
to cause birth defects and other reproductive harm.

Manual Revision 1.0c

Release Date: August 23, 2016

Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document. Information in this document is subject to change without notice.
Other products and companies referred to herein are trademarks or registered trademarks of their
respective companies or mark holders.

Copyright © 2016 by Super Micro Computer, Inc. All rights reserved.

Printed in the United States of America

Preface

This manual is written for system integrators, IT technicians and

knowledgeable end users. It provides information for the installation and use of the

X10SRG-F motherboard.

About This Motherboard

The X10SRG-F Motherboard supports a single Intel® E5-2600/1600 Series

Processor (LGA 2011 socket). With the Intel® C612 chipset built in, the X10SRG-

F motherboard offers exceptional system performance and storage capability.

Features such as ten SATA ports, support for up to 256GB RDIMM and 512GB

LRDIMM of memory, dual 1Gb LAN, and optimized Dual/Quad GPU solution make

the X10SRG-F series ideal for server platforms.

Please refer to our website (http://www.supermicro.com/products/) for processor

and memory support updates.

*This product is intended to be installed and serviced by professional technicians.

Manual Organization

Chapter 1 describes the features, specications and performance of the mother-

board, and provides detailed information on the Intel® 612 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules and other hardware components into the

system. If you encounter any problems, see Chapter 3, which describes trouble-

shooting procedures for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information

on running the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C contains the UEFI BIOS Recovery instructions.

Appendix D contains the Dual Boot Block instructions.

Preface

iii

X10SRG-F Motherboard User’s Manual

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and

to prevent damage done to the components or injury to yourself:

Warning: Critical information to prevent damage to the components or data loss.

Important: Important information given to ensure proper system installa-

tion or to relay safety precautions.

Note: Additional Information given to differentiate various models or pro-

vides information for correct system setup.

iv

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Web Site: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Web Site: www.supermicro.nl

Contacting Supermicro

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Web Site: www.supermicro.com.tw

v

X10SRG-F Motherboard User’s Manual

Table of Contents

Preface

Chapter 1 Introduction

1-1 Overview ......................................................................................................... 1-1

Checklist .......................................................................................................... 1-1

Motherboard Features ..................................................................................... 1-7

1-2 Chipset Overview ......................................................................................... 1-10

Intel C612 Chipset Features ......................................................................... 1-10

1-3 Special Features ............................................................................................1-11

Recovery from AC Power Loss ......................................................................1-11

1-4 PC Health Monitoring .....................................................................................1-11

Fan Status Monitor with Firmware Control ...................................................1-11

Environmental Temperature Control ..............................................................1-11

System Resource Alert ................................................................................. 1-12

1-5 ACPI Features ............................................................................................... 1-12

Slow Blinking LED for Suspend-State Indicator ........................................... 1-12

1-6 Power Supply ................................................................................................ 1-12

Chapter 2 Installation

2-1 Static-Sensitive Devices .................................................................................. 2-1

Precautions ..................................................................................................... 2-1

Unpacking ....................................................................................................... 2-1

2-2 Motherboard Installation .................................................................................. 2-2

Tools Needed .................................................................................................. 2-2

Location of Mounting Holes ............................................................................ 2-2

Installing the Motherboard .............................................................................. 2-3

2-3 Processor and Heatsink Installation................................................................ 2-4

Opening the LGA2011 Socket ....................................................................... 2-4

Installing the LGA2011 Processor .................................................................2-6

Installing a Passive CPU Heatsink ................................................................. 2-8

Removing the Heatsink ................................................................................... 2-9

2-4 Installing DDR4 Memory
2-10

DIMM Installation .......................................................................................... 2-10

Removing Memory Modules ......................................................................... 2-10

Memory Support .............................................................................................2-11

Memory Population Guidelines ......................................................................2-11

Memory Population Guidelines ..................................................................... 2-12

2-5 Connectors/IO Ports ...................................................................................... 2-14

vi

Table of Contents

Motherboard I/O Backpanel .......................................................................... 2-14

Universal Serial Bus (USB) ...................................................................... 2-15

Ethernet Ports (LAN1/LAN2) .................................................................... 2-16

IPMI Port (IPMI) ...................................................................................... 2-16

Serial Ports ............................................................................................... 2-16

VGA Connector (VGA) ............................................................................. 2-17

Unit Identier Switch (UID) ....................................................................... 2-17

Front Control Panel ....................................................................................... 2-18

Front Control Panel Pin Denitions............................................................... 2-19

Power LED .............................................................................................. 2-19

HDD LED .................................................................................................. 2-19

Power Fail LED ........................................................................................ 2-19

NIC1/NIC2 (LAN1/LAN2) .......................................................................... 2-20

Overheat (OH)/Fan Fail/Unit ID LED ....................................................... 2-20

NMI Button ............................................................................................... 2-21

Reset Button ........................................................................................... 2-21

Power Button ........................................................................................... 2-21

2-6 Connecting Cables & Optional Devices ........................................................ 2-22

Main PWR (JPW1) & GPU PWR Connectors (JPW2, JPW3) ................. 2-22

Fan Headers (FAN1~4, FANA~D) ............................................................ 2-23

Chassis Intrusion (JL1) ............................................................................ 2-23

Legacy Wake-On-LAN Header (JSTBY1) ................................................ 2-24

System Management Bus (JIPMB1) ................................................. 2-24

Power Supply I2C (JPI2C1) ..................................................................... 2-25

DOM PWR Connector (JSD1/JSD2) ........................................................ 2-25

I-SGPIO1/I-SGPIO2/S-SGPIO.................................................................. 2-26

TPM Header (JTPM1) .............................................................................. 2-26

Overheat/Fan Fail LED (JOH1) ........................................................ 2-27

Speaker (JD1) .......................................................................................... 2-27

Internal Buzzer (SP1) ............................................................................... 2-28

2-7 Jumper Settings ............................................................................................ 2-29

Explanation of Jumpers ................................................................................ 2-29

LAN Port Enable/Disable (JPL1) .............................................................. 2-29

Clear CMOS (JBT1) ................................................................................. 2-30

PCI Slot SMB Enable (JI2C1/JI2C2) ........................................................ 2-30

Watch Dog Reset (JWD1) ........................................................................ 2-31

VGA Enable (JPG1) ................................................................................. 2-31

BMC Enable/Disable (JPB1) .................................................................... 2-32

Manufacturer Mode Select (JPME2) ........................................................ 2-32

vii

X10SRG-F Motherboard User’s Manual

BIOS Recovery (JBR1) ............................................................................ 2-33

2

C Bus for VRM ....................................................................................... 2-33

I

2-8 Onboard Indicators ........................................................................................ 2-34

LAN Port LEDs ......................................................................................... 2-34

IPMI Heartbeat LED (LEDM1).................................................................. 2-34

Unit Identication LED (LE1) .................................................................... 2-35

Onboard Power LED (LE2) ..................................................................... 2-35

2-9 SATA Connections ......................................................................................... 2-36

SATA/SAS Connections ........................................................................... 2-36

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

Before Power On ............................................................................................ 3-1

No Power ........................................................................................................ 3-1

No Video ......................................................................................................... 3-2

Memory Errors ............................................................................................... 3-2

When You Lose the System’s Setup Conguration ........................................ 3-2

3-2 Technical Support Procedures ........................................................................ 3-3

3-3 Frequently Asked Questions ........................................................................... 3-4

3-4 Battery Removal and Installation .................................................................... 3-6

Battery Removal .............................................................................................. 3-6

Proper Battery Disposal .................................................................................. 3-6

Battery Installation ........................................................................................... 3-6

3-5 Returning Merchandise for Service................................................................. 3-7

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

Starting BIOS Setup Utility .............................................................................. 4-1

How To Change the Conguration Data ......................................................... 4-1

How to Start the Setup Utility ......................................................................... 4-2

4-2 Main Setup ...................................................................................................... 4-2

The following Main menu items will be displayed: ..................................... 4-2

System Date/System Time ........................................................................ 4-3

Supermicro X10SRG-F .............................................................................. 4-3

BIOS Version .............................................................................................. 4-3

Build Date ................................................................................................... 4-3

Memory Information ................................................................................... 4-3

Total Memory .............................................................................................. 4-3

Memory Speed ........................................................................................... 4-3

4-3 Advanced Setup Congurations...................................................................... 4-4



Boot Feature ................................................................................................. 4-4

viii

Table of Contents

Quiet Boot .................................................................................................. 4-4

AddOn ROM Display Mode ........................................................................ 4-4

Bootup Num-Lock ....................................................................................... 4-5

Wait For 'F1' If Error ................................................................................... 4-5

INT19 (Interrupt 19) Trap Response .......................................................... 4-5

Re-try Boot ................................................................................................. 4-5

Power Conguration ........................................................................................ 4-5

DeepSx Power Policies .............................................................................. 4-5

GP27 Wake From DeepSx ......................................................................... 4-5

Watch Dog Function ................................................................................... 4-6

Power Button Function ............................................................................... 4-6

Restore on AC Power Loss ........................................................................ 4-6



CPU Conguration ....................................................................................... 4-6

CPU1/CPU2 Conguration ......................................................................... 4-6

Clock Spread Spectrum ............................................................................. 4-7

Hyper-Threading (ALL) ............................................................................... 4-7

Cores Enabled ............................................................................................ 4-7

Execute Disable Bit (Available if supported by the OS & the CPU) .......... 4-7

PPIN Control .............................................................................................. 4-7

Hardware Prefetcher (Available when supported by the CPU) ................. 4-7

Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-7

DCU Streamer Prefetcher (Available when supported by the CPU) ......... 4-8

DCU IP Prefetcher...................................................................................... 4-8

Direct Cache Access (DCA) ....................................................................... 4-8

DCA Prefetch Delay ................................................................................... 4-8

X2APIC (Extended Advanced Programmable Interrupt Controller) ........... 4-8

AES-NI ........................................................................................................ 4-8

Intel Virtualization Technology .................................................................... 4-8

Advanced Power Management Conguration ............................................. 4-9

Chipset Conguration .................................................................................4-11

North Bridge ................................................................................................4-11

IIO Conguration .........................................................................................4-11

 Intel VT for Directed I/O (VT-d) ................................................................ 4-12

QPI (Quick Path Interconnect) Conguration ............................................ 4-12

COD Enable (Available when the OS and the CPU support this feature) .....

4-13



South Bridge ............................................................................................... 4-15

Legacy USB Support ................................................................................ 4-15

XHCI Hand-Off ......................................................................................... 4-15

ix

X10SRG-F Motherboard User’s Manual

EHCI Hand-Off ......................................................................................... 4-16

Port 60/64 Emulation ................................................................................ 4-16

USB 3.0 Support ...................................................................................... 4-16

EHCI1 ....................................................................................................... 4-16

EHCI2 ....................................................................................................... 4-16

XHCI Pre-Boot Driver ............................................................................... 4-16



SATA Conguration .................................................................................... 4-16

SATA Controller ........................................................................................ 4-16

Congure SATA as ................................................................................... 4-17



sSATA Conguration ................................................................................... 4-19

sSATA Controller ...................................................................................... 4-19

Congure sSATA as ................................................................................. 4-19

Server ME (Management Engine) Conguration ....................................... 4-20

PCIe/PCI/PnP Conguration ...................................................................... 4-21

The following PCI information will be displayed: ..................................... 4-21

PCI Latency Timer .................................................................................... 4-21

PCI-X Latency Timer ................................................................................ 4-21

PERR# Generation ................................................................................... 4-21

SERR# Generation ................................................................................... 4-21

PCI PERR/SERR Support ........................................................................ 4-21

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
4-21

SR-IOV Support (Available if the system supports Single-Root

Virtualization) ............................................................................................ 4-22

Maximum Payload .................................................................................... 4-22

Maximum Read Request .......................................................................... 4-22

ASPM Support .......................................................................................... 4-22

MMIOHBase ............................................................................................. 4-22

MMIO High Size ....................................................................................... 4-22

RSC-R1UFF-E16 CPU1 SLOT1 PCI-E x16 OPROM .............................. 4-22

RSC-R1UFF-E16 CPU1 SLOT2 PCI-E x16 OPROM .............................. 4-22

Onboard LAN Option ROM Type ............................................................. 4-23

Onboard LAN1 Option ROM .................................................................... 4-23

Onboard LAN2 Option ROM .................................................................... 4-23

Load Onboard SAS Option ROM ............................................................. 4-23

Onboard Video Option ROM .................................................................... 4-23

VGA Priority .............................................................................................. 4-23

Network Stack .......................................................................................... 4-23

Ipv4 PXE Support ..................................................................................... 4-23

Ipv6 PXE Support ..................................................................................... 4-23

x

Table of Contents

PXE Boot Wait Time ................................................................................. 4-23

Media Detect Time ................................................................................... 4-24



Serial Port 1 Conguration .................................................................... 4-24

Serial Port 1 ............................................................................................. 4-24

Device Settings ........................................................................................ 4-24

Change Port 1 Settings ............................................................................ 4-24



Serial Port 2 Conguration .................................................................... 4-24

Serial Port 2 ............................................................................................. 4-24

Device Settings ........................................................................................ 4-24

Change Port 2 Settings ............................................................................ 4-25

Serial Port 2 Attribute ............................................................................... 4-25



Serial Port Console Redirection ................................................................. 4-25

COM 1 Console Redirection .................................................................... 4-25

COM1 Console Redirection ....................................................................... 4-25

SOL/COM2 Console Redirection Settings ................................................. 4-27

Serial Port for Out-of-Band Management/Windows Emergency Management

Services (EMS) ........................................................................................ 4-29

EMS (Emergency Management Services) Console Redirection ............. 4-29



EMS Console Redirection Settings ............................................................ 4-29



ACPI Settings ............................................................................................. 4-31

Use this feature to congure Advanced Conguration and Power Interface

(ACPI) power management settings for your system. ............................... 4-31

WHEA Support ......................................................................................... 4-31

High Precision Timer ................................................................................ 4-31

NUMA Support (Available when the OS supports this feature) ............... 4-31

PCI AER Support ..................................................................................... 4-31

Trusted Computing (Available when a TPM device is installed and detected

by the BIOS) ................................................................................................. 4-32

Conguration ............................................................................................ 4-32

Security Device Support ........................................................................... 4-32

TPM State ................................................................................................ 4-32

Pending Operation ................................................................................... 4-32

Current Status Information ....................................................................... 4-32

Intel TXT (LT-SX) Conrguration ................................................................ 4-32

Intel® I350 Gigabit Network Connections ..................................................... 4-34

NIC Conguration ...................................................................................... 4-34

Blink LEDs ............................................................................................... 4-34

PORT CONFIGURATION INFORMATION ............................................... 4-34

Intel RSTe SATA Controller ........................................................................ 4-35

SATA RAID Legacy OpROM .................................................................... 4-35

xi

X10SRG-F Motherboard User’s Manual

UEFI SATA RAID ..................................................................................... 4-35

4-4 Event Logs .................................................................................................... 4-36

Change SMBIOS Event Log Settings ....................................................... 4-36

Enabling/Disabling Options ...................................................................... 4-36

SMBIOS Event Log .................................................................................. 4-36

Runtime Error Logging Support ............................................................... 4-36

Memory Corrected Error Enabling (Available when the item above-Runtime

Error Logging Support is set to Enable) .................................................. 4-36

Memory Correctable Error Threshold ....................................................... 4-36

PCI-Ex (PCI-Express) Error Enable ......................................................... 4-36

Erasing Settings ....................................................................................... 4-37

Erase Event Log ....................................................................................... 4-37

When Log is Full ...................................................................................... 4-37

SMBIOS Event Log Standard Settings .................................................... 4-37

Log System Boot Event ........................................................................... 4-37

MECI (Multiple Event Count Increment) .................................................. 4-37

METW (Multiple Event Count Time Window) ........................................... 4-37

4-5 IPMI ............................................................................................................... 4-38

IPMI Firmware Revision ........................................................................... 4-38

IPMI Status ............................................................................................... 4-38

System Event Log ..................................................................................... 4-38

Enabling/Disabling Options ...................................................................... 4-38

SEL Components ..................................................................................... 4-38

Erasing Settings ....................................................................................... 4-38

Erase SEL ................................................................................................ 4-38

When SEL is Full ...................................................................................... 4-39

BMC Network Conguration ...................................................................... 4-39

IPMI LAN Selection .................................................................................. 4-39

IPMI Network Link Status ......................................................................... 4-39

Update IPMI LAN Conguration ............................................................... 4-39

Conguration Address Source ................................................................. 4-39

4-6 Security Settings ........................................................................................... 4-41

Password Check ...................................................................................... 4-41

Administrator Password ........................................................................... 4-41

4-7 Boot Settings ................................................................................................. 4-42

Setup Prompt Timeout ............................................................................. 4-42

Boot Mode Select ..................................................................................... 4-42

Fixed Boot Order Priorities ....................................................................... 4-42

Add New Boot Option .............................................................................. 4-43

xii

Table of Contents

Boot Option File Path ............................................................................... 4-43



Delete Boot Option ................................................................................ 4-43



Hard Disk Drive BBS Priorities ............................................................. 4-43



Network Drive BBS Priorities ................................................................ 4-44



USB Key Drive BBS Priorities............................................................... 4-44



UEFI USB Key Drive BBS Priorities ..................................................... 4-44



UEFI Application Boot Priorities ............................................................ 4-44

4-8 Save & Exit ................................................................................................... 4-45

Discard Changes and Exit ...................................................................... 4-45

Save Changes and Reset ........................................................................ 4-45

Save Options ............................................................................................ 4-46

Save Changes .......................................................................................... 4-46

Discard Changes ...................................................................................... 4-46

Restore Defaults ....................................................................................... 4-46

Save As User Defaults ............................................................................. 4-46

Restore User Defaults .............................................................................. 4-46

Boot Override ........................................................................................... 4-46

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes .................................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Installing SuperDoctor5 ...................................................................................B-2

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

Appendix D Dual Boot Block on Grantley Platforms

D-1 IPMI GUI Browser ...........................................................................................D-2

D-2 IPMI Command Sets .......................................................................................D-7

User Approach ............................................................................................................D-9

xiii

X10SRG-F Motherboard User’s Manual

Notes

xiv

Chapter 1: Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention to

detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.

If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box:

• One (1) Supermicro Mainboard

• Six (6) SATA cables

• One (1) I/O shield

• One (1) User's Manual

1-1

X10SRG-F Motherboard User’s Manual

X10SRG-F Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

Revision available at the time of publishing of the manual. The motherboard

you've received may or may not look exactly the same as the graphics

shown in this manual.

1-2

X10SRG-F Motherboard Layout

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

I-SATA0

S-SGPIO

COM2

JVRM2

JVRM1

JBT1

JI2C2

JI2C1

VGA

JSTBY1

BMC

LE2

JBR1

COM1

JIPMB1

LEDM1

JPB1

JOH1

JBRSET1

BT1

JP3

JPME2

JWD1

Intel C610

X10SRG-F

REV:1.01
DESIGNED IN USA

1

JTPM1

JPG1

SP1

JD1

CPU

LGA2011-3

LAN2

JPL1

i350

USB 4/5

J23

LAN1

USB 6/7

JPF2

JPF1

Chapter 1: Introduction

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

JSD2

SXB2B

SATA DOM+POWER

I-SATA5

JPCIE2

JITP1

JP4

1

DIMMD2

DIMMC1

DIMMD1

DIMMC2

JPW1

FAN4

JPI2C1

FAN3

BIOS
LICENSE

BAR CODE

IPMI CODE

MAC CODE

1

PWR
ON

JF1

RST2NIC1NIC

DIMMB2

DIMMB1

OH
FF

DIMMA1

DIMMA2

PWRHDDXNMI

LEDLED

FAND

FANC

JF1

JPW2

FAN2

FAN1

JPW3

JL1

Important Notes to the User

• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

• " " indicates the location of "Pin 1".

• Jumpers not indicated are for testing only.

1-3

X10SRG-F Motherboard User’s Manual

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

X10SRG-F Motherboard Quick Reference

UID

SXB1A

LEDM1

JPB1

JOH1
LE2
SLOT3

JVRM1

JVRM2

SXB1B

S-SATA3

I-SATA3
I-SATA2
I-SATA1
I-SATA0

S-SGPIO
I-SGPIO1
I-SGPIO2

FANB

FANA

JPW1

JPI2C1

LE1

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

JBR1

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA 1

I-SATA0

S-SGPIO

JP4

1

JPW1

JPI2C1

FAN4

JIPMB1

VGA

COM2

COM2

JSTBY1

JSTBY1

JVRM2

JVRM1

JI2C2

JI2C1

JBR1

JBT1

JBT1

DIMMC1

DIMMC2

FAN4

FAN3

FAN3

BMC

JOH1

LE2

BT1

JI2C1
JI2C2

JP3

JWD1

Intel C610

X10SRG-F

REV:1.01
DESIGNED IN USA

DIMMD2

DIMMD1

COM1VGA1

COM1

JIPMB1

LEDM1

JPB1

JBRSET1

JPB1

BT1

JPME2

JWD1

CPU

1

LGA2011-3

BAR CODE

IPMI CODE

MAC CODE

LAN2

JTPM1

JPL1

JPL1

JPG1

SP1

JD1

JPME2

S-SATA2
S-SATA1
S-SATA0

BIOS
LICENSE

1

PWR
ON

LAN2

RST2NIC1NIC

JF1

i350

USB 4/5

DIMMB2

OH
FF

LAN1

LAN1

USB 6/7

JPF2

JPF1

J23

DIMMA1

DIMMB1

DIMMA2

PWRHDDXNMI

LEDLED

FAN2

USB0/1

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

I-SATA5

JITP1

FAN2

FAN1

IPMI LAN

SXB2A

JTPM1

JBRSET1

JPG1

USB4/5
USB2/3
USB6/7
USB8/9

SP1

JD1

JSD1

I-SATA4

JSD2

SXB2B

SATA DOM+POWER

JPCIE2

FAND

FANC

JSD2

SXB2B

I-SATA5

FAND
FANC

JF1

JPW2

FAN1

JPW3

JL1

JF1

JPW2

JPW3

JL1

1-4

Chapter 1: Introduction

X10SRG-F Motherboard Connectors

Connector Description

COM1/COM2 COM1: Rear Serial Port, COM2: Serial Header

FAN1~FAN4 System/CPU Fan Connectors

FAN A~FAN D I/O Fan Connectors

JD1 Speaker/Buzzer (Pins 1-3: Power LED, Pins 4-7: Speaker)

JF1 Front Panel Control Header

JI2C1 Power Supply SMBus I2C Header

JIPMB1 4-pin External BMC I2C Header

JL1 Chassis Intrusion Header

JOH1 Overheat LED/Fan Fail LED Header

JPW1 20-pin Main Power Connector

JPW2 8-pin Secondary Power Connector for the GPU

JPW3 8-pin 3rd Power Connector for the GPU (use as needed)

JSD1/JSD2 SATA Disk On Module (DOM) Power Connector

JSTBY1 Legacy Wake On LAN Header

JTPM1 Trusted Platform Module (TPM) Header

LAN1/LAN2 Gigabit RJ45 Ports

I-SATA0~I-SATA5 SATA 3.0 Connectors via Intel (6Gb/s)

S-SATA0~S-SATA3 SATA 3.0 Connectors via PCH (6Gb/s)

SLOT3 Slot for Supemicro riser card P/N RSC-R1UG-UR

SP1 Internal Speaker/Buzzer

SXB1A, SXB1B Slot for Supermicro riser card P/N RSC-R1UG-E16-UP,

RSC-R1UG-2E8G-UP

SXB2A, SXB2B Slot for Supermicro riser card P/N RSC-R1UG-E16R-UP,

RSC-R1UG-2E8GR-UP

I-SGPIO1, I-SGPIO2,

S-SGPIO

UID SW Unit ID Switch

USB0, USB1 Rear USB Ports

USB2/3, USB4/5,

USB6/7, USB8/9

VGA1 Rear VGA Port

Serial Link General Purpose I/O Headers (5V Gen1/Gen

2)

Internal USB Headers

1-5

X10SRG-F Motherboard User’s Manual

X10SRG-F Motherboard Jumpers

Jumper Description Default

JBR1 BIOS Recovery Pins 1-2 (Normal)

JBRSET1 FIQ Request Pins 1-2 (Normal)

JBT1 CMOS Clear See Chapter 2

JI2C1/JI2C2 SMB to PCI Slots Pins 1-2 (Enabled)

JPB1 BMC Enable Pins 1-2 (Enabled)

JPG1 Onboard VGA Enable Pins 1-2 (Enabled)

JPL1 LAN1/LAN2 Enable/Disable Pins 1-2 (Enabled)

JPME2 Intel Manufacturing Mode Select Pins 1-2 (Enabled)

JVRM1 VRM SMB Clock (to BMC or PCH) Pins 1-2 (BMC, Normal)

JVRM2 VRM SMB Data (to BMC or PCH) Pins 1-2 (BMC, Normal)

JWD1 Watch Dog Timer Reset Pins 1-2 (Reset)

X10SRG-F Motherboard LED Indicators

LED Description Color/State Status

LEDM1 IPMI Heartbeart Green: Blinking IPMI Normal

LE2 Power On LED Green: Solid On System is On/Running

LE1 Unit ID LED Blue: Solid On Unit ID Switch is On

1-6

Chapter 1: Introduction

Motherboard Features

CPU Single Intel® E5-2600/1600 Series Processor (LGA 2011

Socket R3)

Note: Both E5-2600v4 and E5-1600v4 re-

quire Revision 2.0 BIOS (or higher).

Memory Eight (8) DIMM slots support up to 256GB RDIMM or 512

LRDIMM of DDR4 ECC memory at 2400 MHz (max.).

DIMM sizes

RDIMM 2GB, 4GB, 8GB, 16GB, 32GB, 64GB

Chipset Intel® C612 Express Chipset

Expansion PCI Slots

Two (2) PCI-Express 3.0 x16 in x16 slots

One (1) PCI-Express 3.0 x8 in x16 slot

Network Connections Integrated LAN

Two (2) RJ45 LAN Ports

One (1) BMC LAN Port

I/O Devices SATA Connections

Ten (10) SATA ports

• AHCI controller supports six (6)

SATA3 devices compatible with

RAID 0, 1, 5, 10

• sSATA controller supports four

SATA 3.0 (6Gb/s)

(4) SATA3 devices compatible

with RAID 0, 1, 10

• RAID configurations cannot

cross the two (AHCI and sSA-

TA) controllers

SATA DOM Two (2) SATA DOM Ports (SATA 4/5)

USB Devices

Four (4) USB 3.0 Ports (2 rear, 2 header)

Five (5) USB 2.0 Ports (4 via header, 1 eUSB)

Serial (COM) Ports

One (1) rear port, One (1) header

1-7

X10SRG-F Motherboard User’s Manual

BIOS 128 Mb SPI AMI BIOS® SM Flash BIOS

Plug & Play, DMI 2.3, ACPI 1.0/2.0/3.0, USB Keyboard
and SMBIOS 2.5

Power Conguration ACPI/ACPM Power Management

CPU Fan Auto-off in Sleep Mode

Power-on mode for AC power recovery

PC Health Monitoring CPU & Chassis Monitoring

Onboard voltage monitors for CPU core, +1.05V, +3.3V,
+5V, +12V, +3.3V Stdby, +5V Stdby, VBAT, Memory,
Chipset

CPU 5-phase switching voltage regulator

CPU/System overheat LED and Thermal Control

CPU Thermal Trip support

CPU & Chassis Environment Monitor

Fan Control

Fan status monitoring with rmware 4-pin (Pulse Width

Modulation) fan speed control

Low noise fan speed control

System Management PECI (Platform Environment Conguration Interface) 3.0

Other ROHS (Full Compliance, Lead Free)

Dimensions 7.71" x 16.64"

support

System resource alert via SuperDoctor® 5

SuperDoctor® 5, Watch Dog, NMI

Chassis Intrusion header and detection

TPM 1.2 on board

DOM (Disk on Module) Power Connector Support

FCC B, WHQL

1-8

X10SRG-F Motherboard Block Diagram

Chapter 1: Introduction

RJ45

BMC Boot Flash

PCIe3.0 x8

SLOT3

(x8 in x16)

SLOT2

PCIe3.0 x16

SLOT1

LAN3

RTL8211E-VB-CG

DDR3

VGA CONN

W83773G at SMBUS

PCIe3.0 x16

RJ45

RJ45

SPI

Temp Sensor

RT1/RT2

#0-5

LAN
I350

RMII/NCSI

RGRMII

BMC

AST2400

COM1

Connector

#0-8

#0-7

#0-6

DDRIV

PCI-E X8 Gen3

PCI-E X16 Gen3

PCI-E X16 Gen3

PCI-E X4 Gen2

SPI

PCI-E X1 Gen2

COM2
Header

BIOS

MUX

USB 2.0

SPI

LPC

#1 #2

#5/6/7/8

SPI

#3

#13 USB2.0

TPM HEADER

Debug Card

FRONT PANEL

VR12.5
5 PHASE
145W

Skt-R3

LGA2011-3

#3

PCH

DMI2

DMI2

6.0 Gb/S

USB 2.0

USB 3.0

SYSTEM POWER

FAN SPEED

CTRL

#0-4

#0-3

#0-2

#0-1

DDRIV

9

8

7

6

5

4

3

2

1

0

SATA

7

6

5

4

3

2

USB

5

4

2

1

USB

System Block Diagram

Note: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features

pages for the actual specications of each motherboard.

1-9

X10SRG-F Motherboard User’s Manual

1-2 Chipset Overview

The Intel® C612 series is a single chip solution that is designed for dedicated

servers and workstations. It supports high-speed SATA and advanced require-

ments for Intel® Xeon platforms.

Intel C612 Chipset Features

• Direct Media Interface (up 5 Gt/s transfer, Full Duplex)

®

• Intel

• Intel

• Intel

Matrix Storage Technology and Intel Rapid Storage Technology

®

I/O Virtualization (VT-d) Support

®

Trusted Execution Technology Support

• PCI Express 2.0 Interface (up to 5.0 GT/s)

• SATA 3.0 ports (up to 6Gb/s)

• Advanced Host Controller Interface (AHCI)

Note: Both E5-2600v4 and E5-1600v4 require Revision 2.0 BIOS (or

higher).

1-10

Chapter 1: Introduction

1-3 Special Features

Recovery from AC Power Loss

Basic I/O System (BIOS) provides a setting for you to determine how the system

will respond when AC power is lost and then restored to the system. You can

choose for the system to remain powered off (in which case you must press the

power switch to turn it back on), or for it to automatically return to a power-on state.

See the Advanced BIOS Setup section to change this setting. The default setting

is Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the board. All have an

onboard System Hardware Monitoring chip that supports PC health monitoring. An

onboard voltage monitor will scan these onboard voltages continuously: CPU core,

+1.05V, +3.3V, +5V, +12V, +3.3V Stdby, +5V Stdby, VBAT, Memory and Chipset.

Once a voltage becomes unstable, a warning is given, or an error message is sent

to the screen. The user can adjust the voltage thresholds to dene the sensitivity

of the voltage monitor.

Fan Status Monitor with Firmware Control

PC health monitoring in the BIOS can check the RPM status of the cooling fans. The

onboard CPU and chassis fans are controlled by Thermal Management via BIOS

(under the Hardware Monitoring section in the Advanced Setting).

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn

on the thermal control fan whenever the CPU temperature exceeds a user-dened

threshold. The overheat circuitry runs independently from the CPU. Once the ther-

mal sensor detects that the CPU temperature is too high, it will automatically turn

on the thermal fans to prevent the CPU from overheating. The onboard chassis

thermal circuitry can monitor the overall system temperature and alert the user when

the chassis temperature is too high.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

1-11

X10SRG-F Motherboard User’s Manual

System Resource Alert

This feature is available when the system is used with SuperDoctor® 5 in the

Windows® OS environment or used with SuperDoctor II in Linux. SuperDoctor

is used to notify the user of certain system events. For example, you can also

congure SuperDoctor to provide you with warnings when the system temperature,

CPU temperatures, voltages and fan speeds go beyond predened thresholds.

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-

tion denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a PC system, including

its hardware, operating system and application software. This enables the system

to automatically turn on and off peripherals such as CD-ROMs, network cards, hard

disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also

provides a generic system event mechanism for Plug and Play, and an operating

system-independent interface for conguration control. ACPI leverages the Plug and

Play BIOS data structures, while providing a processor architecture-independent

implementation that is compatible with the Microsoft® Windows® series of Operat-

ing Systems.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start to blink

to indicate that the CPU is in suspend mode. When the user presses any key, the

CPU will "wake up", and the LED will automatically stop blinking and remain on.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

This motherboard accommodates 20-pin power supplies. Although most power sup-

plies generally meet the specications required by the CPU, some are inadequate.

In addition, the 12V 8-pin power connectors located at JPW2 and JPW3 are also

required to ensure adequate power to the GPU Add-on card.

Warning: To prevent damage to the power supply or motherboard, please use a

power supply that contains a 20-pin and an 8-pin power connectors. Failure in doing

so will void the manufacturer warranty on your power supply and motherboard. It is

1-12

Chapter 1: Introduction

strongly recommended that you use a high quality power supply that meets ower sup-

ply Specications 2.02 or above. It must also be SSI compliant. (For more information,

please refer to the web site at http://www.ssiforum.org/). Additionally, in areas where

noisy power transmission is present, you may choose to install a line lter to shield the

computer from noise. It is recommended that you also install a power surge protector

to help avoid problems caused by power surges.

1-13

X10SRG-F Motherboard User’s Manual

Notes

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electrostatic-Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your system board, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic

bag.

• Handle the board by its edges only; do not touch its components, peripheral

chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in

use.

• For grounding purposes, make sure your computer chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

• Use only the correct type of onboard CMOS battery. Do not install the onboard

battery upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When

unpacking the board, make sure that the person handling it is static protected.

2-1

X10SRG-F Motherboard User’s Manual

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

2-2 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Although a chassis may have both plastic and metal mounting fas-

teners, metal ones are highly recommended because they ground the motherboard

to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

Philips Screwdriver

USB 2/3

SXB2A

JPL_LAN0
JPL_LAN1

4

USB 0/1(3.0)

IPMI_LAN

JPL_LOM_DEV_OFF

LAN1

i350

LAN2

JTPM1

COM1

JIPMB1

VGA

COM2

1

JUIDB1

UID-SW

SXB1A

LE1

USB 4/5

JPL1

JPG1

JBRSET1

LEDM1

JPB1

JOH1

BMC

JSTBY1

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPF2

JPF1

USB 6/7

J23

SP1

BT1

LE2

JI2C1
JI2C2

JVRM2
JVRM1

JPCIE3

JSD1

USB 8/9(3.0)

JPME2
JWD1

JP3

JBR1

SATA DOM+POWER

I-SATA4

JD1

S-SATA2 S-SATA1

S-SATA3

Philips Screws

JPCIE2

SXB2B

SATA DOM+POWER

JSD2

I-SATA5

JITP1

Intel C610

JBT1

S-SATA0

JPCIE3

SXB1B

I-SATA3

I-SATA2I-SATA1

REV:1.01

X10SRG-F

I-SATA0

CPU

DESIGNED IN USA

S-SGPIO

1

LGA2011-3

Standoffs

FAND

FANC

1

JP4
1

DIMMA1
DIMMA2
DIMMB1
DIMMB2

DIMMD2
DIMMD1
DIMMC2
DIMMC1

JF1

JL1

JPW2

JPW3

FAN1

FAN2

PWRHDDXNMI

LEDLED
1

NIC

2

NIC

FF

OH

JF1

RST

PWR

ON

BIOS

LICENSE

IPMI CODE

BAR CODE

MAC CODE

FAN3

FAN4

JPW1

JPI2C1

Location of Mounting Holes

Warning: 1) To prevent damage to the motherboard and its components, please do

not use a force greater than 8 lb/inch on each mounting screw during motherboard

installation. 2) Some components are very close to the mounting holes. Please take

precautionary measures to avoid damaging these components when installing the

motherboard to the chassis.

2-2

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother-

board components.

6. Using the Philips screwdriver, insert a Pan head #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo-

nents might look different from those shown in this manual.

2-3

X10SRG-F Motherboard User’s Manual

2-3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on

the label area.

Notes:

• Always connect the power cord last, and always remove it before adding, re-

moving or changing any hardware components. Make sure that you install the

processor into the CPU socket before you install the CPU heatsink.

• If you buy a CPU separately, make sure that you use an Intel-certied multi-

directional heatsink only.

• Make sure to install the system board into the chassis before you install the

CPU heatsink.

• When receiving a server board without a processor pre-installed, make sure that

the plastic CPU socket cap is in place and none of the socket pins are bent;

otherwise, contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

Opening the LGA2011 Socket

1. There are two load levers on the LGA2011 socket. To open the socket cover,

rst press and release the load lever labeled 'Open 1st'.

WARNING!

OPEN 1st

1

Press down on

Lever 'Open 1st'

2-4

WARNING!

OPEN 1st

2

Load

Chapter 2: Installation

2. Press the second load lever labeled 'Close 1st' to release the load plate

which covers the CPU socket from its locking position.

Press down on

1

WARNING!

OPEN 1st

3. With the 'Close 1st' lever fully retracted, gently push down on the 'Open 1st'

lever to open the load plate. Lift the load plate to open it completely.

Lever 'Close 1st'

Load

Pull lever away from

2

the socket

WARNING!

OPEN 1st

1

Gently push down to pop

the load plate open

WARNING!

OPEN 1st

2-5

2

WARNING!

X10SRG-F Motherboard User’s Manual

Installing the LGA2011 Processor

WARNING!

1. With the LGA 2011 socket open, remove the 'WARNING' plastic cap using

your ngers.

Socket Keys

2. Use your thumb and index nger to hold the CPU on its edges. Align the CPU

keys (semi-circle cutouts) against the socket keys.

CPU Keys

Warning: You can only in-

stall the CPU inside the

socket in one direction.

Make sure that it is properly

inserted into the CPU socket

before closing the load plate.

If it doesn't close properly,

do not force it as it may

damage your CPU. Instead,

open the load plate again

and double-check that the

CPU is aligned properly.

2-6

Chapter 2: Installation

3. Once it is aligned, carefully lower the CPU straight down into the socket. (Do

not drop the CPU on the socket. Do not move the CPU horizontally or verti-

cally.

4. Do not rub the CPU against the surface or against any pins of the socket to

avoid damaging the CPU or the socket.)

5. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

6. To close and lock the socket, close the load plate with the CPU. Lock the

'Close 1st' lever rst, then lock the 'Open 1st' lever second. Use your thumb

to gently push the load levers down to the lever locks.

Push down and lock

'Close 1st' lever

2

Gently close

the load plate

1

Lever Lock

Push down and lock

'Open 1st' lever

OPEN 1st

3

OPEN 1st

4

OPEN 1st

Lever Lock

2-7

X10SRG-F Motherboard User’s Manual

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the Motherboard's and the Heatsink Bracket under-

neath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug

(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Screw#1

Motherboard

Screw#2

OPEN 1st

Mounting Holes

2-8

Chapter 2: Installation

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the heatsink, please follow the instructions below to prevent

damage to the CPU or the CPU socket.

1. Unscrew the heatsink screws from the motherboard in the sequence as shown

in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive

force when wriggling the heatsink!)

3. Once the heatsink is loosened, remove the heatsink from the CPU socket.

4. Remove the used thermal grease and clean the surface of the CPU and the

heatsink. Reapply the proper amount of thermal grease on the surface before

reinstalling the heatsink.

Loosen screws in
sequence as shown.

Screw#1

Motherboard

Screw#4

Screw#2

Screw#3

2-9

4

1

JVRM2

JVRM1

BMC

i350

JUIDB1

FANA

FANB

JTPM1

JOH1

LE2

LE1

LEDM1

S-SA

S-SA

I-SATA

JSTBY1

JPCIE3

JSD1

I-SGPIO2

I-SGPIO1

JIPMB1

JP3

JD1

JPL1

JPB1

JI2C2

JWD1

JPME2

JI2C1

JBRSET1

JBR1

JPL_LAN1

JPL_LAN0

JPL_LOM_DEV_OFF

JPG1

JVR

JPF1

JPF2

BT1

SP1

J23

USB 8/9(3.0)

USB 6/7

USB 4/5

USB 2/3

SATA DOM+POWE

UID-SW

COM2

IPMI_LAN

VGA

CPU SLOT3 PCI-E 3.0 X8(IN X16)

SXB2A

SXB1A

2

LEDLED

LAN1

LAN2

COM1

USB 0/1(3.0)

X10SRG-F Motherboard User’s Manual

2-4 Installing DDR4 Memory

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage.

Note: Check the Supermicro website for recommended memory modules.

DIMM Installation

1. Insert the desired number of DIMMs

into the memory slots, starting with

DIMMA1 (see the next page for the

location). For best performance,

please use the memory modules

of the same type and speed in the

same bank.

2. Push the release tabs outwards

on both ends of the DIMM slot to

unlock it.

3. Align the key of the DIMM mod-

ule with the receptive point on the

memory slot.

4. Align the notches on both ends of

the module against the receptive

5. Use two thumbs together to press

points on the ends of the slot.

the notches on both ends of the

module straight down into the slot

until the module snaps into place.

6. Press the release tabs to the lock

positions to secure the DIMM module

into the slot.

Removing Memory Modules

Reverse the steps above to remove the

DIMM modules from the motherboard.

CAUTION

TA2 S-SATA1

TA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

JBT1

I-SATA0

S-SGPIO

JP4

1

DIMMC1

DIMMC2

JPW1

FAN4

FAN3

JPI2C1

Release Tabs

Press both notches

4

R

JSD2

SATA DOM+POWER

BIOS
LICENSE

I-SATA5

JITP1

DIMMB1

NIC1NIC

DIMMA2

PWRHDDXNMI

DIMMA1

FAND

FANC

JF1

JPW2

FAN2

FAN1

JPW3

JL1

1

DIMMB2

JF1

PWR

OH

RST

FF

ON

DIMMD1

Intel C610

DIMMD2

X10SRG-F

REV:1.01
DESIGNED IN USA

CPU

1

LGA2011-3

BAR CODE

IPMI CODE

MAC CODE

Notches

straight down into

the memory slot.

SXB2B

JPCIE2

2-10

Chapter 2: Installation

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

Memory Support

The X10SRG-F motherboard supports up to 256GB RDIMM or 512 LRDIMM of

DDR4 ECC memory at 2400 MHz (max.) in eight (8) memory slots. Please refer

to the illustration below and the table on the next page:

Memory Population Guidelines

Edge of the motherboard

DIMMA1 (Blue Slot)

DIMMA2

DIMMB1 (Blue Slot)

DIMMB2

1

LGA2011-3

1

DIMMD2

DIMMD1 (Blue Slot)

DIMMC2
DIMMC1 (Blue Slot)

SXB2A

JPL_LAN0
JPL_LAN1

4

USB 0/1(3.0)

IPMI_LAN

JPL_LOM_DEV_OFF

LAN1

i350

LAN2

JPL1

JTPM1

COM1

JIPMB1

LEDM1

JPB1

JOH1

BMC

VGA

COM2

1

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JUIDB1

UID-SW

SXB1A

LE1

JPCIE2

SXB2B

SATA DOM+POWER

JSD2

SATA DOM+POWER

USB 2/3

USB 4/5

JPG1

JBRSET1

JSTBY1

JSD1

I-SATA4

I-SATA5

I-SATA3

Intel C610

JBT1

S-SATA0

JPCIE3

I-SATA2I-SATA1

JITP1

CPU

REV:1.01

DESIGNED IN USA

X10SRG-F

S-SGPIO

I-SATA0

USB 8/9(3.0)

JPF2

JPF1

USB 6/7

J23

JD1

SP1

JPME2
JWD1

BT1

JP3

LE2

JBR1

JI2C1
JI2C2

JVRM2

JVRM1

JPCIE3

S-SATA2 S-SATA1

SXB1B

S-SATA3

FAND

FANC

JF1

DIMMA1
DIMMA2
DIMMB1
DIMMB2

1

LGA2011-3

1

DIMMD2
DIMMD1
DIMMC2
DIMMC1

JP4
1

JL1

JPW2

JPW3

FAN1

FAN2

PWRHDDXNMI

LEDLED
1

NIC

2

NIC

FF

OH

JF1

RST

PWR

ON

BIOS

LICENSE

IPMI CODE

BAR CODE

MAC CODE

FAN3

FAN4

JPW1

JPI2C1

2-11

X10SRG-F Motherboard User’s Manual

Memory Population Guidelines

When installing memory modules, the DIMM slots should be populated in the follow-

ing order: DIMMA1, DIMMB1, DIMMC1, DIMMD1 then DIMMA2, DIMMB2, DIMMC2,

DIMMD2.

• Always use DDR4 DIMM modules of the same size, type and speed.

• Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed

of the slowest DIMM.

• The motherboard will support odd-numbered modules (1, 3, 5, or 7 modules in-

stalled). However, for best memory performance, install DIMM modules in pairs

to activate memory interleaving.

Recommended Population (Balanced)

DIMMA1 DIMMB1 DIMMC1 DIMMD1 DIMMA2 DIMMB2 DIMMC2 DIMMD2 Total

2GB 2GB 4GB

2GB 2GB 2GB 2GB 8GB

2GB 2GB 2GB 2GB 2GB 2GB 12GB

2GB 2GB 2GB 2GB 2GB 2GB 2GB 2GB 16GB

4GB 4GB 8GB

4GB 4GB 4GB 4GB 16GB

4GB 4GB 4GB 4GB 4GB 4GB 24GB

4GB 4GB 4GB 4GB 4GB 4GB 4GB 4GB 32GB

8GB 8GB 16GB

8GB 8GB 8GB 8GB 32GB

8GB 8GB 8GB 8GB 8GB 8GB 64GB

8GB 8GB 8GB 8GB 8GB 8GB 8GB 8GB 128GB

16GB 16GB 32GB

16GB 16GB 16GB 16GB 64GB

16GB 16GB 16GB 16GB 16GB 16GB 96GB

16GB 16GB 16GB 16GB 16GB 16GB 16GB 16GB 128GB

32GB 32GB 64GB

32GB 32GB 32GB 32GB 128GB

32GB 32GB 32GB 32GB 32GB 32GB 192GB

32GB 32GB 32GB 32GB 32GB 32GB 32GB 32GB 256GB

System
Memory

2-12

Chapter 2: Installation

Ranks Per

and

Speed (MT/s); Voltage

(DPC)

1 Slot Per

LRDIMM

3DS

Ranks Per

and

Speed (MT/s); Voltage (V);

Channel (DPC)

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v3-based Motherboard

(V);

Slot Per Channel (SPC)

DIMM Capacity

DIMM

Type

Data

Width

RDIMM SRx4 8GB 16GB

(GB)

4Gb 8Gb

and DIMM Per Channel

Channel

1DPC 1DPC 2DPC

1.2V 1.2V 1.2V

2133 2133 1866

2 Slots Per Channel

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

8Rx4 64GB 128GB

†

2133 2133 1866

2133 2133 1866

2133 2133 1866

2133 2133 2133

2133 2133 2133

Populating RDIMM/LRDIMM DDR4 Memory Modules for the E5­2600v4-based Motherboard

Slot Per Channel (SPC) and DIMM Per

DIMM Capacity

DIMM

Type

Data

Width

RDIMM SRx4 8GB 16GB

RDIMM SRx8 4GB 8GB

RDIMM DRx8 8GB 16GB

RDIMM DRx4 16GB 32GB

LRDIMM QRx4 32GB 64GB

LRDIMM

8Rx4 64GB 128GB

3DS

(GB)

4Gb 8Gb

1 Slot Per

Channel

1DPC 1DPC 2DPC

1.2V 1.2V 1.2V

2400 2400 2133

2400 2400 2133

2400 2400 2133

2400 2400 2133

2400 2400 2400

2400 2400 2400

2 Slots Per Channel

2-13

X10SRG-F Motherboard User’s Manual

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

2-5 Connectors/IO Ports

The I/O ports are color coded in conformance with the industry standards. See the

gure below for the colors and locations of the various I/O ports.

Motherboard I/O Backpanel

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

I-SATA0

S-SGPIO

JVRM1

COM2

JVRM2

JBT1

COM1

VGA

JIPMB1

JTPM1

BMC

LEDM1

JPL1

JPB1

JOH1

JBRSET1

JPG1

JSTBY1

LE2

BT1

JI2C2

SP1

JI2C1

JP3

JBR1

JPME2

JWD1

JD1

Intel C610

X10SRG-F

REV:1.01
DESIGNED IN USA

CPU

1

LGA2011-3

LAN2

i350

USB 4/5

4

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

USB 6/7

JPF2

JPF1

J23

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

JSD2

SXB2B

SATA DOM+POWER

I-SATA5

JPCIE2

JITP1

JP4

1

JPW1

JPI2C1

1

4

5

2

3

Motherboard I/O Backpanel

1. IPMI LAN 5. LAN2

2. USB 3.0 Port 0 6. COM1

3. USB 3.0 Port 1 7. VGA

4. LAN1

DIMMD2

DIMMC1

DIMMD1

DIMMC2

BAR CODE

FAN4

IPMI CODE

FAN3

MAC CODE

6 7

2-14

BIOS
LICENSE

1

DIMMB2

DIMMA1

DIMMB1

DIMMA2

JF1

PWR

RST2NIC1NIC

OH

PWRHDDXNMI

ON

FF

LEDLED

FAND

FANC

JF1

JPW2

FAN2

FAN1

JPW3

JL1

Chapter 2: Installation

3

SXB1B

Universal Serial Bus (USB)

Two (2) Universal Serial Bus 3.0 ports

are located on the I/O back panel.

There are also six (6) USB 2.0 ports

and two (2) USB 3.0 ports on the

motherboard that may be used to pro-

vide front chassis access using USB

cables (not included). See the tables

below for pin denitions.

Pin# Pin# Signal Name Description

1 10 VBUS Power

1. Back Panel USB 3.0 (USB 0)

2. Back Panel USB 3.0 (USB 1)

3. Front Panel USB 2.0 (USB 2/3)

4. Front Panel USB 2.0 (USB 4/5)

5. Front Panel USB 2.0 (USB 6/7)

6. Front Panel USB 3.0 (USB 8/9)

2 11 D- USB 2.0 Differential Pair

3 12 D+

4 13 Ground Ground of PWR Return

5 14 StdA_SSRX- SuperSpeed Receiver

6 15 StdA_SSRX+ Differential Pair

7 16 GND_DRAIN Ground for Signal Return

8 17 StdA_SSTX- SuperSpeed Transmitter

9 18 StdA_SSTX+ Differential Pair

1

2

Front Panel USB (2.0)

Header Pin Denitions

Pin # Denition Pin # Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 Ground

Back Panel USB (3.0)

Pin Denitions

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2

S-SATA

COM2

JVRM2

JVRM1

JI2C2

VGA

JSTBY1

JI2C1

JBR1

BMC

LE2

JOH1

BT1

JP3

LEDM1

JPB1

JBRSET1

JWD1

COM1

JIPMB1

SP1

JPME2

JD1

JTPM1

JPL1

JPG1

4

LAN2

USB 4/5

i350

J23

LAN1

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

I-SATA4

3

5

6

JSD1

SATA DOM+POWER

2-15

X10SRG-F Motherboard User’s Manual

3

SXB1B

Ethernet Ports (LAN1/LAN2)

Two Ethernet ports (LAN1/LAN2) are

located next to the USB ports on the

I/O backpanel. These ports provide

networking connectivity with speeds

up to 1Gb/s. Please see the table on

the left for the pin denitions.

IPMI Port (IPMI)

In addition to the two Ethernet ports

(LAN1/LAN2) this motherboard also

features an IPMI port. This provides

remote system management ac-

cess through a standard IP protocol

network.

Serial Ports

One COM port (COM1) is provided

on the motherboard, located on the

I/O backpanel. In addition to the

COM port, a COM header (COM2) is

located next to the VGA port. See the

table on the right for pin denitions.

LAN Ports

Pin Denition

Pin# Denition Pin# Denition

1 TD0- 10 SGND

2 TD0+ 11 P3V3SB

3 TD1- 12 Act LED

4 TD1+ 13 Link 100 LED

5 TD2- 14 Link 1000 LED

(Green, +3V3SB)

(Yellow, +3V3SB)

6 TD2+ 15 Ground

7 TD3- 16 Ground

8 TD3+ 17 Ground

9 P2V5SB 18 Ground

(NC: No Connection)

Serial Ports-COM1

Pin Denitions

Pin # Denition Pin # Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

1

2 3

4

1. IPMI Port

2. LAN1

3. LAN2

4. COM1

A. COM2

A

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2

S-SATA

JVRM1

COM2

JVRM2

JI2C2

JI2C1

VGA

JSTBY1

JBR1

COM1

JIPMB1

JTPM1

BMC

LEDM1

JPL1

JPB1

JOH1

JBRSET1

JPG1

LE2

BT1

SP1

JP3

JPME2

JWD1

JD1

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

i350

JPL_LAN0

JPL_LAN1

USB 2/3

USB 4/5

USB 6/7

JPF2

JPF1

J23

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

2-16

Chapter 2: Installation

VGA Connector (VGA)

A Video (VGA/CRT) connector is

located next to COM Port1 on the I/O

backpanel. This connector is used to

provide video and CRT display.

Unit Identier Switch (UID)

The Unit ID Switch is located near

COM2. When the Unit ID Switch is

turned on, both the blue rear Unit

ID LED and front panel Unit LED on

JF1 (if attached to the front Unit ID

LED on the chassis, see page 2-19)

will activate. Push the Unit ID Switch

again to turn off both Indicators.

These Unit ID LED Indicators provide

easy identication of the system unit,

when installed in a server cabinet for

instance. See also Unit ID LED on

page 2-19.

VGA Pin

Denitions

Pin# Denition Pin# Denition

1 Red 10 Ground

2 Green 11 NC

3 Blue 12 MS1: SDA (DDC Data)

4 NC 13 HSYNC

5 Ground 14 VSYSNC

6 Ground 15 MS3: SCL (DDC CLK)

7 Ground 16 Case

8 Ground 17 Case

9 5V

NC= No Connection

1. VGA

2-17

1

JF1 contains header pins for various buttons and indicators that are normally lo-

X10SRG-F

REV:1.01
DESIGNED IN USA

4

1

JVRM2

JVRM1

Intel C610

BMC

i350

JUIDB1

FANA

FANB

JTPM1

JOH1

LE2

LE1

LEDM1

S-SATA3

S-SATA2 S-SATA1

S-SATA0

I-SATA4

I-SATA3

I-SATA5

I-SATA2I-SATA1

I-SATA0

JSTBY1

JPCIE2

JPCIE3

JSD1

JSD2

I-SGPIO2

I-SGPIO1

S-SGPIO

JIPMB1

JP3

JD1

JPL1

JPB1

JI2C2

JWD1

JPME2

JI2C1

JBRSET1

JBR1

JPL_LAN1

JPL_LAN0

JPL_LOM_DEV_OFF

JPG1

JVR

JPF1

JPF2

BT1

SP1

JITP1

J23

JPCIE3

SXB1B

USB 8/9(3.0)

USB 6/7

USB 4/5

USB 2/3

SATA DOM+POWER

SATA DOM+POWER

UID-SW

COM2

IPMI_LAN

VGA

CPU SLOT3 PCI-E 3.0 X8(IN X16)

SXB2B

SXB2A

SXB1A

JBT1

LAN1

LAN2

COM1

USB 0/1(3.0)

CPU

LGA2011-3

1

1

2

1920

cated on a control panel at the front of the chassis. These connectors are designed

specically for use with Supermicro server chassis. See the gure below for the

descriptions of the various control panel buttons and LED indicators. Refer to the

following section for descriptions and pin denitions.

X10SRG-F Motherboard User’s Manual

Front Control Panel

Ground

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

Power Fail LED

Ground

Ground

X

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

PWR

Reset Button

Power Button

JF1 Header Pins

JP4

1

JPW1

JPI2C1

FAN4

FAN3

DIMMC1

DIMMD1

DIMMC2

1

DIMMD2

BAR CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

PWR

RST2NIC1NIC

ON

JF1

DIMMB2

DIMMB1

DIMMA2

OH
FF

LEDLED

DIMMA1

FAN2

PWRHDDXNMI

FAND

FANC

JF1

JPW2

FAN1

JPW3

JL1

2-18

1920

Front Control Panel Pin Denitions

Chapter 2: Installation

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

HDD LED

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach a

cable here to indicate the status of

HDD-related activities, including IDE,

SATA activities. See the table on the

right for pin denitions.

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Refer

to the table on the right for pin deni-

tions.

A. PWR LED

B. HDD LED

C. PWR Fail LED

Power LED

Pin Denitions (JF1)

Pin# Denition

15 +5V

16 Ground

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 +5V

14 HD Active

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 Vcc

6 Ground

Power LED

Status

State Denition

Off System Off

On System Running

HDD LED

Status

State Denition

Off No Activity

Blinking HDD Busy

Power Fail LED

Status

State Denition

Off Normal

On Power Failure

Ground

Power LED

A

B

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

Power Fail LED

C

X

Ground

Ground

NMI

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

Reset Button

Power Button

PWR

2

1

2-19

X10SRG-F Motherboard User’s Manual

1920

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Control-

ler) LED connection for LAN port 1

is located on pins 11 and 12 of JF1,

and the LED connection for LAN Port

2 is on Pins 9 and 10. NIC1 LED and

NIC2 LED are 2-pin NIC LED head-

ers. Attach NIC LED cables to NIC1

and NIC2 LED indicators to display

network activity. Refer to the table on

the right for pin denitions.

Overheat (OH)/Fan Fail/Unit ID LED

Connect an LED cable to pins 7 and 8

of the Front Control Panel to use the

Unit ID LED, Overheat, and Fan Fail.

Refer to the table on the right for pin

denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9/11 Vcc

10/12 Ground

OH/Fan Fail/Blue UID

LED Pin Denitions (JF1)

Pin# Denition

7 Blue UID LED

8 Red_LED-Cathode/OH/Fan Fail

OH/Fan Fail

LED Status (Red LED)

State Denition

Off Normal

On Overheat

Flashing
1 Hz

Fan Fail

NIC LED

Status

State Denition

Off No Activity

Blinking NIC Busy

Blue UID LED

Status

State Denition

Off UID Off

On UID On

Power LED

A

B

C

OH/Fan Fail LED

Power Fail LED

Ground

HDD LED

NIC1 LED

NIC2 LED

Ground

Ground

A. NIC1 LED

NMI

X

X

B. NIC2 LED

C. OH/Fan Fail/UID LED

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

Reset Button

Power Button

PWR

2

1

2-20

Chapter 2: Installation

1920

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

Reset Button

The Reset Button connection is lo-

cated on pins 3 and 4 of JF1. Momen-

tarily contacting both pins will hard re-

set the system. Attach it to a hardware

reset switch on the computer case to

reset the system. Refer to the table on

the right for pin denitions.

Power Button

The Power Button connection is locat-

ed on pins1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. This button can also be

congured to function as a suspend

button (with a setting in the BIOS - see

Chapter 4). To turn off the power in the

suspend mode, press the button for at

least 4 seconds. Refer to the table on

the right for pin denitions.

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 +3V Standby

A. NMI Button

B. Reset Button

C. PWR Button

Ground

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

Power Fail LED

Ground

Ground

A

NMI

X

2

1

X

P3V3

UID SW

P3V3_STB

P3V3_STB

UID LED

P3V3

Reset

PWR

Reset Button

Power Button

B

C

2-21

X10SRG-F

REV:1.01
DESIGNED IN USA

4

1

JVRM2

JVRM1

Intel C610

BMC

i350

JUIDB1

FANA

FANB

JTPM1

JOH1

LE2

LE1

LEDM1

S-SATA3

S-SATA2 S-SATA1

S-SATA0

I-SATA4

I-SATA3

I-SATA5

I-SATA2I-SATA1

I-SATA0

JSTBY1

JPCIE2

JPCIE3

JSD1

JSD2

I-SGPIO2

I-SGPIO1

S-SGPIO

JIPMB1

JP3

JD1

JPL1

JPB1

JI2C2

JWD1

JPME2

JI2C1

JBRSET1

JBR1

JPL_LAN1

JPL_LAN0

JPL_LOM_DEV_OFF

JPG1

JVR

JPF1

JPF2

BT1

SP1

JITP1

J23

JPCIE3

SXB1B

USB 8/9(3.0)

USB 6/7

USB 4/5

USB 2/3

SATA DOM+POWER

SATA DOM+POWER

UID-SW

COM2

IPMI_LAN

VGA

CPU SLOT3 PCI-E 3.0 X8(IN X16)

SXB2B

SXB2A

SXB1A

JBT1

LAN1

LAN2

COM1

USB 0/1(3.0)

CPU

LGA2011-3

1

X10SRG-F Motherboard User’s Manual

2-6 Connecting Cables & Optional Devices

This section provides brief descriptions and pin-out denitions for onboard headers

and connectors. Be sure to use the correct cable for each header or connector.

Main PWR (JPW1) & GPU PWR Connectors (JPW2, JPW3)

The 20-pin proprietary main power

connector (JPW1) is used to provide

power to the motherboard. The 8-pin

GPU PWR connector JPW2 is also

required for the graphics processor.

JPW3 is used if additional power to

the GPU is needed for per formance

boost. These power connectors meet

the SSI EPS 12V specication. See

the table on the right for pin deni-

tions.

12V 8-pin Power Connec-

Pins Denition

1 through 3 +12V

4 through 8 Ground

JP4

1

A

tor Pin Denitions

(Required)

JPW1

JPI2C1

FAN4

FAN3

BAR CODE

IPMI CODE

MAC CODE

BIOS
LICENSE

1

JF1

PWR

RST2NIC1NIC

ON

DIMMD2

DIMMC1

DIMMD1

DIMMC2

20-pin Power Connector

Pin Denitions (JPW1)

Pin# Denition Pin # Denition

11 PS_ON_N 1 GND1

12 5V STBY 2 GND2

13 GND6 3 GND3

14 GND7 4 GND4

15 GND8 5 GND5

16 NC2 6 NC1

17 12V_5 7 12V_1

18 12V_6 8 12V_2

19 12V_7 9 12V_3

20 12V_8 10 12V_4

A. 20-Pin Main PWR

B. 8-Pin GPU PWR (JPW2)

C. 8-Pin GPU PWR (JPW3)

FAND

FANC

DIMMB2

DIMMA1

DIMMB1

OH

FF

DIMMA2

PWRHDDXNMI

LEDLED

FAN2

JF1

JPW2

FAN1

JPW3

B

C

JL1

2-22

Chapter 2: Installation

X10SRG-F

REV:1.01
DESIGNED IN USA

4

1

JVRM2

JVRM1

Intel C610

BMC

i350

JUIDB1

FANA

FANB

JTPM1

JOH1

LE2

LE1

LEDM1

S-SATA3

S-SATA2 S-SATA1

S-SATA0

I-SATA4

I-SATA3

I-SATA5

I-SATA2I-SATA1

I-SATA0

JSTBY1

JPCIE2

JPCIE3

JSD1

JSD2

I-SGPIO2

I-SGPIO1

S-SGPIO

JIPMB1

JP3

JD1

JPL1

JPB1

JI2C2

JWD1

JPME2

JI2C1

JBRSET1

JBR1

JPL_LAN1

JPL_LAN0

JPL_LOM_DEV_OFF

JPG1

JPF1

JPF2

BT1

SP1

JITP1

J23

JPCIE3

SXB1B

USB 8/9(3.0)

USB 6/7

USB 4/5

USB 2/3

SATA DOM+POWER

SATA DOM+POWER

UID-SW

COM2

IPMI_LAN

VGA

CPU SLOT3 PCI-E 3.0 X8(IN X16)

SXB2B

SXB2A

SXB1A

JBT1

LAN1

LAN2

COM1

USB 0/1(3.0)

CPU

Fan Headers (FAN1~4, FANA~D)

The X10SRG-F series has eight (8)

fan headers (Fan 1~Fan 4 and Fan

headers. Though Pins 1-3 of the fan

A~Fan D). These fans are 4-pin fan

headers are backward compatible

with traditional 3-pin fans, it is recom-

mended that 4-pin fans are used to al-

low the fan speed control setting in the

BIOS Hardware Monitoring section (if

set) to automatically adjust fan speeds

based on the system temperature.

Refer to the table on the right for pin

denitions.

Chassis Intrusion (JL1)

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach the

appropriate cable from the chassis to

inform you of a chassis intrusion when

the chassis is opened.

B

A

JVR1

JP4

1

LGA2011-3

1. Fan 1

2. Fan 2

3. Fan 3

4. Fan 4

1

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM_Control

Fan Header

Recommended Usage

Fan# Denition

1~4 CPU/System

A~D I/O & Addon Cards

Chassis Intrusion

Pin Denitions (JL1)

Pin# Denition

1 Intrusion Input

2 Ground

A. Fan A

B. Fan B

C. Fan C

D. Fan D

E. Chassis Intrusion

FAND

D

FANC

C

JPW1

JPI2C1

DIMMD2

DIMMC1

DIMMD1

DIMMC2

BAR CODE

FAN4

FAN3

3

4

IPMI CODE

MAC CODE

BIOS
LICENSE

PWR

RST2NIC1NIC

ON

JF1

DIMMB2

DIMMB1

DIMMA2

OH
FF

LEDLED

DIMMA1

PWRHDDXNMI

JF1

JPW2

FAN2

FAN1

JPW3

JL1

12

E

2-23

X10SRG-F Motherboard User’s Manual

S-SATA3

S-SATA2 S-SATA1

I-SATA4

JWD1

JPME2

DOM+POWER

Legacy Wake-On-LAN Header

(JSTBY1)

The onboard LANs (LAN1 and LAN2)

do not need WOL header to sup-

port its Wake-On-LAN function. We

preserved the legacy WOL header

to provide convenience for some

embedded customers who need in-

ternal power source from the board.

See the table on the right for pin

denitions.

System Management Bus (JIPMB1)

A System Management Bus header

for the IPMI slot is located at JIPMB1.

Connect the appropriate cable here

to use the IPMB I2C connection on

your system.

Wake-On-LAN

(JSTBY1)

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 Wake-up

System Management

Bus (JIPMB1)

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

A. Wake On LAN

B. System Management Bus

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

COM2

JVRM2

JVRM1

JI2C2

VGA

BMC

JSTBY1

JI2C1

JBR1

LE2

B

JOH1

BT1

JP3

LEDM1

JPB1

JBRSET1

A

COM1

JIPMB1

SP1

JD1

2-24

JTPM1

JPL1

JPG1

LAN2

i350

USB 4/5

J23

LAN1

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

JSD1

SATA

Chapter 2: Installation

FANA

FANB

I-SGPIO2

I-SGPIO1

JVR

Power Supply I2C (JPI2C1)

The Power Supply I2C connector,

located at JPI2C1, monitors the status

of the power supply, fan and system

temperature. See the table on the right

for pin denitions.

DOM PWR Connector (JSD1/JSD2)

The Disk-On-Module (DOM) power

connectors, located at JSD1/JSD2,

provide 5V (Gen1/Gen) power to

a solid-state DOM storage device

connected to one of the SATA ports.

See the table on the right for pin

denitions.

1

A

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

I-SATA0

S-SGPIO

JP4

1

JPW1

JPI2C1

FAN4

JVRM1

JBT1

COM2

JVRM2

COM1

VGA

JIPMB1

JTPM1

BMC

LEDM1

JPL1

JPB1

JOH1

JBRSET1

JPG1

JSTBY1

LE2

BT1

JI2C2

SP1

JI2C1

JP3

JBR1

JPME2

JWD1

JD1

Intel C610

X10SRG-F

REV:1.01
DESIGNED IN USA

CPU

1

LGA2011-3

DIMMD2

DIMMC1

DIMMD1

DIMMC2

BIOS
LICENSE

BAR CODE

IPMI CODE

FAN3

MAC CODE

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

i350

JPL_LAN0

JPL_LAN1

USB 4/5

USB 6/7

JPF2

JPF1

J23

USB 8/9(3.0)

B

I-SATA4

C

I-SATA5

JITP1

1

DIMMB2

DIMMA1

DIMMB1

DIMMA2

FAN2

JF1

PWR

RST2NIC1NIC

OH

PWRHDDXNMI

ON

FF

LEDLED

SXB2A

USB 2/3

PWR Supply (I2C)

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PWR Fail

4 Ground

DOM PWR (JSD1)

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

A. Power Supply I2C

B. JSD1 DOM Power

C. JSD2 DOM Power

JSD1

SATA DOM+POWER

JSD2

SXB2B

SATA DOM+POWER

JPCIE2

FAND

FANC

JF1

JPW2

FAN1

JPW3

JL1

2-25

X10SRG-F Motherboard User’s Manual

FANA

FANB

I-SGPIO2

I-SGPIO1

I-SGPIO1/I-SGPIO2/S-SGPIO

Three (3) T-SGPIO (Serial-Link Gen-

eral Purpose Input/Output) headers

are located next to the I-SATA Ports

on the motherboard. These headers

are used to communicate with the

enclosure management chip in the

system. See the table on the right

for pin denitions. Refer to the board

layout below for the locations of the

headers.

TPM Header (JTPM1)

This header is used to connect a

Trusted Platform Module (TPM),

which is available from a third-party

vendor. A TPM is a security device

that supports encryption and authen-

tication in hard drives. It enables the

motherboard to deny access if the

TPM associated with the hard drive

is not installed in the system. See the

table on the right for pin denitions.

1

LE1

JUIDB1

UID-SW

COM2

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JVRM2

JVRM1

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

JBT1

I-SATA0

S-SGPIO

A

C

B

COM1

VGA

JIPMB1

D

JTPM1

LAN2

LAN1

BMC

JPB1

JOH1

JSTBY1

LE2

BT1

JI2C2

JI2C1

JP3

JBR1

Intel C610

X10SRG-F

REV:1.01
DESIGNED IN USA

LEDM1

JBRSET1

JWD1

1

JPME2

CPU

LGA2011-3

i350

JPL1

JPG1

USB 4/5

SP1

J23

JD1

Serial Link General-Purpose Headers

(SGPIO)

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 DATA Out

5 Load 6 Ground

7 Clock 8 NC

Trusted Platform Module Header (JTPM1)

Pin Denitions

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 No Pin

5 LRESET# 6 +5V (X)

7 LAD3 8 LAD2

9 3.3V 10 LAD1

11 LAD0 12 GND

13 SMB_CLK4 (X) 14 SMB_DAT4 (X)

15 P3V3_STBY 16 SERIRQ

17 GND 18 GND

19 P3V3_STBY 20 LDRQ# (X)

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

JSD2

SXB2B

SATA DOM+POWER

I-SATA5

JPCIE2

JITP1

A. I-SGPIO1

B. I-SGPIO2

C. S-SGPIO

D. TPM Header

2-26

Chapter 2: Installation

TA3

TA2 S-SATA1

4

SXB1B

Overheat/Fan Fail LED (JOH1)

The JOH1 header is used to connect

an LED to provide warnings of chas-

sis overheat. This LED will also blink

to indicate a fan failure. Refer to the

table on right for pin denitions.

Speaker (JD1)

On the JD1 header, pins 4-7 are used

for internal speaker. Close pins 4-7

with a cap to use the speaker. See the

table on the right for pin denitions.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SA

S-SA

COM2

JVRM2

JVRM1

JI2C2

JI2C1

VGA

BMC

A

JSTBY1

JBR1

LE2

JOH1

BT1

JP3

LEDM1

JPB1

JBRSET1

JWD1

COM1

JIPMB1

SP1

JPME2

JD1

JTPM1

JPL1

JPG1

OH/Fan Fail LED (JOH1)

Pin Denitions

Pin# Denition

1 3.3V

2 OH Active

OH/Fan Fail LED

(JOH1)

Pin Denitions

State Message

Solid Overheat

Blinking Fan Fail

JD1 Jumper

Pin Denitions

Pin# Denition

1-3 Power LED

4-7 Speaker

A. Overheat/Fan Fail LED

B. Internal Speaker

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

JSD1

I-SATA

SATA DOM+POWE

i350

USB 4/5

J23

B

2-27

X10SRG-F Motherboard User’s Manual

S-SATA3

TA2 S-SATA1

4

SXB1B

DOM+POWER

Internal Buzzer (SP1)

The Internal Buzzer (SP1) can be used

to provide audible indications for various

beep codes. See the table on the right for

pin denitions.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SA

COM2

JVRM2

JVRM1

JI2C2

VGA

JSTBY1

JI2C1

BMC

JBR1

LE2

JOH1

BT1

JP3

LEDM1

JPB1

JBRSET1

JWD1

COM1

JIPMB1

SP1

JPME2

JD1

JTPM1

JPL1

JPG1

A

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm

A. SP1

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

JSD1

I-SATA

SATA

i350

USB 4/5

J23

Speaker

2-28

2-7 Jumper Settings

TA3

TA2 S-SATA1

4

SXB1B

R

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers

create shorts between two pins to

change the function of the connector.

Pin 1 is identied with a square solder

pad on the printed circuit board.

Note: On two-pin jumpers,

"Closed" means the jumper

is on, and "Open" means the

jumper is off the pins.

LAN Port Enable/Disable (JPL1)

Jumper JPL1 enables or disables

LAN Ports 1 and 2 on the mother-

board. See the table on the right for

jumper settings. The default setting

is enabled.

Chapter 2: Installation

LAN Enable

Jumper Settings

Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

A. LAN Ports 1/2 Enable

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SA

S-SA

COM2

JVRM2

JVRM1

JI2C2

VGA

JI2C1

BMC

JSTBY1

LE2

JBR1

JOH1

BT1

JP3

LEDM1

A

JPB1

JBRSET1

JWD1

COM1

JIPMB1

SP1

JPME2

i350

USB 4/5

J23

LAN1

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

JPL_LAN0

JPL_LAN1

I-SATA

SXB2A

USB 2/3

JSD1

SATA DOM+POWE

JTPM1

LAN2

JPL1

JPG1

JD1

2-29

X10SRG-F Motherboard User’s Manual

-SATA1

Clear CMOS (JBT1)

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads

to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such

as a small screwdriver to touch both pads at the same time to short the connection.

Always remove the AC power cord from the system before clearing CMOS.

Important: For an ATX power supply, you must completely shut down the

system, remove the AC power cord and then short JBT1 to clear CMOS.

PCI Slot SMB Enable (JI2C1/JI2C2)

Use Jumpers JI2C2/JI2C3 to enable PCI

SMB (System Management Bus) support

to improve system management for the

PCI slots. See the table on the right for

jumper settings.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I

COM2

JVRM2

JVRM1

C

A

JBT1

JI2C2

VGA

JI2C1

B

JSTBY1

JBR1

BMC

LE2

LEDM1

JPB1

JOH1

JBRSET1

BT1

JP3

JWD1

Intel C610

COM1

JIPMB1

SP1

JPME2

JD1

JTPM1

JPG1

JPL1

PCI Slot SMB Enable (JI2C)

Jumper Settings

Setting Denition

Short Enabled (Default)

Open Disabled

A. Clear CMOS

B. JI2C1

C. JI2C2

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

I-SATA4

I-SATA5

JSD1

SATA DOM+POWER

JSD2

SATA DOM+POWER

i350

USB 4/5

J23

SXB2B

JPCIE2

2-30

Chapter 2: Installation

-SATA1

Watch Dog Reset (JWD1)

Watch Dog (JWD1) is a system moni-

tor that can reboot the system when

a software application hangs. Close

pins 1-2 to reset the system if an ap-

plication hangs. Close pins 2-3 to

generate a non-maskable interrupt

signal for the application that hangs.

See the table on the right for jumper

settings. Watch Dog must also be en-

abled in the BIOS.

VGA Enable (JPG1)

JPG1 allows you to enable or disable

the onboard VGA port. The default

position is on pins 1 and 2 to enable

VGA. See the table on the right for

jumper settings.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I

COM2

JVRM2

JVRM1

JBT1

JI2C2

VGA

JSTBY1

JI2C1

JBR1

BMC

LE2

LEDM1

JPB1

JOH1

JBRSET1

BT1

JP3

JWD1

A

Intel C610

COM1

JIPMB1

SP1

JPME2

JD1

JTPM1

JPL1

JPG1

Watch Dog (JWD1)

Jumper Settings

Setting Denition

Pins 1-2 Reset (Default)

Pins 2-3 NMI

Open Disabled

VGA Enable/Disable (JPG1)

Jumper Settings

Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

A. Watch Dog Reset

B. VGA Enable

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

I-SATA4

I-SATA5

i350

B

USB 4/5

J23

JSD1

SATA DOM+POWER

JSD2

SXB2B

SATA DOM+POWER

JPCIE2

2-31

X10SRG-F Motherboard User’s Manual

BMC Enable/Disable (JPB1)

JPB1 is used to enable or disable

the BMC (Baseboard Management

Control) chip and the onboard IPMI

port. This jumper is used together with

the IPMI settings in the BIOS. See the

table on the right for jumper settings.

Manufacturer Mode Select (JPME2)

Close this jumper to bypass SPI ash

security and force the system to use

the Manufacturer Mode, which will

allow the user to ash the system

rmware from a host server to modify

system settings. See the table on the

right for jumper settings.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SA

COM2

JVRM2

JVRM1

JBT1

JI2C2

VGA

JSTBY1

JI2C1

JBR1

BMC

LE2

LEDM1

JPB1

JOH1

JBRSET1

A

BT1

JP3

JWD1

Intel C610

COM1

JIPMB1

JPME2

SP1

JD1

JTPM1

JPL1

JPG1

B

BMC IPMI Enable/Disable

(JPB1) Jumper Settings

Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

Manufacturer Mode (JPME2)

Jumper Settings

Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacture Mode

A. BMC Enable/Disable

B. Manufacture Mode Select

4

LAN2

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

SXB2A

JPL_LAN0

JPL_LAN1

I-SATA4

I-SATA5

USB 2/3

JSD1

SATA DOM+POWER

JSD2

SATA DOM+POWER

i350

USB 4/5

J23

SXB2B

JPCIE2

2-32

Chapter 2: Installation

BIOS Recovery (JBR1)

Close pins 2 and 3 of jumper JBR1 for

BIOS recovery. The default setting is on

pins 1 and 2 for normal operation. See

the table on the right for jumper settings.

I2C Bus for VRM

Jumpers JVRM1 and JVRM2 allow the

BMC or the PCH to access CPU and

memory VRM controllers. See the table

on the right for jumper settings.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

B

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SA

COM2

C

JVRM2

JVRM1

A

JBT1

JI2C2

VGA

JSTBY1

JI2C1

JBR1

BMC

LE2

LEDM1

JPB1

JOH1

JBRSET1

BT1

JP3

JWD1

Intel C610

COM1

JIPMB1

JPME2

Jumper Setting Denition

Pins 1-2 Normal

Pins 2-3 BIOS Recovery

Pin Dentions

Pin # Denition

1-2 BMC (Default)

2-3 PCH

A. BIOS Recovery

B. JVRM1

C. JVRM2

JTPM1

LAN2

LAN1

i350

JPL1

JPG1

USB 4/5

USB 6/7

JPF2

SP1

JD1

JPF1

J23

USB 8/9(3.0)

BIOS Recovery

Jumper Settings

VRM

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

JSD1

SATA DOM+POWER

I-SATA4

JSD2

SATA DOM+POWER

I-SATA5

SXB2B

JPCIE2

2-33

X10SRG-F Motherboard User’s Manual

LAN 1/LAN 2

2-8 Onboard Indicators

LAN Port LEDs

The LAN ports are located on the I/O

backpanel of the motherboard. Each

Ethernet LAN port has two LEDs.

The yellow LED indicates activity,

while the Link LED may be green,

amber, or off to indicate the speed of

the connections. On the IPMI port,

the yellow LED on the right indicates

activity, while the green LED on the

left indicates the speed of the con-

nection. See the table at right for

more information. See the tables at

right for more information.

Link LEDs (Green/Amber/Off)

LAN

LED Color Denition

Off No Connection or 10 Mbps

Green 100 Mbps

Amber 1 Gbps

LAN

Link LED

IPMI LAN

Link LED

Activity LED

Activity LED

IPMI Heartbeat LED (LEDM1)

The IPMI Heartbeat LED is located at

LEDM1. When LEDM1 blinks, the IPMI

feature is functioning properly. Refer to the

table on the right for details. Also see the

layout below for the LED location.

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SA

COM2

JVRM2

JVRM1

JBT1

JI2C2

JI2C1

VGA

JSTBY1

B

JBR1

BMC

LE2

LEDM1

JPB1

JOH1

BT1

JP3

JWD1

Intel C610

COM1

JIPMB1

JBRSET1

SP1

JPME2

IPMI Heartbeat LED Indicator

LED Settings

Green: Blinking IPMI is ready for use

Off IPMI Off

A

LAN2

i350

USB 4/5

J23

LAN1

USB 6/7

JPF2

JPF1

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

JPL_LAN0

JPL_LAN1

USB 8/9(3.0)

I-SATA4

I-SATA5

SXB2A

USB 2/3

JSD1

SATA DOM+POWER

JSD2

SATA DOM+POWER

JTPM1

JPL1

JPG1

JD1

A. LAN Port LEDs

B. IPMI Heartbeat LED

SXB2B

JPCIE2

2-34

Chapter 2: Installation

-SATA1

Unit Identication LED (LE1)

A rear UID LED indicator (LE1) is located

next to the I/O backplane. This UID Indicator

provides easy identication of a system unit

that may be in need of service.

Note: UID can also be triggered via

IPMI on the motherboard. For more

information on IPMI, please refer to

the IPMI User's Guide posted on

our website @ http://www.super-

micro.com.

Onboard Power LED (LE2)

An Onboard Power LED is located

at LE2 on the motherboard. When

LE2 is on, the AC power cable is

connected. Make sure to disconnect

the power cable before removing or

installing any component. See the

layout below for the LED location.

UID LED Status

Color/State OS Status

Blue: On Windows OS Unit Identied

Onboard PWR LED Indicator

LED Status

Color/Status Denition

Off System Off

Grenn: On System on

A. Unit ID LED

B. Onboard Power LED

A

1

LE1

JUIDB1

UID-SW

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JPCIE3

S-SATA2 S-SATA1

S-SATA3

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I

JVRM2

JVRM1

JBT1

COM2

JI2C2

JI2C1

VGA

JSTBY1

COM1

JIPMB1

JTPM1

BMC

LEDM1

JPL1

JPB1

JOH1

JBRSET1

JPG1

B

LE2

BT1

SP1

JP3

JBR1

JPME2

JWD1

JD1

Intel C610

LAN2

i350

USB 4/5

J23

LAN1

USB 6/7

JPF2

JPF1

4

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

JPL_LAN0

JPL_LAN1

USB 8/9(3.0)

I-SATA4

I-SATA5

SXB2A

USB 2/3

JSD1

SATA DOM+POWER

JSD2

SATA DOM+POWER

SXB2B

JPCIE2

2-35

X10SRG-F Motherboard User’s Manual

I-SGPIO2

F

2-9 SATA Connections

SATA/SAS Connections

Ten SATA 3.0 connectors (I-SATA 0-5) and (S-

SATA 0-3) are located on the board. I-SATA 0-5

are supported by the AHCI controller and are

compatible with RAID 0, 1, 5, 10. S-SATA 0-3

are supported by the sSATA controller and are

compatible with RAID 0, 1, 10. These Serial Link

connections provide faster data transmission than

legacy Parallel ATA. See the table on the right for

pin denitions.

A. I-SATA 0 (3.0)

B. I-SATA 1 (3.0)

C. I-SATA 2 (3.0)

D. I-SATA 3 (3.0)

E. I-SATA 4 (3.0)

F. I-SATA 5 (3.0)

1

LE1

JUIDB1

UID-SW

COM2

SXB1A

CPU SLOT3 PCI-E 3.0 X8(IN X16)

JVRM2

JVRM1

JPCIE3

JI2C2

JI2C1

S-SATA2 S-SATA1

S-SATA3

4

D

C

SXB1B

I-SATA3

JPCIE3

S-SATA0

I-SATA2I-SATA1

JBT1

VGA

JSTBY1

JBR1

BMC

LE2

3

2

1

LEDM1

JPB1

JOH1

BT1

JP3

JWD1

Intel C610

COM1

JIPMB1

JBRSET1

SP1

JPME2

JTPM1

LAN2

i350

JPL1

JPG1

USB 4/5

J23

JD1

E

B

A

I-SGPIO1

I-SATA0

S-SGPIO

X10SRG-F

REV:1.01
DESIGNED IN USA

CPU

SATA/SAS Connectors

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

1. S-SATA 0 (3.0)

2. S-SATA 1 (3.0)

3. S-SATA 2 (3.0)

4. S-SATA 3 (3.0)

4

LAN1

USB 0/1(3.0)
IPMI_LAN

JPL_LOM_DEV_OFF

SXB2A

JPL_LAN0

JPL_LAN1

USB 2/3

USB 6/7

JPF2

JPF1

USB 8/9(3.0)

JSD1

SATA DOM+POWER

I-SATA4

JSD2

SATA DOM+POWER

I-SATA5

JITP1

SXB2B

JPCIE2

2-36

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the ‘Technical Support

Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Always disconnect the AC power cord before adding, changing or installing any

hardware components.

Before Power On

1. Make sure that the Standby is not on. (Note: If it is on, the onboard power

is on. Be sure to unplug the power cable before installing or removing the

components.)

2. Make sure that there are no short circuits between the motherboard and

chassis.

3. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse. Also, be sure to remove all add-on cards.

4. Install a CPU and heatsink (-be sure that it is fully seated) and then connect

the chassis speaker and the power LED to the motherboard. Check all jumper

settings as well.

No Power

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Make sure that all jumpers are set to their default positions.

3. Check if the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to make sure that it still

supplies ~3VDC. If it does not, replace it with a new one.

3-1

X10SRG-F Motherboard User’s Manual

No Video

1. If the power is on, but you have no video--in this case, you will need to re-

move all the add-on cards and cables rst.

2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A

for details on beep codes.)

3. Remove all memory modules and turn on the system. (If the alarm is on,

check the specs of memory modules, reset the memory or try a different one.)

Memory Errors

1. Make sure that the DIMM modules are properly installed and fully seated in

the slots.

2. You should be using memory recommended by Supermicro (see Section 2-3).

Also, it is recommended that you use the memory modules of the same type

and speed for all DIMMs in the system. Do not use memory modules of differ-

ent sizes, different speeds and different types on the same motherboard.

3. Check for bad DIMM modules or slots by swapping modules between slots to

see if you can locate the faulty ones.

4. Check the switch of 115V/230V power supply.

When You Lose the System’s Setup Conguration

1. Please be sure to use a high quality power supply. A poor quality power sup-

ply may cause the system to lose CMOS setup information. Refer to Section

1-5 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the Setup Conguration problem, contact your

vendor for repairs.

3-2

Chapter 3: Troubleshooting

3-2 Technical Support Procedures

Before contacting Technical Support, please make sure that you have followed all

the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro

does not sell directly to end users, so it is best to rst check with your distributor or

reseller for troubleshooting services. They should know of any possible problem(s)

with the specic system conguration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/support/faqs/) before contacting Technical Sup-

port.

2. BIOS upgrades can be downloaded from our website at (http://www.supermi-

cro.com/support/bios/).

Note: Not all BIOS can be ashed. Some cannot be ashed; it depends

on the boot block code of the BIOS.

3. If you've followed the instructions above to troubleshoot your system, and still

cannot resolve the problem, then contact Supermicro's technical support and

provide them with the following information:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your

system rst boots up)

• System conguration

• An example of a Technical Support form is on our website at (http://www.su-

permicro.com/support/contact.cfm).

4. Distributors: For immediate assistance, please have your account number

ready when placing a call to our technical support department. We can be

reached by e-mail at [e-mail], by phone at: (408) 503-

8000, option 2, or by fax at (408) 503- 8019.

3-3

X10SRG-F Motherboard User’s Manual

3-3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: Please see Section 2-4 for a comprehensive answer.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not

experiencing any problems with your system. Updated BIOS les are located on

our website at http://www.supermicro.com/support/bios/. Please check our BIOS

warning message and the information on how to update your BIOS on our web

site. Select your motherboard model and download the BIOS ROM le to your

computer. Also, check the current BIOS revision to make sure that it is newer than

your BIOS before downloading. Please unzip the BIOS le onto a bootable device

or a USB pen/thumb drive. To ash the BIOS, run the batch le named "ami.bat"

with the new BIOS ROM le from your bootable device or USB pen/thumb drive.

Use the following format:

F:\> ami.bat BIOS-ROM-lename.xxx <Enter>

Note: Always use the le named “ami.bat ” to update the BIOS, and insert

a space between "ami.bat" and the lename. The BIOS-ROM-lename

will bear the motherboard name (i.e., X10SRG-F) and build version as

the extension. For example, "X10SRG-F1.218". When completed, your

system will automatically reboot.

When the BIOS ashing screen is completed, the system will reboot and

will show “Press F1 or F2”. At this point, you will need to load the BIOS

defaults. Press <F1> to go to the BIOS setup screen, and press <F3> to

load the default settings. Next, press <F4> to save and exit. The system

will then reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!

Note: The SPI BIOS chip installed on this motherboard is not removable.

To repair or replace a damaged BIOS chip, please send your motherboard

to RMA at Supermicro for service.

Question: I think my BIOS is corrupted. How can I recover my BIOS?

Answer: Please see Appendix C-BIOS Recovery for detailed instructions.

Question: Why do I get an error message “IASTOR.SYS read error” and "press F6

to install Intel RAID driver" when installing Windows on my motherboard?

Answer: To solve this issue, disable the IPMI jumper (if your motherboard has this

feature). Another solution is to use a USB oppy drive instead of the onboard oppy

drive. For the IPMI jumper location, please check Chapter 1.

3-4

Chapter 3: Troubleshooting

Question: What is the heatsink part number for my X10SRG-F Series motherboard?

Answer: For the 1U passive heatsink, use SNK-P0047PS.

Question: Why can't I recover the BIOS even when I’ve followed the instructions

in the user’s manual for the motherboard?

Answer: Please disable the IPMI jumper and try it again. For the jumper location,

please check Chapter 1.

3-5

X10SRG-F Motherboard User’s Manual

3-4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue

below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a

click to ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

OR

3-6

Chapter 3: Troubleshooting

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required

before any warranty service will be rendered. You can obtain service by calling

your vendor for a Returned Merchandise Authorization (RMA) number. For faster

service, you may also obtain RMA authorizations online (http://www.supermicro.

com/RmaForm/). When you return the motherboard to the manufacturer, the RMA

number should be prominently displayed on the outside of the shipping carton, and

mailed prepaid or hand-carried. Shipping and handling charges will be applied for

all orders that must be mailed when service is complete.

This warranty only covers normal consumer use and does not cover damages

incurred in shipping or from failure due to the alteration, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product prob-

lems.

3-7

X10SRG-F Motherboard User’s Manual

Notes

3-8

Chapter 4: AMI BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10SRi-F. The ROM BIOS

is stored in a Flash EEPROM and can be easily updated. This chapter describes

the basic navigation of the AMI BIOS setup utility screens.

Note: For AMI BIOS recovery, please refer to the UEFI BIOS Recovery

Instructions in Appendix C.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Delete> key while the

system is booting up.

Note: In most cases, the <Delete> key is used to invoke the AMI BIOS

setup screen. There are a few cases when other keys are used, such as

<F1>, <F2>, etc.

Each main BIOS menu option is described in this manual. The AMI BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for a text message. When an option is selected in the

left frame, it is highlighted in white. Often a text message will accompany it.

Note: the AMI BIOS has default text messages built in. Supermicro retains

the option to include, omit, or change any of these text messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during the

setup navigation process. These keys include <F1>, <F4>, <Enter>, <Esc>, arrow

keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Del> at the appropriate time during system boot.

4-1

X10SRG-F Motherboard User’s Manual

How to Start the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen, below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event

shall Supermicro be liable for direct, indirect, special, incidental, or consequential dam-

ages arising from a BIOS update. If you have to update the BIOS, do not shut down

or reset the system while the BIOS is updating. This is to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS setup screen is shown below.

The following Main menu items will be displayed:

4-2

Chapter 4: AMI BIOS

System Date/System Time

Use this option to change the system date and time. Highlight System Date or

System Time using the arrow keys. Enter new values using the keyboard. Press the

<Tab> key or the arrow keys to move between elds. The date must be entered in

Day MM/DD/YYYY format. The time is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears

as 17:30:00. The date's default value is 01/01/2014 after RTC reset.

Supermicro X10SRG-F

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system

was built.

Memory Information

Total Memory

This item displays the total size of memory available in the system.

Memory Speed

This item displays the default speed of the memory modules installed in the system.

4-3

X10SRG-F Motherboard User’s Manual

4-3 Advanced Setup Congurations

Use the arrow keys to select Advanced setup and press <Enter> to access the

submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, a

very high DRAM frequency or an incorrect BIOS timing setting may cause the system

to malfunction. When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen between displaying POST messages or the

OEM logo at bootup. Select Disabled to display the POST messages. Select En-

abled to display the OEM logo instead of the normal POST messages. The options

are Enabled and Disabled.

Note: This item enables or disables both Early Video Logo and Graphi-

cal Logo per 600A WW30 meeting. POST message is always dispalyed

regardless of the item setting.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to

use the current AddOn ROM display setting. Select Force BIOS to use the Option

ROM display mode set by the system BIOS. The options are Force BIOS and

Keep Current.

4-4

Chapter 4: AMI BIOS

Bootup Num-Lock

Use this feature to set the Power-on state for the Numlock key. The options are

Off and On.

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error

occurs. The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Inter-

rupt 19 at bootup immediately and allow the drives that are attached to these host

adaptors to function as bootable disks. If this item is set to Postponed, the ROM

BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the

drives attached to these adaptors to function as bootable devices at bootup. The

options are Immediate and Postponed.

Re-try Boot

When EFI Boot is selected, the system BIOS will automatically reboot the system

from an EFI boot device after its initial boot failure. Select Legacy Boot, to allow

the BIOS to automatically reboot the system from a Legacy boot device after its

initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

DeepSx Power Policies

Use this item to congure the Advanced Conguration and Power Interface (ACPI)

settings for the system. Enable S3 to use Standby Mode (Suspend-to- RAM) and

maintain power supply to the system RAM when the system is in the sleep mode.

Enable S4 to use Hibernation mode (Suspend to Disk) so that all data stored in of

the main memory can be saved in a non-volatile memory area such as in a hard

drive and then power down the system. Enable S5 to power off the whole system

except the power supply unit (PSU) and keep the power button "alive" so that the

user can "wake-up" the system by using an USB keyboard or mouse. The options

are Disabled, Enabled in S5, Enabled in S4-S5, and Enabled in S3-S4-S5.

Note: Exposed if motherboard designs it in.

GP27 Wake From DeepSx

Use this feature to enable or disable GP27 to wake from Deep Sx mode. The op-

tions are Enabled and Disabled.

Note: Exposed if motherboard designs it in.

4-5

X10SRG-F Motherboard User’s Manual

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inac-

tive for more than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed.

Select 4 Seconds Override for the user to power off the system after pressing and

holding the power button for 4 seconds or longer. Select Instant Off to instantly

power off the system as soon as the user presses the power button. The options

are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for

the system power to remain off after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power-On,

Stay-Off and Last State.

Note: Restore on AC Power Loss may malfunction after 4-sec power

button override.



CPU Conguration

Warning: Setting the wrong values in the following sections may cause the system

to malfunction.

CPU1/CPU2 Conguration

The following CPU information will be displayed:

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

4-6

Chapter 4: AMI BIOS

• L3 Cache RAM

• CPU1 Version

• CPU2 Version

Clock Spread Spectrum

Select Enable for Clock Spectrum support, which will allow the BIOS to monitor

and attempt to reduce the level of Electromagnetic Interference caused by the

components whenever needed. Select Disabled to enhance system stability. The

options are Disabled and Enabled.

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU perfor-

mance. The options are Enable and Disable.

Cores Enabled

This item congures the number of CPU cores to enable. Enter '0' to enable all

cores. Please enter a numeric value. The maximum is dependent on what type of

CPU is installed.

Execute Disable Bit (Available if supported by the OS & the CPU)

Set to Enabled for Execute Disable Bit support which will allow the processor to

designate areas in the system memory where an application code can execute and

where it cannot, thus preventing a worm or a virus from ooding illegal codes to over-

whelm the processor or damaging the system during a virus attack. The options are

Enable and Disable. (Refer to Intel and Microsoft websites for more information.)

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in

the system. The options are Unlock/Enable and Unlock/Disable.

Hardware Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the hardware prefetcher will prefetch streams of data

and instructions from the main memory to the Level 2 (L2) cache to improve CPU

performance. The options are Disable and Enable.

Adjacent Cache Line Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

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X10SRG-F Motherboard User’s Manual

Note: If there is any change to this setting, you will need to power off and

reboot the system for the change to take effect. Please refer to Intel’s

web site for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will

prefetch data streams from the cache memory to the DCU (Data Cache Unit) to

speed up data accessing and processing for CPU performance enhancement. The

options are Disable and Enable.

DCU IP Prefetcher

If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will

prefetch IP addresses to improve network connectivity and system performance.

The options are Enable and Disable.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to maximize ef-

ciency in memory data transferring and accessing. The options are Auto, Enable

and Disable.

DCA Prefetch Delay

A DCA prefetcher is used with a TOE (TCP/IP Ofoad Engine) adapter to prefetch
data to shorten execution cycles and to maximize data processing efciency.

Prefetching data too frequently can saturate the cache directory and delay neces­sary cache access. This feature reduces or increases the frequency of system data
prefetching activities. The options are Disable, [8], [16], [32], [40], [48], [56], [64],
[72], [80], [88], [96], [104], and [112].

X2APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is

assigned 256 APIC IDs (APIDs) in 8-bit bandwidth. When this item is set to En-

able, the APIC ID will be expanded from 8 bits to 16 bits to provide 512 APIDs to

each thread to enhance CPU performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology so that I/O device assignments

will be reported directly to the VMM (Virtual Memory Management) through the

DMAR ACPI Tables. This feature offers fully-protected I/O resource-sharing across

the Intel platforms, providing the user with greater reliability, security and availability

in networking and data-sharing. The settings are Enable and Disable.

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Chapter 4: AMI BIOS

Advanced Power Management Conguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to custom-

ize system power settings. Select Disabled to disable power-saving settings. The

options are Disable, Energy Efcient, and Custom.

Cong TDP

Select Enable to allow the user to congure the Thermal Design Power (TDP)

settings for the system. The TDP refers to the maximum amount of power al-

lowed for running "real applications" without triggering an overheating event. The

options are Disable and Enable.

CPU P State Control

Note: The item will be edited when Power Technology item sets to Custom.

EIST (P-State)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automati-

cally adjust processor voltage and core frequency in an effort to reduce power

consumption and heat dissipation. Please refer to Intel’s website for detailed

information. The options are Disable and Enable.

Turbo Mode

Select Enable for processor cores to run faster than the frequency specied by

the manufacturer. The options are Disable and Enable.

Note: This item is grayed out when EIST (P-States) is set to Disable.

P-state Coordination

Use this item to congure the processor's P-State coordination settings. During

a P-State, the voltage and frequency of the processor will be reduced when it is

in operation. This makes the processor more energy efcient, resulting in further

energy gains. The options are HW_ALL, SW_ALL and SW-ANY.

Note: This item is grayed out when EIST (P-States) is set to Disable.

CPU C State Control

Note: The item will be edited when Power Technology item sets to Custom.

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X10SRG-F Motherboard User’s Manual

Package C State limit

Use this item to set the limit on the C-State package register. The options are

C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state.

CPU C3 Report

Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the

operating system. During the CPU C6 state, power to all caches is turned off.

The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to enable "Enhanced Halt State" support, which will signicantly

reduce the CPU's power consumption by minimizing CPU's clock cycles and

voltage use during a "Halt State." The options are Disable and Enable.

CPU T State Control

Note: The item will be edited when Power Technology item sets to Custom.

ACPI (Advanced Conguration Power Interface) T-States

If this item is set to Enable, CPU throttling will be supported by the operating

system to reduce power consumption. The options are Enable and Disable.

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Chapter 4: AMI BIOS

Chipset Conguration

Warning: Setting the wrong values in the following sections may cause the system

to malfunction.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

IIO Conguration

EV DFX (Device Function On-Hide) Feature

When this feature is set to Enable, the EV_DFX Lock Bits that are located on

a processor will always remain clear during electric tuning. The options are

Disable and Enable.

IIO1 Conguration

IOU2 (II01 PCIe Port 1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4, X8, and Auto.

IIO1 PORT 1A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).

IOU0 (II01 PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto

IIO1 PORT 2A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).

IOU1 (II01 PCIE Port 3)

Use this item to congure the PCI-E port Bifuraction setting for a PCI-E port

specied by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16,

and Auto.

IIO1 PORT 3A Link Speed

This item congures the link speed of a PCI-E port specied by the user. The

options are Gen1 (2.5 GT/s), Gen2 (5GT/s), and Gen3 (8 GT/s).

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X10SRG-F Motherboard User’s Manual

IOAT Conguration

Enable I/OAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology), which signi-

cantly reduces CPU overhead by leveraging CPU architectural improvements

and freeing the system resource for other tasks. The options are Enable and

Disable.

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain trans-

actions to violate the strict-ordering rules of PCI and to be completed prior to

other transactions that have already been enqueued. The options are Disable

and Enable.

 Intel VT for Directed I/O (VT-d)

Intel VT for Direct I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d
support by reporting the I/O device assignments to the VMM (Virtual Machine

Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O

resource sharing across Intel platforms, providing greater reliability, security and

availability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance.

The options are Enable and Disable.

Note: This item is hidden when Intel VT for Directed I/) (VT-d) item is set

to Disable.

QPI (Quick Path Interconnect) Conguration

The following information will display:

• Number of CPU

• Number of IIO

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Chapter 4: AMI BIOS

COD Enable (Available when the OS and the CPU support this feature)

Select Enabled for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Enabled and Disabled.

Isoc Mode

Select Enabled for Isochronous support to meet QoS (Quality of Service) require-

ments. This feature is especially important for Virtualization Technology. The

options are Enable and Disable.

Memory Conguration

Enforce POR

Select Enable to enforce POR restrictions for DDR4 frequency and voltage

programming. The options are Enabled and Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory

modules. The options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133,

2200, 2400, 2600, 2667, and Reserved (Do not select Reserved).

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Auto, Disabled and Enabled.

DRAM RAPL (Running Average Power Limit) Baseline

Use this feature to set the run-time power-limit baseline for DRAM modules. The

options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.

Set Throttling Mode

Throttling improves reliability and reduces power consumption in the proces-

sor via automatic voltage control during processor idle states. The options are

Disabled and CLTT (Closed Loop Thermal Throttling).

Socket Interleave Below 4GB

Select Enabled for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

A7 Mode

Select Enabled to support A7 (Addressing) Mode to improve memory perfor-

mance. The options are Enable and Disable.

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X10SRG-F Motherboard User’s Manual

DIMM Information

This item displays the status of a DIMM module specied.

• DIMMA1

• DIMMA2

• DIMMB1

• DIMMB2

• DIMMC1

• DIMMC2

• DIMMD1

• DIMMD2

Memory RAS (Reliability_Availability_Serviceability)

Conguration

Use this submenu to congure the following Memory RAS settings.

RAS Mode

Select Enable to enable RAS support to enhance reliability, availability and ser-

viceability of onboard memory modules. The options are Enable and Disable.

Memory Rank Sparing

This item indicates if memory rank sparing is supported by the motherboard.

Memory rank sparing enhances system memory performance. The options are

Enabled and Disabled.

Note: This item is grayed out when RAS Mode is set to Mirror.

Memory Rank Sparing

The options are One Rank, Two Rank, Three Rank, and Auto.

Note: This item is exposed when Memory Rank Sparing is set to Enabled.

Multi Rank Sparing

This feature determines how many ranks to be spared. The options are One

Rank, Two Rank, Three Ran and Auto.

Note: This item is exposed when Memory Rank Sparing is set to Enabled.

4-14

Chapter 4: AMI BIOS

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected in a memory module and send the correction to the requestor

(the original source). When this item is set to Enable, the IO hub will read and

write back one cache line every 16K cycles if there is no delay caused by internal

processing. By using this method, roughly 64 GB of memory behind the IO hub

will be scrubbed every day. The options are Enable and Disable.

Patrol Scrub Interval

Use this item to specify the number of hours (between 0 to 24) required for the

system to complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be

performed automatically. The default setting is 24.

Note: This item is hidden when Patrol Scrub item is set to Disable.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable

memory errors found in a memory module. When the CPU or I/O issues a

demand-read command, and the read data from memory turns out to be a

correctable error, the error is corrected and sent to the requestor (the original

source). Memory is corrected as well. Select Enable to use Demand Scrubbing

for ECC memory correction. The options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable and Enable.



South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable

legacy support if there are no legacy USB devices present. Select Disable to have

all USB devices available for EFI applications only. The options are Enabled,

Disabled and Auto.

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Ex-

tensible Host Controller Interface) hand-off. The XHCI ownership change should be

claimed by the XHCI driver. The settings are Enabled and Disabled.

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X10SRG-F Motherboard User’s Manual

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide

complete legacy USB keyboard support for the operating systems that do not sup-

port legacy USB devices. The options are Disabled and Enabled.

USB 3.0 Support

Select Enabled for USB 3.0 support. The options are Disabled, Enabled, Auto

Smart and Auto.

EHCI1

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #1 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

EHCI2

Select Enabled to enable EHCI (Enhanced Host Controller Interface) support on

USB 2.0 connector #2 (-at least one USB 2.0 connector should be enabled for EHCI

support.) The options are Disabled and Enabled.

XHCI Pre-Boot Driver

Select Enabled to enable XHCI (Extensible Host Controller Interface) support on a

pre-boot drive specied by the user. The options are Enabled and Disabled.



SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence

of the SATA devices that are supported by the Intel PCH chip and displays the

following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH chip. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

Note: This item is hidden when the SATA Controller item is set to Disabled.

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link in a low power mode during

extended periods of I/O inactivity, and will return the link to an active state when

I/O activity resumes. The options are Enabled and Disabled.

Note: This item is hidden when Conguration SATA is set to IDE.

SATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

driver for system boot. The options are Disabled, EFI, and Legacy.

Note: This item is hidden when Conguration SATA is set to RAID.

SATA/sSATA RAID Boot Select

Select the SATA controller from where the system boots from. The options are

SATA Controller, sSATA Controller and Both.

Note: This item is hidden when Conguration SATA is set to RAID. Select

either SATA Controller or sSATA option as a boot volume for Windows

Server 2012 R2 installation. Select BOTH for other Windows Editions.

SATA Port 0 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Port 0 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

SATA Port 1 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

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X10SRG-F Motherboard User’s Manual

SATA Port 1 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

SATA Port 2 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Port 2 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

SATA Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Port 3 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

SATA Port 4 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Port 4 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

SATA Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

SATA Port 5 SATA Device Type

Use this item to specify if the SATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

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Chapter 4: AMI BIOS



sSATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence

of the SATA devices that are supported by the SCU controller and displays the

following items:

sSATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

SCU chip. The options are Enabled and Disabled.

Congure sSATA as

Select IDE to congure an sSATA drive specied by the user as an IDE drive. Select

AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select

RAID to congure an sSATA drive specied by the user as a RAID drive. The op-

tions are IDE, AHCI, and RAID.

Note: This is item is hidden when the sSATA Controller is set to Disabled.

Support Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power

usage of the SATA link. The controller will put the link in a low power mode during

extended periods of I/O inactivity, and will return the link to an active state when

I/O activity resumes. The options are Enabled and Disabled.

Note: This item is hidden when Conguration sSATA is set to IDE.

sSATA RAID Option ROM/UEFI Driver

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy

driver for system boot. The options are Disabled, EFI, and Legacy.

Note: This item is exposed when Conguration sSATA is set to RAID.

SATA/sSATA RAID Boot Select

Select the SATA controller from where the system boots from. The options are

SATA Controller, sSATA Controller and Both.

Note: This item is exposed when Conguration sSATA is set to RAID.

Select either SATA Controller or sSATA Controller option as a boot volume

for WIndows Server 2012 R2 installation. Select BOTH for other Windows

Editions.

sSATA Port 0 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

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X10SRG-F Motherboard User’s Manual

sSATA Port 0 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

sSATA Port 1 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

sSATA Port 1 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

sSATA Port 2 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

sSATA Port 2 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

sSATA Port 3 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

sSATA Port 3 sSATA Device Type

Use this item to specify if the sSATA port specied by the user should be con-

nected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk

Drive and Solid State Drive.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

• General ME Conguration

• Operational Firmware Version

• Recovery Firmware Version

• ME Firmware Features

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Chapter 4: AMI BIOS

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

• PCI Devices Common Settings:

PCI Latency Timer

Use this feature to set the latency timer for each PCI device installed on a PCI bus.

Select 32 to set the PCI latency to 32. The options are 32, 64, 96, 128, 160, 192,

224 and 248 PCI Bus Clocks.

PCI-X Latency Timer

Use this feature to set the latency timer for each PCI device installed on a PCI bus.

Select 64 to set the PCI latency to 64. The options are 32, 64, 96, 128, 160, 192,

224 and 248 PCI Bus Clocks.

PERR# Generation

Select Enabled to allow a PCI device to generate a PERR (PCI/PCI-E Parity Error)

number for a PCI bus error event. The options are Enabled and Disabled.

SERR# Generation

Select Enabled to allow a PCI device to generate an SERR (System Error) number

for a PCI bus error event. The options are Enabled and Disabled.

PCI PERR/SERR Support

Use this feature to enable or disable the runtime event for PCI errors. The options

are Disabled and Enabled.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G

Address. The options are Enabled and Disabled.

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X10SRG-F Motherboard User’s Manual

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled

and Disabled.

Maximum Payload

Select Auto for the system BIOS to automatically set the maximum payload value

for a PCI-E device to enhance system performance. The options are Auto, 128

Bytes and 256 Bytes.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read

request for a PCI-E device to enhance system performance. The options are Auto,

128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

ASPM Support

Use this item to set the Active State Power Management (ASPM) level for a PCI-E

device. Select Auto for the system BIOS to automatically set the ASPM level based

on the system conguration. Select Disabled to disable ASPM support. The options

are Disabled and Auto.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

MMIOHBase

Use this item to select the base memory size according to memory-address map-

ping for the IO hub. The base memory size must be between 4032G to 4078G. The

options are 56T, 48T, 24T, 512G, and 256G.\

MMIO High Size

Use this item to select the high memory size according to memory-address mapping

for the IO hub. The options are 256G, 128G, 512G, and 1024G.

RSC-R1UFF-E16 CPU1 SLOT1 PCI-E x16 OPROM

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy

and EFI.

RSC-R1UFF-E16 CPU1 SLOT2 PCI-E x16 OPROM

Select Enabled to enable Option ROM support to boot the computer using a de-

vice installed on the slot specied by the user. The options are Disabled, Legacy

and EFI.

Note: Riser card names may differ in each system.

4-22

Chapter 4: AMI BIOS

Onboard LAN Option ROM Type

Use this item to select the Onboard LAN Option ROM type. The options are Legacy

and EFI.

Onboard LAN1 Option ROM

Use this option to select the type of device installed in LAN Port1 used for system

boot. The default setting for LAN1 Option ROM is PXE.

Onboard LAN2 Option ROM

Use this option to select the type of device installed in LAN Port2 used for system

boot. The default setting for LAN2 Option ROM is Disabled.

Load Onboard SAS Option ROM

Use this option to enable or disable

Onboard Video Option ROM

Use this item to select the Onboard Video Option ROM type. The options are

Legacy and EFI.

VGA Priority

Use this item to select the graphics device to be used as the primary video display

at bootup. The options are Onboard and Offboard.

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied

Extensible Firmware Interface) for network stack support. The options are Enabled

and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Use this feature to enable Ipv4 PXE Boot Support. If this feature is disabled, it

will not create the Ipv4 PXE Boot option. The options are Disabled and Enabled.

Ipv6 PXE Support

Use this feature to enable Ipv6 PXE Boot Support. If this feature is disabled, it

will not create the Ipv6 PXE Boot option. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the ESC key to abort the PXE

boot. The default is 0.

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X10SRG-F Motherboard User’s Manual

Media Detect Time

Use this feature to select the wait time in seconds to detect LAN media. The de-

fault is 0.



Super IO Conguration

Super IO Chip AST2400



Serial Port 1 Conguration

Serial Port 1

Select Enabled to enable the onboard serial port specied by the user. The options

are Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of

a serial port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Port 1 Settings

This feature species the base I/O port address and the Interrupt Request address

of Serial Port 1or Serial Port 2. Select Auto for the BIOS to automatically assign

the base I/O and IRQ address to a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

The options for Serial Port 2 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port 2 Conguration

Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options

are Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of

a serial port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

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Chapter 4: AMI BIOS

Change Port 2 Settings

This feature species the base I/O port address and the Interrupt Request address

of Serial Port 1or Serial Port 2. Select Auto for the BIOS to automatically assign

the base I/O and IRQ address to a serial port specied.

The options for Serial Port 2 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,

6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,

4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redi-

rectoin. The options are COM and SOL.



Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a

client machine to be connected to a host machine at a remote site for networking.

The options are Enabled and Disabled.

COM1 Console Redirection

Out-of-Band Management Port

The feature selects a serial port in a client server to be used by the Microsoft

Windows Emergency Management Services (EMS) to communicate with a re-

mote host server. The options are COM1 and COM2/SOL.

Terminal Type

This feature allows the user to select the target terminal emulation type for Con-

sole Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to

add color and function key support. Select ANSI to use the Extended ASCII Char-

acter Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters

into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this item to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

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X10SRG-F Motherboard User’s Manual

Data Bits

Use this feature to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this item to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

the receiving buffer is full. Send a "Start" signal to start sending data when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this item to select the number of rows and columns used in Console Redi-

rection for legacy OS support. The options are 80x24 and 80x25.

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Chapter 4: AMI BIOS

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a

terminal emulator designed for the Windows OS. The options are VT100, LINUX,

XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS

POST. When set to Bootloader, legacy Console Redirection is disabled before

booting the OS. When set to Always Enable, legacy Console Redirection remains

enabled when booting the OS. The options are Always Enable and Bootloader.

SOL/COM2 Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client

computer, which is the remote computer used by the user.

Out-of-Band Management Port

The feature selects a serial port in a client server to be used by the Microsoft

Windows Emergency Management Services (EMS) to communicate with a re-

mote host server. The options are COM1 and COM2/SOL.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirec-

tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color

and function key support. Select ANSI to use the Extended ASCII Character Set.

Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or

more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console

Redirection. Make sure that the same speed is used in the host computer and the

client computer. A lower transmission speed may be required for long and busy

lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The

options are 7 (Bits) and 8 (Bits).

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X10SRG-F Motherboard User’s Manual

Parity

A parity bit can be sent along with regular data bits to detect data transmission

errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits

is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits

is odd. Select None if you do not want to send a parity bit with your data bits

in transmission. Select Mark to add a mark as a parity bit to be sent along with

the data bits. Select Space to add a Space as a parity bit to be sent with your

data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard

serial data communication. Select 2 Stop Bits if slower devices are used. The

options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data

loss caused by buffer overow. Send a "Stop" signal to stop sending data when

the receiving buffer is full. Send a "Start" signal to start sending data when the

receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100

terminals. The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text

messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis-

abled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console

Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a

terminal emulator designed for the Windows OS. The options are VT100, LINUX,

XTERMR6, SCO, ESCN, and VT400.

4-28