Supermicro X10QBL operation manual

X10QBL-CT

X10QBL

USER’S MANUAL

Revision 1.0a

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between the manufacturer and the customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.

Manual Revision 1.0a

Release Date: June 4, 2016

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document.

Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.

Printed in the United States of America

Preface

This manual is written for system integrators, IT professionals, and

knowledgeable end-users. It provides information for the installation and use of the

X10QBL-CT/X10QBL motherboard.

About This Motherboard

The Super X10QBL(-CT) motherboard supports four Intel E7-4800 v4 (Socket

R1) series processors that offer the new Intel Microarchitecture 14nm Processing

technology, delivering the best balanced solution for the diverse needs of next-gen-

eration data centers. With the PCH C602J built in, the X10QBL(-CT) motherboard

supports MCTP Protocol, and Intel® Node Manager 3.0. Combined with Intel®

Turbo Boost Technology and support of 96 CPU cores or, with Hyper-Threading,

192 cores, this motherboard is optimized for high-performance, cost-effective, cloud-

computing systems. Please refer to our website (http://www.supermicro.com) for

CPU and memory support updates.

Manual Organization

Chapter 1 describes the features, specications and performance of the mother-

board. It also provides detailed information about the Intel PCH C602J chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules and other hardware components into the

system. If you encounter any problems, see Chapter 3, which describes trouble-

shooting procedures for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information

on running the CMOS Setup utility.

Appendix A provides BIOS Error Beep codes.

Appendix B lists software installation instructions.

Appendix C contains UEFI BIOS Recovery instructions.

Preface

iii

X10QBL-CT/X10QBL Motherboard User’s Manual

Conventions Used in the Manual

Pay special attention to the following symbols for proper system installation:

Warning: Important information given to ensure proper system installation or to prevent

damage to the components or injury to yourself;

Note: Additional information given to differentiate between models or

instructions provided for proper system setup.

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: +1 (408) 503-8000

Fax: +1 (408) 503-8008

Email: marketing@supermicro.com (General Information)

support@supermicro.com (Technical Support)

Web Site: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: +31 (0) 73-6400390

Fax: +31 (0) 73-6416525

Email: sales@supermicro.nl (General Information)

support@supermicro.nl (Technical Support)

rma@supermicro.nl (Customer Support)

Web Site: www.supermicro.nl

Preface

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: +886-(2) 8226-3990

Fax: +886-(2) 8226-3992

Email: support@supermicro.com.tw

Web Site: www.supermicro.com.tw

X10QBL-CT/X10QBL Motherboard User’s Manual

Table of Contents

Preface

Chapter 1 Overview

1-1 Overview ......................................................................................................... 1-1

1-2 Processor and Chipset Overview...................................................................1-11

1-3 Special Features ........................................................................................... 1-12

1-4 System Health Monitoring ............................................................................. 1-12

1-5 ACPI Features ............................................................................................... 1-13

1-6 Power Supply ................................................................................................ 1-13

1-7 Advanced Power Management ..................................................................... 1-13

Intel® Intelligent Power Node Manager (NM) (Available when the Supermicro

Power Manager [SPM] is Installed) .............................................................. 1-13

Management Engine (ME) ............................................................................ 1-14

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

2-2 Static-Sensitive Devices .................................................................................. 2-4

2-3 Motherboard Installation .................................................................................. 2-5

2-4 Processor and Heatsink Installation................................................................ 2-7

Installing the E7-4800 v4 Series Processor .................................................. 2-7

Installing a Passive CPU Heatsink ................................................................2-11

Removing the Heatsink ................................................................................. 2-12

2-5 Installing and Removing the Memory Modules ............................................. 2-13

Installing & Removing DIMMs ....................................................................... 2-13

Removing Memory Modules ......................................................................... 2-13

2-6 Control Panel Connectors and I/O Ports ...................................................... 2-16

Back Panel Connectors and I/O Ports .......................................................... 2-16

Back Panel I/O Port Locations and Denitions ........................................... 2-16

COM Port/Serial Connection Header ....................................................... 2-17

Universal Serial Bus (USB) ...................................................................... 2-17

Video Connection ..................................................................................... 2-18

Ethernet Ports .......................................................................................... 2-18

Unit Identier Switches/UID LED Indicators ............................................. 2-19

Front Control Panel ....................................................................................... 2-20

Front Control Panel Pin Denitions............................................................... 2-21

NMI Button ............................................................................................... 2-21

Power LED .............................................................................................. 2-21

HDD/UID LED .......................................................................................... 2-22

Table of Contents

NIC1/NIC2 LED Indicators ....................................................................... 2-22

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-23

Power Fail LED ........................................................................................ 2-23

Reset Button ........................................................................................... 2-24

Power Button ........................................................................................... 2-24

2-8 Connecting Cables ........................................................................................ 2-25

Power Connectors ................................................................................... 2-25

Fan Headers ............................................................................................. 2-26

IPMB ......................................................................................................... 2-26

TPM/Port 80 Header ................................................................................ 2-27

SATA DOM Power Connectors ................................................................ 2-27

Chassis Intrusion ..................................................................................... 2-28

Internal Speaker ....................................................................................... 2-28

T-SGPIO 1/2 Headers .............................................................................. 2-29

Power LED/Speaker ................................................................................. 2-29

Standby Power Header ............................................................................ 2-30

Power SMB (I

C) Connector .................................................................... 2-30

2-9 Jumper Settings ............................................................................................ 2-31

Explanation of Jumpers ................................................................................ 2-31

LAN Enable/Disable ................................................................................. 2-31

CMOS Clear ............................................................................................. 2-32

Watch Dog Enable/Disable ...................................................................... 2-32

VGA Enable .............................................................................................. 2-33

BMC Enable ............................................................................................ 2-33

I2C Bus to PCI-Exp. Slots ........................................................................ 2-34

TPM Support Enable ................................................................................ 2-34

Manufacturer Mode Select ....................................................................... 2-35

SAS Enable (for X10QBL-CT only) .......................................................... 2-35

2-10 Onboard LED Indicators ............................................................................... 2-36

LAN LEDs ................................................................................................. 2-36

IPMI Dedicated LAN LEDs ....................................................................... 2-36

Onboard Power LED ............................................................................... 2-37

BMC Heartbeat LED ................................................................................ 2-37

SAS Heartbeat LED (for X10QBL-CT only) ............................................ 2-38

SAS Activity LED (for X10QBL-CT only) .................................................. 2-38

2-11 SATA/SAS 3.0 Connections .......................................................................... 2-39

SATA 3.0 Ports ......................................................................................... 2-39

SAS 3.0 Ports (for X10QBL-CT only) ...................................................... 2-39

vii

X10QBL-CT/X10QBL Motherboard User’s Manual

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

3-2 Technical Support Procedures ........................................................................ 3-4

3-3 Battery Removal and Installation .................................................................... 3-6

3-4 Frequently Asked Questions ........................................................................... 3-7

3-5 Returning Merchandise for Service................................................................. 3-8

Chapter 4 BIOS

4-1 Introduction ...................................................................................................... 4-1

4-2 Main Setup ...................................................................................................... 4-2

4-3 Advanced Setup Congurations...................................................................... 4-4

4-4 Event Logs .................................................................................................... 4-36

4-5 IPMI ...............................................................................................................4-38

4-6 Security .........................................................................................................4- 40

4-7 Boot ............................................................................................................... 4 - 41

4-8 Save & Exit ................................................................................................... 4-43

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes .................................................................................A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Conguring SuperDoctor 5 .............................................................................B-2

Appendix C UEFI BIOS Recovery Instructions

C-1 An Overview to the UEFI BIOS ......................................................................C-1

C-2 How to Recover the UEFI BIOS Image (-the Main BIOS Block)....................C-1

C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1

viii

Chapter 1: Overview

Chapter 1

Overview

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention to

detail to provide you with the highest standards in quality and performance.

Note 1: The X10QBL(-CT) motherboard was designed to be used with a

Supermicro-proprietary chassis as an integrated server platform. It is not

to be used as a stand-alone product and will not be shipped independently

in a retail box. No motherboard shipping package will be provided in your

shipment.

Note 2: For your system to work properly, please follow the links below

to download all necessary drivers/utilities and the user's manual for your

system.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product Drivers and utilities: ftp://ftp.supermicro.com/

Note 3: For safety considerations, please refer to the complete list of safety

warnings posted on the Supermicro website at http://www.supermicro.com/

about/policies/safety_information.cfm.

If you have any questions, please contact our support team at support@

supermicro.com.

1-1

X10QBL-CT/X10QBL Motherboard User’s Manual

X10QBL(-CT) Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

revision available at the time of publishing of the manual. The motherboard

you've received may or may not look exactly the same as the graphics

shown in this manual.

1-2

CPU2 SLOT4PCI-E 3.0 X8

CPU2SLOT3 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CPU1

CPU2

CPU3

CPU4

LEDS1

I-SATA1

I-SATA2

I-SATA3

X10QBL-CT

Rev. 1.01

SAS CTRL

PCH

LEDBMC

USB0/1

IPMI_LAN

BMC

BIOS

LEDS2

LSAS0-3

LSAS4-7

FAN2

LEDPWR

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

JI2C1

JPL1

JPG1

JSTBY1

MAC CODE IPMI CODE

IB CODE

SAS CODE

BAR CODE

JPS4

J23

JSAS1

JSAS2

JF1

USB2

JBT1

BT2

COM1

SP1

JSD2

JSD1

JPI2C1

JD1

I-SGPIO2

I-SGPIO1

COM2

JPB1

JWD1

JPT1

JWP1

JPME2

JPS1

JPTG1

JIPMB1

I-SATA4

I-SATA5

I-SATA0

USB4/5 USB6/7

JTPM1

FAN10

FAN9

FAN8

FAN7

FAN6

FAN4

FAN5

FAN3

FAN1

LED15

UID

LAN1/2

JPWR2

JPWR3

JPWR5

JPWR4

JPWR1

JL1

JPSAS1

JI2C2

J17

LED1

P3M1-

DIMMA2

P2M1-DIMMD2

P2M1-DIMMC2

P1M1-DIMMA1

P1M1-DIMMB1

P1M1-DIMMC1

P1M1-DIMMD1

P2M1-DIMMA1

P2M1-DIMMC1

P2M1-DIMMD1

P3M1-

DIMMB1

P3M1-DIMMC1

P3M1-DIMMD1

P4M1-DIMMA1

P4M1-DIMMB1

P2M1-DIMMB1

P4M1-DIMMD2

P4M1-DIMMC2

P4M1-DIMMB2

P4M1-DIMMA2

P3M1-DIMMD2

P3M1-DIMMC2

P3M1-

DIMMB2

P3M1-

DIMMA1

P1M1-DIMMC2

P4M1-DIMMC1

P2M1-DIMMB2

P2M1-DIMMA2

P1M1-DIMMD2

P1M1-DIMMB2

P1M1-DIMMA2

P4M1-DIMMD1

USB8

CPU2 SLOT2 PCI-E 3.0 X8

LAN CTRL

SAS CTRL

BMC

PCH

CPLD

CMOS Battery

Memory VRM

VGA

Chapter 1: Overview

X10QBL(-CT) Motherboard Layout

Item/Description X10QBL-CT X10QBL

SAS Support Yes No

LSI SAS Controller 3008 Yes No

SAS0-3 (JSAS1) Supported No

Differences between the X10QBL-CT and the X10QBL

SAS4-7 (JSAS2) Supported No

LAN Connection Speed 10G (TGLAN) supported 1G (GLAN) supported

LAN Controller Intel NIC X540 Intel NIC i350

Platform High-end platform Entry-level, cost-effective

Note: For the latest CPU/memory updates, please refer to our website at

http://www.supermicro.com/products/motherboard/ for details.

1-3

CPU2 SLOT4PCI-E 3.0 X8

CPU2SLOT3 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CPU1

CPU2

CPU3

CPU4

LEDS1

I-SATA1

I-SATA2

I-SATA3

X10QBL-CT

Rev. 1.01

SAS CTRL

PCH

LEDBMC

USB0/1

IPMI_LAN

BMC

BIOS

LEDS2

LSAS0-3

LSAS4-7

FAN2

LEDPWR

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

JI2C1

JPL1

JPG1

JSTBY1

MAC CODE IPMI CODE

IB CODE

SAS CODE

BAR CODE

JPS4

J23

JSAS1

JSAS2

JF1

USB2

JBT1

BT2

COM1

SP1

JSD2

JSD1

JPI2C1

JD1

I-SGPIO2

I-SGPIO1

COM2

JPB1

JWD1

JPT1

JWP1

JPME2

JPS1

JPTG1

JIPMB1

I-SATA4

I-SATA5

I-SATA0

USB4/5 USB6/7

JTPM1

FAN10

FAN9

FAN8

FAN7

FAN6

FAN4

FAN5

FAN3

FAN1

LED15

UID

LAN1/2

JPWR2

JPWR3

JPWR5

JPWR4

JPWR1

JL1

JPSAS1

JI2C2

J17

LED1

P3M1-

DIMMA2

P2M1-DIMMD2

P2M1-DIMMC2

P1M1-DIMMA1

P1M1-DIMMB1

P1M1-DIMMC1

P1M1-DIMMD1

P2M1-DIMMA1

P2M1-DIMMC1

P2M1-DIMMD1

P3M1-

DIMMB1

P3M1-DIMMC1

P3M1-DIMMD1

P4M1-DIMMA1

P4M1-DIMMB1

P2M1-DIMMB1

P4M1-DIMMD2

P4M1-DIMMC2

P4M1-DIMMB2

P4M1-DIMMA2

P3M1-DIMMD2

P3M1-DIMMC2

P3M1-

DIMMB2

P3M1-

DIMMA1

P1M1-DIMMC2

P4M1-DIMMC1

P2M1-DIMMB2

P2M1-DIMMA2

P1M1-DIMMD2

P1M1-DIMMB2

P1M1-DIMMA2

P4M1-DIMMD1

USB8

CPU2 SLOT2 PCI-E 3.0 X8

LAN CTRL

SAS CTRL

BMC

PCH

CPLD

CMOS Battery

Memory VRM

VGA

X10QBL-CT/X10QBL Motherboard User’s Manual

X10QBL(-CT) Quick Reference

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

• " " indicates the location of "Pin 1".

• Jumpers/LED Indicators not indicated are for internal testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufac-

turer. Do not install the onboard battery upside down to avoid possible explosion.

1-4

Chapter 1: Overview

X10QBL(-CT) Jumpers

Jumper Description Default Setting

JBT1 Clear CMOS See Chapter 2

C1/JI2C2 SMB to PCI-E slots Off (Disabled)

JPB1 BMC Enable Pins 1-2 (Enabled)

JPG1 VGA Enable Pins 1-2 (Enabled)

JPL1 GLAN1/GLAN2 Enable (X10QBL) Pins 1-2 (Enabled)

JPTG1 10G-LAN1/ 10G-LAN2 Enable (X10QBL-CT) Pins 1-2 (Enabled)

JPT1 Trusted-Platform Module (TPM) Enable Pins 1-2 (Enabled)

JPME2 Manufacture Mode (ME) Select Pins 1-2 (Normal)

JPS1 SAS Enable (For X10QBL-CT) Pins 1-2 (Enabled)

JWD1 Watch-Dog Timer Enable Pins 1-2 (Reset)

X10QBL(-CT) Connectors

Connectors Description

BT2 (Battery) Onboard CMOS Battery (See Chpt. 3 for used battery

disposal.)

COM1/COM2 Back panel COM port 1/Serial port 2 header

FAN1-FAN10 CPU/System fan headers

I-SATA0-5 Intel SATA 3.0/2.0 ports 0-5 (I-SATA 3.0 ports 0/1, I-SA-

TA 2.0 ports 2-5) (supported by Intel PCH)

JD1 Speaker/Power LED header

JF1 Front Panel Control header

JIPMB1 4-pin external BMC I

C header (for IPMI-card support)

JL1 Chassis intrusion header

C1 Power System Management Bus (SMB) header

JPI

JPSAS1 (for X10QBL-CT) 2-pin power connector for SAS HDD status support

JPWR1 24-pin power connection header

JPWR2/3/4/5 8-pin power connectors

LAN1/2 (for X10QBL) Gigabit Ethernet LAN ports 1/2 (supported by Intel

i350 LAN controller)

LAN1/2 (for X10QBL-CT) 10G-LAN (TLAN) ports 1/2 (supported by Intel X540

LAN controller)

IPMI_LAN Gigabit IPMI-dedicated LAN on the I/O back panel

(supported by the BMC for IPMI use)

L-SAS0-3, L-SAS4-7 (for X10QBL-CT)

SAS ports 0-3, 4-7 (supported by LSI 3008 SAS controller)

JSD1/JSD2 SATA DOM (Device-On-Module) power connectors 1/2

1-5

X10QBL-CT/X10QBL Motherboard User’s Manual

JSTBY1 Standby power connection header

JTPM1 TPM (Trusted Platform Module)/Port 80 header

(CPU1) Slot1 PCI-Exp. 3.0x16 slot (supported by CPU1)

(CPU2) Slot2/4 PCI-Exp. 3.0x8 slots (supported by CPU2)

(CPU2) Slot3 PCI-Exp. 3.0x16 slot (supported by CPU2)

SP1 Internal speaker/buzzer

T-SGPIO1/2 Serial_Link General-purpose I/O connectors 1/2 for I-

(BP)USB0/1 Rear USB 2.0 ports 0/1 on the I/O back panel

(BP)USB2 Rear USB 2.0 port 2 on the I/O back panel

USB4/5 USB 2.0 connections 4/5 header for front access

USB6/7 USB 2.0 connections 6/7 header for front access

USB8 Type A USB 2.0 header 8

UID Unit-Identication (UID) button

VGA Back panel VGA port

LED Description State Status

LED1 Rear UID LED Blue: On Unit Identi-

LED15 (LEDPWR) Onboard Power LED On Power On

LEDBMC BMC Heartbeat LED Green: Blinking BMC Normal

SATA 0-5 support

X10QBL(-CT) LED Indicators

LEDS1 (for X10QBL-CT) SAS Heartbeat LED

Green: On

Red: On

LEDS2 (for X10QBL-CT) SAS Activity LED Green: Blinking SAS Active

SAS Normal

SAS Failed

1-6

Motherboard Features

Chapter 1: Overview

CPU

Memory

Chipset

Expansion

Slots

Graphics

Network

I/O Devices

• Quad Intel

sors; each processor supports dual full-width Intel

QuickPath Interconnect (QPI) links (of up to 9.6 GT/s

one direction per QPI)

E7-4800 v4 (Socket R1) series proces-

Note: For the latest CPU support updates,

please refer to our website at http://www.super-

micro.com/products/motherboard.

• Integrated memory controller supports:

Up to 2 TB of Load Reduced (LRDIMM) or up to 1

TB of Registered (RDIMM) DDR3 (240-pin) ECC

1600/1333/1066 MHz memory modules in 32 slots (2

DIMMs per channel).

Note: Memory speed support is pending on the

CPUs installed in the system. For the latest

memory updates, please refer to our website

at http://www.supermicro.com/products/moth-

erboard.

DIMM sizes

• DIMM Up to 64 GB @ 1.35V, 1.5V

• Intel® PCH C602J

• Two (2) PCI-E 3.0 x16 slots (CPU1 Slot1, CPU2

Slot3)

• Two (2) PCI-E 3.0 x8 slots (CPU2 Slot2, CPU2 Slot4)

• Graphics controller via ASpeed AST2400 BMC

(Baseboard Controller)

• Intel i350 Gigabit (10/100/1000 Mb/s) Ethernet con-

troller for LAN Port 1/Port 2 (X10QBL only),

• Intel X540 10-Gigabit Ethernet controller for 10G-

LAN (TLAN) Port1/Port 2 (X10QBL-CT only)

• ASpeed 2400 Baseboard Controller (BMC) supports

IPMI_LAN 2.0

SATA Connections

• SATA Ports • Two (2) SATA 3.0 ports (I-

SATA 1/2) (from Intel PCH)

• Four (4) SATA 2.0 connec-

tions (I-SATA 2-5) (from Intel

PCH)

• RAID RAID 0, 1, 5, 10

1-7

X10QBL-CT/X10QBL Motherboard User’s Manual

SAS Connections (For X10QBL-CT only)

• SAS 3.0 • SAS 0-3 (JSAS1),

• SAS 4-7 (JSAS2)

supported by the LSI 3008 SAS

controller

• RAID RAID 0, 1, 10

IPMI 2.0

• IPMI 2.0 supported by ASpeed AST 2400

Serial Port & COM Port Header

• One (1) Fast UART 16550 serial port header for front

access (COM2),

• One (1) COM port (COM1) on the IO back panel

Peripheral Devices

BIOS

Power

Management

USB Devices

• Two (2) USB 2.0 ports on the I/O back panel (USB

0/1)

• One (1) USB 2.0 on the I/O back panel (USB 2)

• Two (2) USB 2.0 headers provide four USB 2.0 con-

nections for front access support (USB 4/5, USB 6/7)

• One (1) USB 2.0 Type A for front access support

(USB 8)

• 16 MB SPI AMI BIOS

SM Flash UEFI BIOS

• APM 1.2, ACPI 3.0/4.0, USB keyboard, Plug & Play

(PnP), BIOS rescue hotkey, riser card auto-detection,

RTC (Real-Time Clock) wake-up, PCI Firmware 3.0,

SPI dual/quad speed support, and SMBIOS 2.7 &

later

• ACPI/ACPM power management

• S4, S5 support

• Wake-on-Ring (WOR) & Wake-on-LAN (WOL) sup-

port

• Power-on mode for AC power recovery

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel

Intelligent Power Node Manager 3.0 (Avail-

able when the Supermicro Power Manager [SPM] is

installed and special power supply is used.)

• Management Engine (ME)

1-8

Chapter 1: Overview

System Health

Monitoring

System Management

Dimensions

System Health/CPU Monitoring

• Onboard voltage monitoring for +1.2V, +3.3V, 3.3V

standby, +5V, +5V standby, +/-12V, CPU core,

memory, chipset, HT, and battery voltages

• CPU/System overheat LED and control

• 6+1 switch-phase voltage regulator

• CPU Thermal Trip support

• Status Monitor for speed control

• Status Monitor for On/Off control

Fan Control

• Fan status monitoring via IPMI connections

• Single Cooling Zone

• Low noise fan speed control

• Pulse Width Modulation (PWM) fan control

• PECI (Platform Environment Conguration Interface)

2.0/TSI support

• Chassis intrusion auto detection

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor 5, Watch Dog, NMI

• Chassis Intrusion header and detection

• 16.40" (L) x 16.79" (W) (426.47 mm x 424.18 mm)

Note: For IPMI Conguration instructions, please refer to the Embedded

IPMI Conguration User's Guide available @ http://www.supermicro.com/

support/manuals/.

1-9

X10QBL-CT/X10QBL Motherboard User’s Manual

DRAM

Memory Buffer CTRL

DRAM

Memory Buffer CTRL

DRAM

Memory Buffer CTRL

(X10QBL-CT only)

SAS3008

PCIE X16

PCIE PCIE

VMSE0

CPU2

VMSE1

VMSE0

CPU1

VMSE1

PCIE PCIE

PCIE X16

LSI

RJ45

X540

(X10QBL-CT)

(X10QBL)i350

USB

PCIE X8

QPI0

QPI2

QPI1 QPI2

QPI0

QPI1

QPI2 QPI2

DMI

PCH

USB

QPI0

QPI1

PCIE

CPU3

QPI0QPI1

CPU4

COM

Memory Buffer CTRL

VMSE0

VMSE1

VMSE0

VMSE1

RTL8201 RJ45

PHY

PHY PHY PHY

PCIE

BMC

VGA

Memory Buffer CTRL

DRAM

System Block Diagram

Note: This is a general block diagram and may not represent the features

on your motherboard. See the "Motherboard Features" pages for the actual

specications of each motherboard.

1-10

Chapter 1: Overview

1-2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel E7-4800 v4 processors

(Socket R1) and the Intel C602J PCH, the X10QBL(-CT) motherboard provides

the best solution for cost-effective, high-performance, cloud-computing platforms.

With support of the new Intel Microarchitecture 14nm Processing technology,

the X10QBL(-CT) dramatically increases performance for a multitude of server

applications.

The PCH C602J chip provides enterprise System Management Bus (SMbus) and

MCTP support with the following features included:

• DDR3 240-pin memory support on Socket R1

• Support for MCTP protocol and ME

• Support of SMBus speeds of up to 1 MHz for BMC connectivity

• GSX capable of GPIO expansion

• Improved I/O capabilities to high-storage-capacity congurations

• SPI Enhancements

• Intel® Node Manager 3.0 for advanced power monitoring

• BMC supports remote management, virtualization, and the security package

for enterprise platforms

1-11

X10QBL-CT/X10QBL Motherboard User’s Manual

1-3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will

respond when AC power is lost and then restored to the system. You can choose for

the system to remain powered off (in which case you must press the power switch

to turn it back on), or for it to automatically return to the power-on state. See the

Advanced BIOS Setup section for this setting. The default setting is Last State.

1-4 System Health Monitoring

This section describes the features of system health monitoring of the motherboard.

This motherboard has an onboard BaseBoard Management Controller (BMC) chip

that monitors system health. An onboard voltage monitor will scan the following on-

board voltages continuously: +1.2 V, +3.3V, 3.3V standby, +5V, +5V standby, +/-12V,

CPU core, memory, chipset, HT, and battery voltages. Once the voltage becomes

unstable, a warning is given, or an error message is sent to the screen. The user

can adjust the voltage thresholds to dene the sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

The system health monitoring support provided by the BMC controller can check

the RPM status of a cooling fan. The onboard CPU and chassis fan speeds are

controlled by IPMI thermal management.

Environmental Temperature Control

A thermal control sensor in the BMC monitors the CPU temperatures in real time

and will turn on the thermal control fan whenever the CPU temperature exceeds a

user-dened threshold. Once it detects that the CPU temperature is too high, it will

automatically turn on the thermal fan control to prevent the CPU from overheating.

The onboard BMC can monitor the overall system temperature and alert the user

when the chassis temperature is too high.

Note: To avoid possible system overheating, please be sure to provide

adequate airow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5. SuperDoctor 5 is used

to notify the user of certain system events. For example, you can congure

SuperDoctor 5 to provide you with warnings when the system temperature, CPU

1-12

Chapter 1: Overview

temperatures, voltages, and fan speeds go beyond a predened range.

1-5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-

tion denes a exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a system, including its

hardware, operating system and application software. This enables the system to

automatically turn on and off peripherals such as, network cards, hard disk drives

and printers.

In addition to operating system-directed power management, ACPI also provides

a generic system event mechanism for Plug and Play, and an operating system-

independent interface for conguration control. ACPI leverages the Plug and

Play BIOS data structures, while providing a processor architecture-independent

implementation that is compatible with the Windows 2008/R2 and Windows 2012/

R2 operating systems.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

The X10QBL(-CT) motherboard accommodates a 24-pin ATX main power (JPWR1)

and four 8-pin 5V power connectors (JPWR2-5). To provide adequate power to your

system, be sure to connect all these power connectors to your power supply. Also,

be sure to use the power supply recommended for this motherboard by Supermicro.

It is recommended that you also install a power surge protector to help avoid prob-

lems caused by power surges.

1-7 Advanced Power Management

The following new advanced power management features are supported by this

motherboard:

Intel® Intelligent Power Node Manager (NM) (Available when the Supermicro Power Manager [SPM] is Installed)

The Intel® Intelligent Power Node Manager 3.0 (IPNM) provides your system with

real-time thermal control and power management for maximum energy efciency.

Although IPNM Specication Version 1.5/2.0 is supported by the BMC (Baseboard

Management Controller), your system must also have IPNM-compatible Manage-

ment Engine (ME) rmware installed to use this feature.

1-13

X10QBL-CT/X10QBL Motherboard User’s Manual

Note: Support for IPNM Specication Version 1.5 or Vision 2.0 depends

on the power supply used in the system.

Management Engine (ME)

Management Engine, an ARC controller embedded in the PCH, provides Server

Platform Services (SPS) support to your system. The services provided by SPS are

different from those provided by the ME on the client platforms.

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user

of situations which may cause bodily injury. Should you have questions or experi-

ence difculty, contact Supermicro Technical Support for assistance. Only certied

technicians should attempt to install or congure components.

Read this section in its entirety before installing or conguring components in the

Supermicro chassis.

Battery Handling

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the

battery only with the same or equivalent type recommended by the manufacturer.

Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。交換する電池はメーカーが推奨する型、または同等のものを使用下さい。使用済電池は製造元の指示に従

って処分して下さい。

警告电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更换原有电池。请按制造商的说明处理废旧电池。

警告電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有電池。請按照製造商的說明指示處理廢棄舊電池。

Warnung

Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.

Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

2-1

X10QBL-CT/X10QBL Motherboard User’s Manual

Attention

Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.

Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!

Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-

dado por el fabricante. Desechar las baterías gastadas según las instrucciones

del fabricante.

경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일 하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사 의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing

Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-

bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften

afgevoerd te worden.

2-2

Chapter 2: Installation

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws

and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が

あります。

警告本产品的废弃处理应根据所有国家的法律和规章进行。

警告本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung

Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.

¡Advertencia!

Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.

Attention

La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de

l'organisme compétent.

2-3

X10QBL-CT/X10QBL Motherboard User’s Manual

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Waarschuwing

De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

2-2 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam-

aging your motherboard, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the motherboard from the

antistatic bag.

• Handle the motherboard by its edges only; do not touch its components, periph-

eral chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not

in use.

• For grounding purposes, make sure that your system chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage.

When unpacking the motherboard, make sure that the person handling it is static

protected.

2-4

Chapter 2: Installation

2-3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Although a chassis may have both plastic and metal mounting fas-

teners, metal ones are highly recommended because they ground the motherboard

to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

• Phillips Screwdriver

• Pan head screws (14 pieces)

• Standoffs (14 pieces, if needed)

Location of Mounting Holes

There are fourteen (14) mounting holes on this motherboard indicated by the circles.

MAC CODE IPMI CODE BAR CODE SAS CODE

X10QBL-CT

Rev. 1.01

Caution: 1) To avoid damaging the motherboard and its components, please do

not use a force greater than 8 lb/inch on each mounting screw during motherboard

installation. 2) Some components are very close to the mounting holes. Please take

precautionary measures to prevent damaging those components when installing the

motherboard to the chassis.

IB CODE

2-5

X10QBL-CT/X10QBL Motherboard User’s Manual

Installing the Motherboard

Note: Always connect the power cord last, and always remove it before

adding, removing or changing any hardware components.

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes

on the motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother-

board components.

6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting

hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-6

Chapter 2: Installation

2-4 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the

label area. Also, improper CPU installation or socket/pin misalignment can cause seri-

ous damage to the CPU or the motherboard and may result in RMA repairs. Be sure

to read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

Always connect the power cord last, and always remove it before adding,

removing or changing any hardware components. Make sure that you in-

stall the processor into the CPU socket before you install the CPU heatsink.

If you buy a CPU separately, make sure that you use an Intel-certied

multi-directional heatsink only.

Make sure to install the motherboard into the chassis before you install

the CPU heatsink.

When receiving a motherboard without a processor pre-installed, make

sure that the plastic CPU socket cap is in place, and none of the socket

pins are bent; otherwise, contact your retailer immediately.

Refer to the Supermicro website for updates on CPU support.

Installing the E7-4800 v4 Series Processor

1. There are two load levers on the processor socket. To open the socket lever,

rst press and release the load lever labeled 'Open 1st'.

1 2

OPEN 1st

Press down

Load Lever

labeled 'Open 1st'.

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-7

OPEN 1st

X10QBL-CT/X10QBL Motherboard User’s Manual

2. Press the second load lever labeled 'Close 1st' to release the load plate that

covers the CPU socket from its locking position.

3. With the lever labeled 'Close 1st' fully retracted, gently push down on the

lever labeled 'Open 1st' to open the load plate. Lift the load plate to open it

completely.

Press down on the

Load Lever labeled 'Close

OPEN 1st

1st'

Gently push down to pop the load plate open.

Pull the lever away

from the socket

OPEN 1st

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-8

Chapter 2: Installation

4. Use your thumb and the index nger to loosen the lever and open the load

plate.

5. Using your thumb and index nger, hold the CPU on its edges. Align the CPU

keys, which are semi-circle cutouts, against the socket keys.

Socket Keys

CPU Keys

6. Once they are aligned, carefully lower the CPU straight down into the socket.

(Do not drop the CPU on the socket. Do not move the CPU horizontally or

vertically. Do not rub the CPU against the surface or against any pins of the

socket to avoid damaging the CPU or the socket.)

Warning: You can only install the CPU

inside the socket in one direction. Make

sure that it is properly inserted into the

CPU socket before closing the load

plate. If it doesn't close properly, do not

force it as it may damage your CPU.

Instead, open the load plate again to

make sure that the CPU is aligned

properly.

2-9

X10QBL-CT/X10QBL Motherboard User’s Manual

7. With the CPU inside the socket, inspect the four corners of the CPU to make

sure that the CPU is properly installed.

Gently close

1 2

the load plate.

8. Close the load plate with the CPU inside the socket. Lock the lever labeled

'Close 1st' rst, then lock the lever labeled 'Open 1st' second. Using your

thumb gently push the load levers down to the lever locks.

Lever Lock

Push down and

OPEN 1st

lock the lever

labeled 'Open

Push down and lock the

lever labeled 'Close 1st'.

OPEN 1st

1st'.

2-10

Lever Lock

Chapter 2: Installation

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are

aligned with those on the motherboard and the heatsink bracket underneath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug

(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Screw#2

Screw#1

OPEN 1st

2-11

Mounting Holes

X10QBL-CT/X10QBL Motherboard User’s Manual

Removing the Heatsink

Warning: We do not recommend that the heatsink be removed. However, if you do

need to uninstall the heatsink, please follow the instructions below to uninstall the

heatsink to prevent damage done to the CPU, the CPU socket or the heatsink.

1. Unscrew the heatsink screws from the motherboard in the sequence as

shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU socket. (Do not use

excessive force when wriggling the heatsink!)

3. Once the heatsink is loosened from the socket, remove it from the CPU

socket.

4. To reinstall the heatsink, remove the used thermal grease and clean the

surface of the CPU and the heatsink, reapply the proper amount of thermal

grease on the surface before reinstalling the heatsink.

Loosen screws in sequence as shown.

Screw#4

Screw#2

Screw#1

Screw#3

Note: All graphics, drawings and pictures shown in this manual are for il-

lustration only. The components that came with your machine may or may

not look exactly the same as those shown in this manual.

2-12

Chapter 2: Installation

2-5 Installing and Removing the Memory Modules

Note: Check Supermicro's website for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage.

Installing & Removing DIMMs

1. Insert the desired number of DIMMs into the memory slots, starting with

P1M1-DIMMA1. (For best performance, please use the memory modules of

the same type and speed in the same bank.)

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

MAC CODE

IPMI CODE

P1M1_A1-B2

X10QBL-CT

Rev. 1.01

P1M1_C1-D2

BAR CODE SAS CODE

IB CODE

P3M1_C1-D2

P3M1_A1-B2

Release Tabs

Notches

P2M1_A1-B2

P4M1_C1-D2

P2M1_C1-D2

P4M1_A1-B2

3. Align the key of the DIMM module with the receptive point on the memory

slot.

4. Align the notches on both ends of the module against the receptive points on

the ends of the slot.

5. Use two thumbs together to press the notches on both ends of the module

straight down into the slot until the module snaps into place.

6. Press the release tabs to the locking positions to secure the DIMM module

into the slot.

Press both notches straight

down into the memory slot at

the same time.

Removing Memory Modules

Press both notches on the ends of the DIMM module to unlock it. Once the DIMM

module is loosened, remove it from the memory slot.

2-13

X10QBL-CT/X10QBL Motherboard User’s Manual

Memory Support for the X10QBL(-CT) Motherboard

The X10QBL(-CT) Motherboard supports 240-pin DDR3 ECC memory of up to 1 TB

of Registered (RDIMM) or up to 2 TB of Load Reduced (LRDIMM) 1600/1333/1066

MHz modules in 32 slots (2 DIMMs per channel). For the latest memory updates,

please refer to our website a at http://www.supermicro.com/products/motherboard.

Processor & Memory Module Population Conguration

For memory to work properly, follow the tables below for memory installation.

Fully-Populated Conguration

Please follow the instructions below to populate all DIMM slots:

Processors and their Corresponding Memory

Modules

CPU# Corresponding DIMM Modules for Full-Populated Congura-

CPU 1

(P1M1-)

CPU2

(P2M1-)

CPU3

(P3M1-)

CPU4

(P4M1-)

P1M1-

DIMM A1/B1

P2M1-

DIMM A1/B1

P3M1-

DIMM A1/B1

P4M1-

DIMM A1/B1

DIMM C1/D1

P1M1-

P2M1-

P3M1-

P4M1-

tion

DIMM A2/B2

P1M1-

P2M1-

P3M1-

P4M1-

P1M1-

DIMM C2/D2

P2M1-

DIMM C2/D2

P3M1-

DIMM C2/D2

P4M1-

DIMM C2/D2

Half-Populated Conguration

Please follow the instructions below to populate half of the DIMM slots:

Processors and their

Corresponding Memory

Modules

CPU# Corresponding DIMM

CPU 1

(P1M1-)

CPU2

(P2M1-)

CPU3

(P3M1-)

CPU4

(P4M1-)

Modules for Full-Populated

Conguration

P1M1-

DIMM A1/B1

P2M1-

DIMM A1/B1

P3M1-

DIMM A1/B1

P4M1-

DIMM A1/B1

P1M1-

DIMM C1/D1

P2M1-

DIMM C1/D1

P3M1-

DIMM C1/D1

P4M1-

DIMM C1/D1

2-14

Chapter 2: Installation

Performance Mode (2:1) - DDR3 RDIMM + LRDIMM Configuration

Max Speed (GHz) ; Voltage (V);

Slot Per Channel (SPC) and DIMM Per Channel (DPC)

2 SPC 3 SPC

1DPC 2DPC 1DPC 2DPC 3DPC

1.5V 1.35V 1.5V 1.35V 1.5V 1.35V

1333 1333 1333 1066 1066

N/A

1333 1333 1333 1066 1066 N/A

1066 1066 N/A N/A N/A N/A

1333 1333 1333 1333 1333

N/A

1066 N/A 1066 N/A 1066 N/A

Lockstep Mode (1:1) - DDR3 RDIMM + LRDIMM Configuration

Max Speed (MT/s) ; Voltage (V);

Slot Per Channel (SPC) and DIMM Per Channel (DPC)

2 SPC 3 SPC

supported for

1DPC 2DPC 1DPC 2DPC 3DPC

1.5V 1.35V 1.5V 1.35V 1.5V 1.35V

1333 1333 1333

1066 N/A

1066

1333 1333 1333 1066 1066 N/A

1066 1066 N/A N/A N/A N/A

1600 1333 1600 1333 1600 1333 1333 N/A

1066 N/A 1066 N/A 1066 N/A

RDIMM/LRDIMM DDR3 ECC in Performance Mode (2:1)

Ranks Per DIMM

and Data Width (x8 is supported for RDIMMs but

Type

RDIMM SRx4 4GB 8GB 1333 1333 1333 1333

RDIMM DRx4 8GB 16GB 1333 1333 1333 1333

RDIMM QRx4 16GB 32GB 1066 1066 1066 1066

LRDIMM QRx4 16GB 32GB 1333 1333 1333 1333

LRDIMM (RM) 8Rx4 32GB 64GB 1066 N/A 1066 N/A

not listed)

SR Single Rank DR Dual Rank QR Quad Rank

Max DIMM

Capacity (GB)

2Gb 4Gb 1.5V 1.35V 1.5V 1.35V

Speed (MT/s), & DIMM per Channel (DPC)

RDIMM/LRDIMM DDR3 ECC in Lockstep Mode (1:1)

Speed (MT/s), & DIMM

Ranks Per

DIMM and Data

Width (x8 is

Type

RDIMMs but

not listed)

RDIMM SRx4 4GB 8GB 1600 1333 1600 1333

RDIMM DRx4 8GB 16GB 1600 1333 1600 1333

RDIMM QRx4 16GB 32GB 1066 1066 1066 1066

LRDIMM QRx4 16GB 32GB 1600 1333

LRDIMM (RM) 8Rx4 32GB 64GB 1066 N/A 1066 N/A

Max DIMM

Capacity (GB)

2Gb 4Gb 1.5V 1.35V 1.5V 1.35V

per Channel (DPC)

An Important Note:

• For the memory modules to work properly, please install DIMM modules of the

same type, same speed, and same operating frequency in the motherboard.

Mixing of DIMM modules of different types or different speeds is not allowed.

2-15

X10QBL-CT/X10QBL Motherboard User’s Manual

X10QBL-CT

Rev. 1.01

MAC CODE

IPMI CODE

IB CODE

SAS CODE

BAR CODE

123456789

2-6 Control Panel Connectors and I/O Ports

The I/O por ts are color coded in conformance with the industry standards. See

the picture below for the colors and locations of the various I/O ports.

Back Panel Connectors and I/O Ports

Back Panel I/O Port Locations and Denitions

1. COM Port 1

2. Back Panel (Vertical) USB 2.0 Port 2

3. VGA (Blue)

4. Back Panel USB 2.0 Port 0

5. Back Panel USB 2.0 Port 1

6. IPMI_LAN

7. Gigabit_LAN 1 (X10QBL-CT), 10G-LAN (TLAN) 1 (X10QBL)

8. Gigabit_LAN 2 (X10QBL-CT), 10G-LAN (TLAN) 2 (X10QBL)

9. UID Switch/UID LED (LED1)

2-16

Chapter 2: Installation

CPU2 SLOT4PCI-E 3.0 X8

CPU2SLOT3 PCI-E 3.0 X16

CPU1 SLOT1 PCI-E 3.0 X16

CPU1

CPU2

CPU3

CPU4

LEDS1

I-SATA1

I-SATA2

I-SATA3

X10QBL-CT

Rev. 1.01

SAS CTRL

PCH

LEDBMC

USB0/1

IPMI_LAN

BMC

BIOS

LEDS2

LSAS0-3

LSAS4-7

FAN2

LEDPWR

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

CLOSE 1st

OPEN 1st

JI2C1

JPL1

JPG1

JSTBY1

MAC CODE

IPMI CODE

IB CODE

SAS CODE

BAR CODE

JPS4

J23

JSAS1

JSAS2

JF1

USB2

JBT1

BT2

COM1

SP1

JSD2

JSD1

JPI2C1

JD1

I-SGPIO2

I-SGPIO1

COM2

JPB1

JWD1

JPT1

JWP1

JPME2

JPS1

JPTG1

JIPMB1

I-SATA4

I-SATA5

I-SATA0

USB4/5 USB6/7

JTPM1

FAN10

FAN9

FAN8

FAN7

FAN6

FAN4

FAN5

FAN3

FAN1

LED15

UID

LAN1/2

JPWR2

JPWR3

JPWR5

JPWR4

JPWR1

JL1

JPSAS1

JI2C2

J17

LED1

P3M1-

DIMMA2

P2M1-DIMMD2

P2M1-DIMMC2

P1M1-DIMMA1

P1M1-DIMMB1

P1M1-DIMMC1

P1M1-DIMMD1

P2M1-DIMMA1

P2M1-DIMMC1

P2M1-DIMMD1

P3M1-

DIMMB1

P3M1-DIMMC1

P3M1-DIMMD1

P4M1-DIMMA1

P4M1-DIMMB1

P2M1-DIMMB1

P4M1-DIMMD2

P4M1-DIMMC2

P4M1-DIMMB2

P4M1-DIMMA2

P3M1-DIMMD2

P3M1-DIMMC2

P3M1-

DIMMB2

P3M1-

DIMMA1

P1M1-DIMMC2

P4M1-DIMMC1

P2M1-DIMMB2

P2M1-DIMMA2

P1M1-DIMMD2

P1M1-DIMMB2

P1M1-DIMMA2

P4M1-DIMMD1

USB8

CPU2 SLOT2 PCI-E 3.0 X8

LAN CTRL

SAS CTRL

BMC

PCH

CPLD

CMOS Battery

Memory VRM

VGA

234

567

COM Port/Serial Connection Header

A COM port (COM1) is located next to USB

2 on the I/O back panel. In addition, a serial

port connection header (COM2) is located

next to the PCI-E 3.0 x16 slot (CPU1 Slot1)

on the motherboard. See the table on the

right for pin denitions.

COM Port/Serial Header

Pin Denitions

Pin # Denition Pin # Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

Universal Serial Bus (USB)

Three USB2.0 ports (USB 0/1, USB 2) are located on the I/O back panel. Two

internal USB headers, located next to the I-SATA ports 4/5, provide four USB 2.0

connections (USB 4/5, 6/7) for front access. In addition, a Type A USB header, lo-

cated close to the 24-pin main power (JPWR1), also provides USB 2.0 connection

(USB 8) for front panel support. (Cables are not included). See the tables below

for pin denitions.

Back Panel USB 2.0 (USB 0/1)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 5 +5V

2 USB_PN1 6 USB_PN0

3 USB_PP1 7 USB_PP0

4 Ground 8 Ground

Back panel USB 2 (2.0)

Pin Deni-

tions

Pin# Denition

1 +5V

2 PO-

3 PO+

4 Ground

5 NA

Front Panel USB 2.0 (USB 4/5, 6/7, 8)

Pin Denitions

Pin # Denition Pin # Denition

1 +5V 2 +5V

3 USB_PN2 4 USB_PN3

5 USB_PP2 6 USB_PP3

7 Ground 8 Ground

9 Key 10 Ground

1. COM Port 1 (COM1)

2. Serial Port Header (COM2)

3. Backpanel USB0 (USB2.0)

4. Backpanel USB1 (USB2.0)

5. Backpanel USB2 (Vertical USB2.0)

2-17

6. Backpanel USB4/5 (USB2.0)

7. Backpanel USB6/7 (USB2.0)

8. Type A USB8 (USB 2.0)

X10QBL-CT/X10QBL Motherboard User’s Manual

X10QBL-CT

Rev. 1.01

MAC CODE IPMI CODE

IB CODE

SAS CODE

BAR CODE

123

Video Connection

A Video (VGA) port is located next

to USB Port 2 on the I/O back panel.

Refer to the motherboard layout below

for the location.

Ethernet Ports

Two Ethernet ports (LAN1, LAN2) are

located on the I/O back panel. These

Ethernet ports support 10G-LAN

(TLAN) connections (10G-LAN 1/2) on

the X10QBL-CT, and gigabit LAN con-

nections (GLAN 1/2) on the X10QBL.

In addition, an IPMI_LAN located on

the back panel provides support for

IPMI 2.0 interface. All Ethernet ports

accept RJ45 type cables. Please refer

to the LED Indicator section for LAN

LED information.

LAN Ports

Pin Denition

Pin# Denition

1 P2V5SB 10 SGND

2 TD0+ 11 Act LED

3 TD0- 12 P3V3SB

4 TD1+ 13 Link 100 LED

5 TD1- 14 Link 1000 LED

6 TD2+ 15 Ground

7 TD2- 16 Ground

8 TD3+ 17 Ground

9 TD3- 18 Ground

(Yellow, +3V3SB)

(NC: No Connection)

1. COM Port1

2. LAN1 (10G-LAN for X10QBL-CT,

GLAN for X10QBL)

3. LAN2 (10G-LAN for X10QBL-CT,

GLAN for X10QBL)

4. IPMI_LAN (GLAN for X10QBL(-CT))

2-18

Chapter 2: Installation

X10QBL-CT

Rev. 1.01

MAC CODE IPMI CODE

IB CODE

SAS CODE

BAR CODE

Unit Identier Switches/UID LED

Indicators

A rear Unit Identier (UID) switch (JUIDB1)

and a rear LED (LE1) are located close to

LAN ports 1/2 on the rear side of the moth-

erboard. The front UID switch is located at

pin 13 of the Front Control Panel (JF1), while

the front UID LED is located on pin 7 of JF1.

When you press the front UID switch or the

rear one, both front and rear UID LEDs will

be turned on. Press the UID button again to

turn off the LED indicator. The UID Indicators

provide easy identication of a system unit

that may be in need of service.

Note: UID can also be triggered via

IPMI on the motherboard. For more

information on IPMI, please refer to

the IPMI User's Guide posted on

our website @http://www.super-

micro.com.

UID Switch

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Ground

Color/State Status

Blue: On Unit Identied

Ground

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/ PWR Fail LED)

Power Fail LED

Ground

UID LED

Status

1920

NMI

3.3 V

UID LED

NIC1 Activity LED

NIC2 Activity LED

Blue LED Cathode

3.3V

Reset

Reset Button

Power Button

PWR

1. Rear UID Switch

2. Rear UID LED

3. Front UID Switch

4. Front UID LED

2-19

X10QBL-CT/X10QBL Motherboard User’s Manual

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo-

cated on a control panel at the front of the chassis. These connectors are designed

specically for use with Supermicro's server chassis. See the gure below for the

descriptions of the various control panel buttons and LED indicators. Refer to the

following section for descriptions and pin denitions.

JF1 Header Pins

1920

Ground

NMI

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

OH/Fan Fail/ PWR Fail LED)

Power Fail LED

MAC CODE IPMI CODE BAR CODE SAS CODE

X10QBL-CT

Rev. 1.01

Ground

IB CODE

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

Reset Button

Power Button

PWR

2-20

Front Control Panel Pin Denitions

Chapter 2: Installation

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin denitions.

Power LED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin denitions.

Ground

NMI Button

Pin Denitions (JF1)

Pin# Denition

19 Control

20 Ground

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

A. NMI

B. PWR LED

1920

NMI

X10QBL-CT

Rev. 1.01

MAC CODE IPMI CODE BAR CODE

SAS CODE

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

IB CODE

OH/Fan Fail/ PWR Fail LED)

Power Fail LED

Ground

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

Reset Button

Power Button

2-21

X10QBL-CT/X10QBL Motherboard User’s Manual

HDD/UID LED

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach a

cable here to indicate HDD activity

and UID status. See the table on the

right for pin denitions.

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control-

ler) LED connection for LAN port 1 is

located on pins 11 and 12 of JF1, and

the LED connection for LAN port 2 is

on pins 9 and 10. Attach the NIC LED

cables here to display network activity.

Refer to the table on the right for pin

denitions.

Ground

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 UID LED

14 HD Active

GLAN1/2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

10 NIC 2 Link LED

11 NIC 1 Activity LED

12 NIC 1 Link LED

A. HDD/UUID LED

B. NIC1 LED

C. NIC2 LED

1920

NMI

X10QBL-CT

Rev. 1.01

IPMI CODE

MAC CODE

BAR CODE SAS CODE

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

IB CODE

OH/Fan Fail/ PWR Fail LED)

Power Fail LED

Ground

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

Reset Button

Power Button

2-22

Chapter 2: Installation

Overheat (OH)/Fan Fail/PWR Fail/ UID LED

Connect an LED cable to pins 7 and

8 of JF1 to use the Overheat/Fan Fail/

Power Fail and UID LED connections.

The red LED on pin 8 provides warn-

ings for overheating, fan failure or

power failure. The blue LED on pin

7 works as the front panel UID LED

indicator. Refer to the table on the

right for pin denitions.

Power Fail LED

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

denitions.

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Denitions (JF1)

Pin# Denition

7 Blue_UID LED

8 OH/Fan Fail/Power Fail

OH/Fan Fail/PWR Fail

LED Status (Red LED)

State Denition

Off Normal

On Overheat

Flashing Fan Fail

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

A. OH/Fail/PWR Fail LED

B. PWR Supply Fail

X10QBL-CT

Rev. 1.01

MAC CODE IPMI CODE BAR CODE SAS CODE

1920

Ground

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

IB CODE

OH/Fan Fail/

PWR Fail LED)

Power Fail LED

Ground

NMI

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

Reset Button

Power Button

2-23

X10QBL-CT/X10QBL Motherboard User’s Manual

Reset Button

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case. Refer to the table on the right for

pin denitions.

Power Button

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. To turn on or off the system

power, press the button for 4 seconds or

longer. Refer to the table on the right for

pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

A. Reset Button

B. PWR Button

X10QBL-CT

Rev. 1.01

IPMI CODE

MAC CODE

BAR CODE SAS CODE

1920

Ground

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

IB CODE

OH/Fan Fail/ PWR Fail LED)

Power Fail LED

Ground

NMI

3.3 V

UID Switch

NIC1 Activity LED

NIC2 Activity LED

UID LED

3.3V

Reset

PWR

Reset Button

Power Button

2-24

2-8 Connecting Cables

Chapter 2: Installation

Power Connectors

A 24-pin main power supply connector

(JPWR1), and four 8-pin CPU power con-

nectors (JPWR2/JPWR3/JPWR4/JPWR5)

are located on the motherboard. These

power connectors meet the SSI EPS 12V

specication and must be connected to your

power supply to provide adequate power to

the system. See the tables on the right for

pin denitions.

Warning: To provide adequate power sup-

ply to the motherboard, be sure to connect

the 24-pin ATX PWR (JPWR1), and the four

8-pin PWR connectors (JPWR2/3/4/5) to the

power supply. Failure to do so may void the

manufacturer warranty on your power supply

and motherboard.

USB0/1

I-SATA4

I-SATA2

I-SATA3

I-SATA0

I-SGPIO2

JSAS2

I-SATA5

I-SATA1

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

LAN CTRL

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

UID

LED1

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

IPMI_LAN

LAN1/2 FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

P2M1-DIMMC2

P2M1-DIMMC1

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

FAN6

FAN5

USB2

VGA

COM1

MAC CODE IPMI CODE BAR CODE

SAS CODE

CLOSE 1st

P2M1-DIMMA2

P2M1-DIMMA1

ATX Power 24-pin Connector

Pin Denitions

Pin# Denition Pin # Denition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 GND 3 GND

16 PS_ON 4 +5V

17 GND 5 GND

18 GND 6 +5V

19 GND 7 GND

20 -5V 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 GND 12 +3.3V

12V 8-pin Power Connec-

tor Pin Denitions

Pins Denition

1 through 4 Ground

5 through 8 +12V

FAN8

P3M1-

FAN9

Memory VRM

IB CODE

CPU3

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

FAN4

FAN3

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

LED15

JF1

LEDPWR

FAN2

FAN1

A.JPWR1 (24-pin

PWR)

B.JPWR2 (8-pin PWR)

C.JPWR3 (8-pin PWR)

D.JPWR4 (8-pin PWR)

E.JPWR5 (8-pin PWR)

J17

2-25

X10QBL-CT/X10QBL Motherboard User’s Manual

Fan Headers

This motherboard has ten system/CPU fan head-

ers (Fan1-Fan10) on the motherboard. These

4-pin fan headers are backward compatible with

the traditional 3-pin fans. However, fan speed

control is available for 4-pin fans only by thermal

management via IPMI 2.0 interface. See the table

on the right for pin denitions.

IPMB

A System Management Bus header for IPMI 2.0

is located at JIPMB1. Connect an appropriate

cable here to use the IPMB I2C connection on

your system.

USB0/1

I-SATA4

I-SATA5

I-SATA2

I-SATA3

I-SATA0

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

UID

LAN1/2 FAN10

P1M1-DIMMB2

OPEN 1st

IPMI_LAN

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

USB2

VGA

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE BAR CODE

SAS CODE

IB CODE

CLOSE 1st

CPU3

P2M1-DIMMA2

P2M1-DIMMA1

Memory VRM

OPEN 1st

P4M1-DIMMD2

P4M1-DIMMD1

Pin# Denition

1 Ground

2 +12V

3 Tachometer

4 PWR Modulation

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

Fan Header

Pin Denitions

IPMB Header

Pin Denitions

A. Fan 1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. Fan 7

H. Fan 8

I. Fan 9

J. Fan 10

K. JIPMB1

J17

P2M1-DIMMD2

P2M1-DIMMD1

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN7

FAN5

FAN4

FAN3

LED15

JF1

LEDPWR

FAN2

FAN1

2-26

Chapter 2: Installation

I-SATA2

USB0/1

I-SATA4

I-SATA0

TPM/Port 80 Header

A Trusted Platform Module/Port 80

header, located at JTPM1, provides

TPM support and Port 80 connection.

Use this header to enhance system

performance and data security. See

the table on the right for pin denitions.

Pin # Denition Pin # Denition

1 LCLK 2 GND

3 LFRAME# 4 <(KEY)>

5 LRESET# 6 +5V (X)

7 LAD 3 8 LAD 2

9 +3.3V 10 LAD1

TPM/Port 80 Header

Pin Denitions

11 LAD0 12 GND

13 SMB_CLK4 14 SMB_DAT4

15 +3V_DUAL 16 SERIRQ

17 GND 18 CLKRUN# (X)

19 LPCPD# 20 LDRQ# (X)

SATA DOM Power Connectors

Two power connectors for SATA DOM

(Disk_On_Module) devices are located

at JSD1/JSD2. Connect appropriate

cables here to provide power support

for your Serial-Link DOM devices.

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2 FAN10

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

JPME2

JPS1

JPS4

JI2C1

JSTBY1

BT2

CMOS Battery

LEDS2

SP1

BIOS

LEDS1

JPWR1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

COM2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

I-SATA5

PCH

I-SATA3

JSD1

JSD2

I-SATA1

J23

CPLD

I-SGPIO1

I-SGPIO2

JSAS2

JSAS1

JPWR3

JPI2C1

JPWR4

LSAS4-7

LSAS0-3

JPWR5

JWP1

JL1

USB8

JPWR2

JPSAS1

SAS CTRL SAS CTRL

Memory VRM

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

P1M1-DIMMD2

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

USB2

VGA

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE BAR CODE SAS CODE

IB CODE

CLOSE 1st

OPEN 1st

CPU3

P2M1-DIMMA2

P4M1-DIMMD2

P4M1-DIMMD1

P2M1-DIMMA1

Memory VRM

DOM PWR

Pin Denitions

Pin# Denition

1 +5V

2 Ground

3 Ground

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

J17

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

A. TPM/80 Port

B. JSD1

C. JSD2

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-27

FAN4

FAN3

LED15

JF1

LEDPWR

FAN2

FAN1

X10QBL-CT/X10QBL Motherboard User’s Manual

I-SATA2

I-SATA0

Chassis Intrusion

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach an

appropriate cable from the chassis to

inform you of a chassis intrusion when

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

the chassis is opened.

Internal Speaker

The Internal Speaker (SP1) can be

used to provide audible indications

for various beep codes. See the table

on the right for pin denitions. Refer

Internal Buzzer

Pin Denition

Pin# Denitions

Pin 1 Pos. (+) Beep In

Pin 2 Neg. (-) Alarm Speaker

to the layout below for the location of

the internal buzzer.

USB0/1

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2

FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

JPME2

JPS1

JPS4

JI2C1

JSTBY1

BT2

CMOS Battery

LEDS2

SP1

BIOS

LEDS1

JPWR1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

COM2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

I-SATA4

PCH

I-SATA5

PCH

I-SATA3

JSD1

JSD2

I-SATA1

J23

CPLD

I-SGPIO1

I-SGPIO2

JPSAS1

LSAS4-7

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

LSAS0-3

JPWR5

JWP1

JL1

USB8

JPWR2

SAS CTRL SAS CTRL

P2M1-DIMMD2

P2M1-DIMMD1

P2M1-DIMMC2

P2M1-DIMMC1

FAN7

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

FAN6

FAN5

USB2

VGA

COM1

FAN9

Memory VRM

MAC CODE

IPMI CODE

BAR CODE SAS CODE

CLOSE 1st

CPU3

P2M1-DIMMA2

P2M1-DIMMA1

FAN4

IB CODE

OPEN 1st

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

FAN3

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

OPEN 1st

P4M1-DIMMC2

P4M1-DIMMC1

LED15

LEDPWR

FAN2

FAN1

FAN8

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

Memory VRM

JF1

CLOSE 1st

A. Chassis In-

trusiton

B. Internal Speak-

J17

2-28

Chapter 2: Installation

USB0/1

UID

T-SGPIO 1/2 Headers

Two SGPIO (Serial_Link General Pur-

pose Input/Output) headers are locat-

ed on the motherboard. T-SGPIO1/2

supports onboard SATA connections

on the X10QBL(-CT). See the table

on the right for pin denitions.

Power LED/Speaker

Pins 1-3 of JD1 are used for power

LED indication, and pins 4-7 are for

the speaker. Please note that the

speaker connector pins (4-7) are used

with an external speaker. To use the

onboard speaker, please close pins

6-7 with a cap. See the tables on the

right for pin denitions.

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

LAN1/2

FAN10

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

I-SATA4

I-SATA2

I-SATA3

I-SATA0

I-SGPIO2

JSAS2

I-SATA5

I-SATA1

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

IPMI_LAN

Memory VRM

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

P1M1-DIMMD2

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

T-SGPIO Headers

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 Data

5 Load 6 Ground

7 Clock 8 NC

Note: NC= No Connection

PWR LED Connector

Pin Denitions

Pin Setting Denition

Pin 1 JD1_PIN1

Pin 2 FP_PWR_LED

Pin 3 FP_PWR_LED

Speaker Connector

Pin Settings

Pin Setting Denition

Pin 4 P5V

Pin 5 Key

Pin 6 R_SPKPIN_N

Pin 7 R_SPKPIN

USB2

VGA

COM1

MAC CODE IPMI CODE BAR CODE

SAS CODE

CLOSE 1st

P2M1-DIMMA2

P2M1-DIMMA1

FAN9

Memory VRM

IB CODE

CPU3

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

OPEN 1st

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD2

OPEN 1st

P4M1-DIMMB2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

FAN8

P3M1-DIMMD1

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

CLOSE 1st

P4M1-DIMMB1

P4M1-DIMMA2

P4M1-DIMMA1

A. T-SGPIO1

B. T-SGPIO2

C. JD1

J17

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-29

FAN4

FAN3

LED15

JF1

LEDPWR

FAN2

FAN1

X10QBL-CT/X10QBL Motherboard User’s Manual

Standby Power Header

The +5V Standby Power header is

located at JSTBY1 on the mother-

board. See the table on the right for

pin denitions. (You must also have a

card with a standby power connector

and a cable to use this feature.)

Power SMB (I2C) Connector

Power System Management Bus (I2C)

connector (JPI2C1) monitors power

supply, fan and system temperatures.

See the table on the right for pin

denitions.

USB0/1

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

IPMI_LAN

LAN1/2 FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

P2M1-DIMMC2

P2M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

Memory VRM

FAN6

I-SATA4

I-SATA5

I-SATA2

I-SATA3

I-SATA0

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

VGA

P1M1-DIMMC1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

FAN5

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE

BAR CODE SAS CODE

IB CODE

CPU3

P4M1-DIMMD2

P2M1-DIMMA1

Memory VRM

FAN4

FAN3

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

OPEN 1st

P4M1-DIMMD1

P4M1-DIMMC2

P4M1-DIMMC1

LED15

LEDPWR

FAN2

FAN1

Standby PWR

PWR SMB

Pin Denitions

FAN8

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

CLOSE 1st

J17

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

Memory VRM

JF1

A. JSTBY1

B. JPI

2-30

2-9 Jumper Settings

Connector

Pins

Jumper

Cap

Setting

Chapter 2: Installation

Explanation of Jumpers

To modify the operation of the mother-

board, jumpers can be used to choose

between optional settings. Jumpers create

shorts between two pins to change the

function of the connector. Pin 1 is identied

with a square solder pad on the printed

circuit board. See the motherboard layout

pages for jumper locations.

Note: On two pin jumpers,

"Closed" means the jumper is on,

and "Open" means the jumper is

off the pins.

LAN Enable/Disable

JPL1 enables or disables Gigabit_LAN ports

on the X10QBL-CT, while JPTG1 enables or

disables 10G-LAN ports on the X10QBL-T.

See the table on the right for jumper settings.

The default setting is Enabled.

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

LAN CTRL

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

JI2C2

JPTG1

JPL1

Memory VRM

CPU2SLOT3 PCI-E 3.0 X16

JPS1

JPME2

JPS4

JI2C1

JSTBY1

BT2

CMOS Battery

LEDS2

SP1

BIOS

LEDS1

JPWR1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

CPU1

JD1

OPEN 1st

Memory VRM

I-SATA4

I-SATA5

I-SATA2

I-SATA3

I-SATA0

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

COM2

JPT1

JTPM1

USB4/5 USB6/7

JSD2

J23

I-SGPIO1

LSAS4-7

LSAS0-3

JPWR5

JWP1

JL1

JSD1

CPLD

USB8

JPWR2

JBT1

PCH

JPSAS1

SAS CTRL SAS CTRL

LED1

UID

P1M1-DIMMB2

IPMI_LAN

LAN1/2

FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

USB0/1

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

Memory VRM

VGA

P2M1-DIMMB1

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE BAR CODE

SAS CODE

IB CODE

CPU3

P4M1-DIMMD2

P2M1-DIMMA1

Memory VRM

Jumper Settings

Jumper Setting Denition

1-2 Enabled (default)

2-3 Disabled

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMD1

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

P4M1-DIMMA1

3 2 1

Pin 1-2 short

LAN Enable

A. JPL1: GLAN1/2

Enable (X10QBL)

A. JPTG1: 10G-

LAN1/2 Enable

(X10QBL-CT)

J17

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-31

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

X10QBL-CT/X10QBL Motherboard User’s Manual

I-SATA2

I-SATA0

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads

to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such

as a small screwdriver to touch both pads at the same time to short the connection.

Note. You must completely shut down the system, and then short JBT1

to clear CMOS.

Watch Dog Enable/Disable

Watch Dog (JWD1) is a system monitor that

will reboot the system when a software ap-

plication hangs. Close pins 1-2 to reset the

system if an application hangs. Close pins

2-3 to generate a non-maskable interrupt

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset (default)

Pins 2-3 NMI

Open Disabled

signal for the application that hangs. See the

table on the right for jumper settings. Watch

Dog must also be enabled in the BIOS.

USB0/1

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2

FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

I-SATA4

I-SATA5

I-SATA3

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

COM2

JPT1

JTPM1

USB4/5 USB6/7

JSD2

J23

I-SGPIO1

LSAS4-7

LSAS0-3

JPWR5

JWP1

JL1

JSD1

CPLD

USB8

JPWR2

JPME2

JBT1

PCH

JPSAS1

SAS CTRL SAS CTRL

JPS1

JI2C2

JPTG1

CPU2SLOT3 PCI-E 3.0 X16

JI2C1

JSTBY1

BIOS

BT2

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

JPL1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

USB2

VGA

COM1

Memory VRM

MAC CODE IPMI CODE

BAR CODE SAS CODE

CLOSE 1st

CPU3

P2M1-DIMMA2

P2M1-DIMMA1

FAN9

IB CODE

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

OPEN 1st

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

OPEN 1st

P4M1-DIMMB2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

FAN8

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC2

CPU4

P4M1-DIMMB1

P4M1-DIMMA2

A. Clear CMOS

B. Watch Dog Enable

P3M1-DIMMC1

CLOSE 1st

J17

P4M1-DIMMA1

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-32

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

Chapter 2: Installation

VGA Enable

Jumper JPG1 allows the user to enable

the onboard VGA connector. The default

setting is on pins 1-2 to enable the con-

nection. See the table on the right for

jumper settings.

BMC Enable

Jumper JPB1 is used to enable or dis-

able the embedded ASpeed AST2400

BMC (Baseboard Management Control-

ler) that provides IPMI 2.0/KVM support

on the motherboard. See the table on the

right for jumper settings.

USB0/1

UID

I-SATA4

I-SATA2

I-SATA0

I-SATA5

I-SATA3

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2

FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

VGA Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

BMC Enable

Jumper Settings

Jumper Setting Denition

Pins 1-2 BMC Enable (Default)

Pins 2-3 Disabled

USB2

VGA

COM1

MAC CODE IPMI CODE BAR CODE

SAS CODE

CLOSE 1st

P2M1-DIMMA2

P2M1-DIMMA1

FAN9

Memory VRM

IB CODE

CPU3

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

A. VGA Enabled

B. BMC Enabled

CLOSE 1st

J17

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-33

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

X10QBL-CT/X10QBL Motherboard User’s Manual

I2C Bus to PCI-Exp. Slots

Use Jumpers JI2C1 and JI2C2 to connect

the System Management Bus (I2C) to the

PCI-Express slots to improve PCI perfor-

mance. These two jumpers are to be set

at the same time. The default setting is

off to disable the connection for normal

operations. See the table on the right for

jumper settings.

TPM Support Enable

JPT1 allows the user to enable TPM

(Trusted Platform Modules) support to

enhance data integrity and system secu-

rity. See the table on the right for jumper

settings. The default setting is enabled.

USB0/1

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2 FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

Memory VRM

I-SATA4

I-SATA2

I-SATA0

I-SATA5

I-SATA3

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS4

JPS1

USB8

JL1

JPWR2

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

SP1

JPWR1

VGA

P2M1-DIMMB1

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE

IPMI CODE

BAR CODE SAS CODE

IB CODE

CPU3

P2M1-DIMMA1

Memory VRM

I2C for PCI-E slots

Jumper Settings

Jumper Setting Denition

Off Normal (Default)

On Enabled

TPM Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMD2

P4M1-DIMMD1

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

P4M1-DIMMA2

P4M1-DIMMA1

J17

A. JI

B. JI

C. JPT1

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

FAN4

2-34

LED15

JF1

LEDPWR

FAN2

FAN3

FAN1

Chapter 2: Installation

Manufacturer Mode Select

Close pin 2 and pin 3 of Jumper JPME2

to bypass SPI ash security and force the

system to operate in the Manufacturer

mode, which will allow the user to ash

the system rmware from a host server

for system setting modications. See the

table on the right for jumper settings.

SAS Enable (for X10QBL-CT only)

Use Jumper JPS1 to enable or disable

onboard SAS connections (L-SAS 0-3,

4-7) on the X10QBL-CT. The default

setting is on pins 1/2 to enable SAS

support. See the table on the right for

jumper settings.

USB0/1

UID

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

IPMI_LAN

LAN1/2

FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMB2

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

OPEN 1st

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

I-SATA4

I-SATA2

I-SATA0

I-SATA5

I-SATA3

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR4

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPME2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

JPSAS1

LSAS4-7

LSAS0-3

SAS CTRL SAS CTRL

JPWR5

JWP1

JPS1

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

CPU2 SLOT4PCI-E 3.0 X8

JI2C1

JSTBY1

BIOS

BT2

CLOSE 1st

CMOS Battery

LEDS2

LEDS1

JPS4

SP1

JPWR1

ME Mode Select Jumper Settings

Jumper Setting Denition

1-2 Normal (Default)

2-3 Manufacture Mode

SAS Enable

Jumper Settings

Jumper Setting Denition

1-2 Enabled (Default)

2-3 Disabled

USB2

VGA

COM1

FAN8

P3M1-

FAN9

DIMMB2

DIMMB1

P3M1-

DIMMA2

DIMMA1

A. JPME2

B JPS1

(X10QBL-CT

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

CPU4

OPEN 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

P3M1-DIMMC1

P3M1-DIMMC2

CLOSE 1st

P4M1-DIMMA1

only)

J17

MAC CODE IPMI CODE BAR CODE

SAS CODE

CLOSE 1st

P2M1-DIMMA2

P2M1-DIMMA1

Memory VRM

IB CODE

CPU3

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

OPEN 1st

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-35

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

X10QBL-CT/X10QBL Motherboard User’s Manual

I-SATA2

I-SATA0

LAN 1/LAN 2

2-10 Onboard LED Indicators

LAN LEDs

Two LAN ports (LAN1/LAN2) are

located on the IO back panel on the

motherboard. Each Ethernet LAN

port has two LEDs. The yellow LED

indicates activity. Link LED, located

on the left side of the LAN port, may

be green, amber or off indicating the

speed of the connection. See the

tables at right for more information.

IPMI Dedicated LAN LEDs

In addition to LAN 1/LAN 2, an

IPMI-dedicated LAN is located on

the I/O back panel of the mother-

board. The amber LED on the right

indicates activity, while the green

LED on the left indicates the speed

of the connection. See the tables

at right for more information.

LAN 1/2

Link LED

Rear View (when facing the rear side of the chassis)

GLAN Activity Indicator (Left)

LED Settings

Color Status Denition

Yellow Flashing Active

10G-LAN Link LEDs

LED Settings

(for X10QBL-CT)

LED Color Denition

Off No Connection,

10 or 100 Mbps

Green 10 Gbps

Amber 1 Gbps

Link LED Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color/State Denition

Link (Left) Green: Solid: 100 Mbps

Activity (Right) Amber: Blinking Active

LED Color Denition

Off No Connection,

Green 100 Mbps

Amber 1 Gbps

IPMI LAN

Amber: Solid: 1 Gbps

Activity LED

GLAN Link LEDs

LED Settings (for X10QBL)

or 10 Mbps

JIPMB1

JPG1

JPB1

JWD1

COM2

JPT1

JTPM1

USB4/5 USB6/7

I-SATA4

I-SATA5

I-SATA3

JSD2

I-SATA1

J23

I-SGPIO1

I-SGPIO2

LSAS4-7

JSAS2

LSAS0-3

JSAS1

JPWR5

JWP1

JPWR4

JPWR3

JPI2C1

JL1

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JI2C2

JPTG1

CPU2SLOT3 PCI-E 3.0 X16

JI2C1

JPME2

JSTBY1

JBT1

PCH PCH

BIOS

JSD1

BT2

CMOS

CPLD

Battery

LEDS2

LEDS1

JPSAS1

SAS CTRL

JPS4

JPS1

USB8

SP1

JPWR1

JPWR2

LAN CTRL

JPL1

Memory VRM

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

CPU1

JD1

OPEN 1st

Memory VRM

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

USB0/1

UID

LED1

LAN1/2 FAN10

P1M1-DIMMB1

P1M1-DIMMB2

OPEN 1st

IPMI_LAN

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMC2

P1M1-DIMMD1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

Memory VRM

P2M1-DIMMC2

P2M1-DIMMC1

VGA

P1M1-DIMMC1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

FAN6

FAN5

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE BAR CODE

SAS CODE

IB CODE

CPU3

P2M1-DIMMA1

Memory VRM

FAN4

FAN3

OPEN 1st

P4M1-DIMMD2

P4M1-DIMMD1

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

OPEN 1st

P4M1-DIMMC2

P4M1-DIMMC1

LEDPWR

FAN2

FAN1

FAN8

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

Memory VRM

LED15

JF1

A. LAN1/2 LEDs

B. IPMI LAN LEDs

CLOSE 1st

J17

2-36

Chapter 2: Installation

Onboard Power LED

An Onboard Power LED indicator is lo-

cated at LED15 (LEDPWR) on the moth-

erboard. When this LED is on, the system

is on. Be sure to turn off the system and

unplug the power cord before removing or

installing components. See the tables at

right for more information.

BMC Heartbeat LED

A BMC Hear tbeat LED is located at

LEDBMC on the motherboard. When

LEDBMC is blinking, BMC functions

normally. See the table at right for more

information.

I-SATA4

I-SATA2

I-SATA0

I-SATA5

I-SATA3

I-SATA1

I-SGPIO2

JSAS2

JSAS1

JPWR3

JPI2C1

JIPMB1

JPG1

JPB1

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

COM2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

PCH

JSD1

JSD2

J23

CPLD

I-SGPIO1

LSAS4-7

LSAS0-3

JPWR5

JWP1

JPWR4

USB8

JL1

JPWR2

LEDBMC

BMC BMC

CPU2 SLOT2 PCI-E 3.0 X8

JI2C2

JPTG1

CPU2SLOT3 PCI-E 3.0 X16

JI2C1

JPME2

JSTBY1

BIOS

BT2

CMOS Battery

LEDS2

LEDS1

JPSAS1

SAS CTRL SAS CTRL

JPS4

JPS1

SP1

JPWR1

LAN CTRL

JPL1

Memory VRM

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

CPU1

JD1

OPEN 1st

Memory VRM

LED1

UID

LAN1/2

FAN10

P1M1-DIMMB2

OPEN 1st

USB0/1

IPMI_LAN

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMD1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

P1M1-DIMMC1

P1M1-DIMMC2

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

VGA

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE

IPMI CODE

BAR CODE SAS CODE

IB CODE

CPU3

P4M1-DIMMD2

P2M1-DIMMA1

Memory VRM

Onboard PWR LED Indicator

LED States

LED Color Denition

Off System Off (PWR cable

not connected)

Green System On

BMC Heartbeat LED

Color/State Denition

Green: Blinking

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMD1

P4M1-DIMMC2

P4M1-DIMMC1

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

Memory VRM

J17

States

BMC: Normal

A. PWR LED

B. BMC LED

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-37

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

X10QBL-CT/X10QBL Motherboard User’s Manual

SAS Heartbeat LED (for X10QBL-CT only)

A SAS Heartbeat LED is located at LEDS1 on

the motherboard. When LEDS1 is blinking, the

SAS is functioning normally. See the table at

right for more information.

SAS Activity LED (for X10QBL-CT only)

A SAS Activity LED is located at LEDS2 on

the motherboard. When LEDS2 is blinking,

the SAS is active.

Note: Refer to Page 2-19 for information on the UID LED (UID_LED1).

USB0/1

UID

LAN CTRL

CPU1

JD1

LED1

Memory VRM

P1M1-DIMMB2

OPEN 1st

Memory VRM

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

JPME2

JPS1

JPS4

JI2C1

JSTBY1

BT2

CMOS Battery

LEDS2

SP1

BIOS

LEDS1

JPWR1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

COM2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

I-SATA4

PCH

I-SATA5

PCH

I-SATA2

I-SATA3

JSD1

JSD2

I-SATA0

I-SATA1

J23

CPLD

I-SGPIO1

I-SGPIO2

JPSAS1

LSAS4-7

JSAS2

LSAS0-3

JSAS1

SAS CTRL SAS CTRL

JPWR5

JWP1

JPWR4

JPWR3

USB8

JPI2C1

JL1

JPWR2

IPMI_LAN

LAN1/2 FAN10

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

P1M1-DIMMC1

P1M1-DIMMC2

P1M1-DIMMD1

CLOSE 1st

P2M1-DIMMB2

P2M1-DIMMB1

Memory VRM

VGA

USB2

CLOSE 1st

P2M1-DIMMA2

COM1

FAN9

Memory VRM

MAC CODE IPMI CODE

BAR CODE SAS CODE

IB CODE

CPU3

P4M1-DIMMD2

P2M1-DIMMA1

Memory VRM

OPEN 1st

P4M1-DIMMD1

SAS Heartbeat LED

Status

Color/State Denition

Green: On SAS: Normal

Red: On SAS: Failed

SAS Activity LED

States

Color/State Denition

P3M1-

DIMMB2

DIMMB1

P3M1-

DIMMA2

DIMMA1

Green: Blinking

FAN8

SAS: Active

A.SAS Heartbeat

LED (X10QBL-CT)

B. SAS Activity

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

CPU4

OPEN 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

P3M1-DIMMC1

P3M1-DIMMC2

CLOSE 1st

P4M1-DIMMA2

P4M1-DIMMA1

LED (X10QBL-CT)

J17

P2M1-DIMMD2

P2M1-DIMMD1

FAN7

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN5

2-38

FAN4

FAN3

FAN2

LED15

LEDPWR

FAN1

JF1

USB0/1

USB2

UID

2-11 SATA/SAS 3.0 Connections

SATA 3.0 Ports

Six SATA connections supported by Intel PCH

602 are located on the motherboard. I-SATA

ports 0/1 support SATA 3.0 connections, while

I-SATA ports 2-5 support SATA 2.0. These SATA

connectors provide serial-link connections, which

are faster than Parallel ATA connections. See the

table on the right for pin denitions.

SAS 3.0 Ports (for X10QBL-CT only)

Eight SAS 3.0 connections (L-SAS 0-3, 4-7) sup-

ported by the LSI 3008 SAS controller are located

on the motherboard. The SAS connections are

faster than traditional SATA connections.

Note: For more information on SATA HostRAID conguration, please refer

to the Intel SATA HostRAID User's Guide posted on our website @ http://

www.supermicro.com..

VGA

P2M1-DIMMB1

COM1

MAC CODE IPMI CODE BAR CODE

SAS CODE

CLOSE 1st

P2M1-DIMMA2

P2M1-DIMMA1

FAN9

Memory VRM

CPU3

LAN CTRL

CPU1

JD1

Memory VRM

OPEN 1st

Memory VRM

LED1

LAN1/2

FAN10

P1M1-DIMMB2

OPEN 1st

IPMI_LAN

Memory VRM

P1M1-DIMMA1

P1M1-DIMMA2

P1M1-DIMMB1

P1M1-DIMMD1

P1M1-DIMMD2

X10QBL-CT

Rev. 1.01

CPU2

Memory VRM

P1M1-DIMMC1

P1M1-DIMMC2

CLOSE 1st

P2M1-DIMMB2

LEDBMC

JIPMB1

BMC

JPG1

JPB1

BMC

CPU2 SLOT2 PCI-E 3.0 X8

CPU1 SLOT1 PCI-E 3.0 X16

JWD1

JI2C2

JPTG1

JPL1

CPU2SLOT3 PCI-E 3.0 X16

JPME2

JPS1

JPS4

JI2C1

JSTBY1

BT2

CMOS Battery

LEDS2

SP1

BIOS

LEDS1

JPWR1

CPU2 SLOT4PCI-E 3.0 X8

CLOSE 1st

COM2

JPT1

JTPM1

JBT1

USB4/5 USB6/7

I-SATA4

PCH

I-SATA5

PCH

I-SATA2

I-SATA3

JSD1

JSD2

I-SATA0

I-SATA1

J23

CPLD

I-SGPIO1

I-SGPIO2

JPSAS1

LSAS4-7

JSAS2

LSAS0-3

JSAS1

SAS CTRL SAS CTRL

JPWR5

JWP1

JPWR4

JPWR3

USB8

JPI2C1

JL1

JPWR2

IB CODE

OPEN 1st

P4M1-DIMMD2

P4M1-DIMMD1

Memory VRM

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

FAN8

P3M1-

DIMMB2

DIMMB1

DIMMA2

DIMMA1

Memory VRM

P3M1-DIMMD1

P3M1-DIMMD2

P3M1-DIMMC1

P3M1-DIMMC2

CPU4

OPEN 1st

CLOSE 1st

P4M1-DIMMB1

P4M1-DIMMB2

P4M1-DIMMA2

P4M1-DIMMA1

P4M1-DIMMC2

P4M1-DIMMC1

Memory VRM

Chapter 2: Installation

SATA 3.0

Pin Denitions

A. I-SATA0

B. I-SATA1

C. I-SATA2

D. I-SATA3

E. I-SATA4

F. I-SATA5

G. L-SAS0-3

(X10QBL-CT

Only)

H. L-SAS4-7

(X10QBL-CT

Only)

J17

P2M1-DIMMD2

P2M1-DIMMD1

P2M1-DIMMC2

P2M1-DIMMC1

FAN6

FAN7

FAN5

FAN4

FAN3

LED15

JF1

LEDPWR

FAN2

FAN1

2-39

X10QBL-CT/X10QBL Motherboard User’s Manual

Notes

2-40

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the "Technical Support

Procedures" and/or "Returning Merchandise for Service" section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or install-

ing any hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and

chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for

the keyboard and mouse.

3. Remove all add-on cards.

4. Install CPU 1 rst (making sure it is fully seated) and connect the front panel

connectors to the motherboard.

No Power

1. Make sure that no short circuits between the motherboard and the chassis.

2. Make sure that all power connectors are properly connected.

3. Check that the 115V/230V switch on the power supply is properly set, if avail-

able.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3-1

X10QBL-CT/X10QBL Motherboard User’s Manual

No Video

1. If the power is on, but you have no video, remove all the add-on cards and

cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A

for details on beep codes.

System Boot Failure

If the system does not display POST or does not respond after the power is turned

on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules in-

stalled. If there is still no error beep, try to turn on the system again with only

one processor installed in CPU Socket#1. If there is still no error beep, replace

the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power

cord and contracting both pads on the CMOS Clear Jumper (JBT1). (Refer to

Section 2-8 in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM modules.

Make sure that system power is on, and memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system

boots, check for bad DIMM modules or slots by following the Memory Errors

Troubleshooting procedure in this Chapter.

Losing the System’s Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality

power supply may cause the system to lose the CMOS setup information.

Refer to Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the Setup Conguration problem, contact your

vendor for repairs.

3-2

Chapter 3: Troubleshooting

Memory Errors

When a No-Memory Beep Code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that

the DIMM modules are properly and fully installed. (For memory compatibility,

refer to the Memory Compatibility Chart posted on our website @ http://www.

supermicro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recom-

mended that you use the same RAM type and speed for all DIMMs in the

system.

3. Make sure that you are using the correct type of Registered (RDIMM)//Load

Reduced (LRDIMM) DDR3 ECC modules recommended by the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among

all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the

instructions given in Section 2-5 in Chapter 2.

6. Please follow the instructions given in the DIMM Population Tables listed in

Section 2-4 to install your memory modules.

When the System Becomes Unstable

A. When the system becomes unstable during or after OS installation, check

the following:

1. CPU/BIOS support: Make sure that your CPU is supported, and you have the

latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by test-

ing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website http:\\www.supermicro.

com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-

place the bad HDDs with good ones.

4. System cooling: Check system cooling to make sure that all heatsink fans,

and CPU/system fans, etc., work properly. Check Hardware Monitoring set-

tings in the BIOS to make sure that the CPU and System temperatures are

3-3

X10QBL-CT/X10QBL Motherboard User’s Manual

within the normal range. Also check the front panel Overheat LED, and make

sure that the Overheat LED is not on.

5. Adequate power supply: Make sure that the power supply provides adequate

power to the system. Make sure that all power connectors are connected.

Please refer to our website for more information on minimum power require-

ment.

6. Proper software support: Make sure that the correct drivers are used.

B. When the system becomes unstable before or during OS installation, check

the following:

1. Source of installation: Make sure that the devices used for installation are

working properly, including boot devices such as CD/DVD disc.

2. Cable connection: Check to make sure that all cables are connected and

working properly.

3. Using minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use minimum conguration

(with a CPU and a memory module installed) to identify the trouble areas.

Refer to the steps listed in Section A above for proper troubleshooting proce-

dures.

4. Identifying bad components by isolating them: If necessary, remove a compo-

nent in question from the chassis, and test it in isolation to make sure that it

works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several

items at the same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to

see if the system will work properly. If so, then the old component is bad.

You can also install the component in question in another system. If the new

system works, the component is good and the old system has problems.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please

note that as a motherboard manufacturer, Supermicro also sells motherboards

through its channels, so it is best to rst check with your distributor or reseller for

3-4

Chapter 3: Troubleshooting

troubleshooting services. They should know of any possible problem(s) with the

specic system conguration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our website

(http://www.supermicro.com/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.

com).

3. If you still cannot resolve the problem, include the following information when

contacting Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your

system rst boots up.)

• System conguration

4. An example of a Technical Support form is on our website at (http://www.

supermicro.com).

• Distributors: For immediate assistance, please have your account number ready

when placing a call to our technical support department. We can be reached by

e-mail at support@supermicro.com.

3-5

X10QBL-CT/X10QBL Motherboard User’s Manual

3-3 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out-

wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning! Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do

not discard a used battery in the garbage or a public landll. Please comply with the

regulations set up by your local hazardous waste management agency to dispose of

your used battery properly.

3-6

Chapter 3: Troubleshooting

3-4 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The motherboard supports Registered (RDIMM)//Load Reduced (LRDIMM)

ECC DDR3 of up to 1600 MHz DIMM modules. To enhance memory performance,

do not mix memory modules of different speeds and sizes. Please follow all memory

installation instructions given on Section 2-5 in Chapter 2.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website

at http://www.supermicro.com. Please check our BIOS warning message and the

information on how to update your BIOS on our website. Select your motherboard

model and download the BIOS le to your computer. Also, check the current BIOS

revision to make sure that it is newer than your BIOS before downloading. You can

choose from the zip le and the .exe le. If you choose the zip BIOS le, please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format

AMI.bat lename.rom from your bootable USB device to ash the BIOS. Then, your

system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent

possible system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed.

Send your motherboard back to our RMA Department at Supermicro for

repair. For BIOS Recovery instructions, please refer to the AMI BIOS

Recovery Instructions posted at http://www.supermicro.com.

Question: How do I handle the used battery?

Answer: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment.

Do not discard a used battery in the garbage or a public landll. Please comply

with the regulations set up by your local hazardous waste management agency to

dispose of your used battery properly.

3-7

X10QBL-CT/X10QBL Motherboard User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before

any warranty service will be rendered. You can obtain service by calling your ven-

dor for a Returned Merchandise Authorization (RMA) number. When returning the

motherboard to the manufacturer, the RMA number should be prominently displayed

on the outside of the shipping carton, and the shipping package is mailed prepaid

or hand-carried. Shipping and handling charges will be applied for all orders that

must be mailed when service is complete. For faster service, You can also request

a RMA authorization online (http://www.supermicro.com).

This warranty only covers normal consumer use and does not cover damages in-

curred in shipping or from failure due to the alternation, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor rst for any product problems.

3-8

Chapter 4: AMI BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS setup utility for the X10QBL-CT/X10QBL. It

also provides the instructions on how to navigate the AMI BIOS setup utility screens.

The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated.

Starting BIOS Setup Utility

To enter the AMI BIOS setup utility screens, press the <Del> key while the system

is booting up.

Note: In most cases, the <Del> key is used to invoke the AMI BIOS setup

screen. There are a few cases when other keys are used, such as <F3>,

<F4>, etc.

Each main BIOS menu option is described in this manual. The Main BIOS setup

menu screen has two main frames. The left frame displays all the options that can

be congured. Grayed-out options cannot be congured. Options in blue can be

congured by the user. The right frame displays the key legend. Above the key

legend is an area reserved for informational text. When an option is selected in

the left frame, it is highlighted in white. Often informational text will accompany it.

Note: The AMI BIOS has default informational messages built in. The

manufacturer retains the option to include, omit, or change any of these

informational messages.

The AMI BIOS setup utility uses a key-based navigation system called "hot keys."

Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup

navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.

Note 1: Options printed in Bold are default settings.

Note 2: <F3> is used to load optimal default settings. <F4> is used to save

the settings and exit the setup utility.

4-1

X10QBL-CT/X10QBL Motherboard User’s Manual

How To Change the Conguration Data

The conguration data that determines the system parameters may be changed by

entering the AMI BIOS setup utility. This setup utility can be accessed by pressing

<Delete> at the appropriate time during system boot.

Note: For AMI UEFI BIOS Recovery, please refer to the UEFI BIOS Recov-

ery User Guide posted @ http://www.supermicro.com/support/manuals/.

Starting the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu of

the AMI BIOS setup utility. From the main menu, you can access the other setup

screens. An AMI BIOS identication string is displayed at the left bottom corner of

the screen below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.

Flashing the wrong BIOS can cause irreparable damage to the system. In no event

shall the manufacturer be liable for direct, indirect, special, incidental, or consequential

damage arising from a BIOS update. If you have to update the BIOS, do not shut down

or reset the system while the BIOS is being updated to avoid possible boot failure.

4-2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.

You can always return to the Main setup screen by selecting the Main tab on the

top of the screen. The Main BIOS Setup screen is shown below.

4-2

Chapter 4: AMI BIOS

The AMI BIOS Main menu displays the following information:

System Date/System Time

Use this option to change the system date and time using the arrow keys. Enter

new values through the keyboard and press <Enter>. Press the <Tab> key to move

between elds. The date must be entered in Day MM/DD/YYYY format. The time is

entered in HH:MM:SS format. (Note: The time is in the 24-hour format. For example,

5:30 P.M. appears as 17:30:00.).

Supermicro X10QBL/X10QBL-CT

BIOS Version

This item displays the SMC version of the BIOS ROM used in this system.

Build Date

This item displays the date that the BIOS setup utility was built.

CPLD Version

This item displays the version of 'Complex Programmable Logic Device' (CPLD)

used in this system.

Memory Information

Total Memory

This item displays the amount of memory that is available in the system.

4-3

X10QBL-CT/X10QBL Motherboard User’s Manual

4-3 Advanced Setup Congurations

Select the Advanced tab to access the following submenu items.

Boot Features

Boot Conguration

Quiet Boot

Use this item to select bootup screen display between POST messages and the

OEM logo. Select Disabled to display the POST messages. Select Enabled to

display the OEM logo instead of the normal POST messages. The options are

Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current

to use the current AddOn ROM Display setting. Select Force BIOS to use the Op-

tion ROM display set by the system BIOS. The options are Force BIOS and Keep

Current.

Bootup Num-Lock

Use this item to set the power-on state for the Numlock key. The options are Off

and On.

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed when an

error occurs. The options are Disabled and Enabled.

4-4

Chapter 4: AMI BIOS

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this

item is set to Immediate, the BIOS ROM of the host adaptors will immediately cap-

ture Interrupt 19 at bootup and allow the drive that is attached to the host adaptor

to function as the bootable disk. If this item is set to Postponed, the BIOS ROM of

the host adaptors will only capture Interrupt 19 during bootup from a legacy device.

The options are Immediate and Postponed.

Re-try Boot

Select Legacy Boot for the BIOS to continuously attempt to boot from the legacy

boot drive. Select EFI Boot for the BIOS to continuously attempt to boot from the

EFI boot drive. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

Watch Dog Function

If enabled, the Watch Dog timer will allow the system to automatically reboot when

a non-recoverable error that lasts for more than ve minutes occurs. The options

are Enabled and Disabled.

Power Button Function

If this feature is set to Instant Off, the system will power off immediately as soon

as the user presses the power button. If this feature is set to 4 Seconds Override,

the system will power off when the user presses the power button for 4 seconds or

longer. The options are Instant Off and 4 Seconds Override.

Restore on AC Power Loss

Use this item to set the power state after a power outage. Select Stay Off for the

system power to remain off after a power outage. Select Power On to turn on the

system power after a power outage. Select Last State to allow the system to resume

its last power state before a power outage. The options are Power On, Stay Off,

and Last State.

CPU Conguration

This submenu displays the following CPU information as detected by the BIOS. It

also allows the user to congure CPU settings.

Processor 0/Processor 1/Processor 2/Processor 3

This submenu displays the following information of the CPU installed a CPU socket

detected by the BIOS.

4-5

X10QBL-CT/X10QBL Motherboard User’s Manual

• Processor Socket

• Processor ID

• Processor Frequency

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor Socket

• Processor ID

• Processor Frequency

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

• Processor 2 Version

• Processor 3 Version

Clock Spread Spectrum

Select Enable to allow the BIOS to monitor and attempt to reduce the level of

Electromagnetic Interference caused by the components whenever needed. The

options are Disable and Enable.

Hyper-Threading (All)

Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-

formance. The options are Enable and Disable.

4-6

Chapter 4: AMI BIOS

Cores Enabled

This feature allows the user to set the number of CPU cores to enable. Enter "0"

to enable all cores. The default setting is 0.

Note: To set a valid core number for your system, please refer to the

help window on the right side of the BIOS screen, which will prompt you

for a valid core number and will also provide a warning when an invalid

core number is used.

Performance/Watt

Select Power Optimized to enable Intel® Turbo Boost Technology support when

the Power Performance State-P0 has lasted more than two seconds. The options

are Traditional and Power Optimized.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to support Intel® Execute Disable Bit Technology, which will allow the

processor to designate areas in the system memory where an application code can

be executed and where it cannot, thus preventing a worm or a virus from ooding

illegal codes to overwhelm the processor or damage the system during an attack.

The default setting is Enable. (Refer to Intel and Microsoft websites for more

information.)

Intel® Virtualization Technology (Available when supported by the CPU)

Select Enabled to suppor t Intel Vir tualization Technology, which will allow one

platform to run multiple operating systems and applications in independent parti-

tions, creating multiple "virtual" systems in one physical computer. The options

are Enabled and Disabled.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enabled, the hardware prefetcher will prefetch streams of data and instruc-

tions from the main memory to the L2 cache to improve CPU performance. The

options are Disabled and Enabled.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised.

Select Disable for the CPU to prefetch both cache lines for 64 bytes. The options

are Disable and Enable.

Note: Please reboot the system for changes on this setting to take effect.

Please refer to Intel’s web site for detailed information.

4-7

X10QBL-CT/X10QBL Motherboard User’s Manual

DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by the CPU)

If this item is set to Enable, the DCU Streamer Prefetcher will prefetch data streams

from the cache memory to the DCU (Data Cache Unit) to speed up data access-

ing and processing for CPU performance enhancement. The options are Disable

and Enable.

DCU IP Prefetcher

If this feature is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will

prefetch IP addresses to improve network connectivity and system performance.

The options are Enable and Disable.

DCU Mode

Use this feature to set the data-prefecting mode for the DCU (Data Cache Unit).

The options are 32KB 8Way Without ECC and 16KB 4Way With ECC.

Direct Cache Access (DCA)

Select Enable to use Intel DCA (Direct Cache Access) Technology to improve the

efciency of data transferring and accessing. The options are Enable and Disable.

AES-NI (New Encryption Standard-New Instructions)

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-

tions (NI) to ensure data security. The options are Enable and Disable.

PPIN

Select Yes to use the Protected-Processor Inventory Number (PPIN) in the system.

The options are No and Yes.

SMM Protected Mode

Select Enable for SMM (System Management Mode) protected mode support, which

will enhance system management. The options are Enable and Disable.

Advanced Power Management Conguration

This section is used to congure the following CPU Power Management settings.

Power Technology

Select Energy Efciency to support power-saving mode. Select Custom to cus-

tomize system power settings. Select Disabled to disable power-saving settings.

The options are Disable, Energy Efciency, and Custom.

If the above is set to 'Custom' the following options are displayed:

4-8

Chapter 4: AMI BIOS

CPU P State Control (Available when Power Technology is set to Custom)

EIST

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically

adjust processor voltage and core frequency to reduce power consumption and

heat dissipation. The options are Disable, and Enable.

Turbo Mode (Available when Intel® EIST Technology is enabled)

Select Enable to use the Turbo Mode to boost system performance. The options

are Enable and Disable.

P-State Coordination

This feature allows the user to change the P-State (Power-Performance State)

coordination type. P-State is also known as "SpeedStep" for Intel processors. Se-

lect HW_ALL to change the P-State coordination type for hardware components

only. Select SW_ALL to change the P-State coordination type for all software

installed in the system. Select SW_ANY to change the P-State coordination

type for a software program in the system. The options are HW_All, SW_ALL,

and SW_ANY.

SINGLE_PCTL

Select Yes for SINGLE_PCTL support to improve processor power management.

The options are No and Yes.

Cong TDP

Select Enable to allow the user to congure the Thermal Design Power (TDP)

settings for the system. The TDP refers to the maximum amount of power al-

lowed for running "real applications" without triggering an overheating event. The

options are Disable and Enable.

 CPU HWPM State Control (Available when the CPU

supports this feature)

Enable CPU HWPM

Select Enable for better CPU energy performance. The options are Disable,

HWPM NATIVE MODE, and HWPM OOB MODE.

Enable CPU Autonomous Cstate

Use this feature to enable CPU Autonomous C State, which converts HALT

instructions to Mwait. The options are Disable and Enable.

4-9

X10QBL-CT/X10QBL Motherboard User’s Manual

CPU C State Control (Available when Power Technology is set to Custom)

C2C3TT

This feature allows the user to set the C2 to C3 Transition timer. The default

setting is 0 (for Auto setting).

Package C-State limit

This feature allows the user to set the limit on the C-State package register.

The options are C0/C1 State, C2 State, C6 (Non Retention) State, and C6

(Rentention) State.

CPU C3 Report

Select Enabled to allow the BIOS to report the CPU C3 State (ACPI C2) to the

operating system. During the CPU C3 State, the CPU clock generator is turned

off. The options are Enable and Disable.

CPU C6 Report

Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to the

operating system. During the CPU C6 State, the power to all cache is turned

off. The options are Enable and Disable.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly

reduce the CPU's power consumption by reducing the CPU's clock cycle and

voltage during a Halt-state. The options are Disable and Enable.

Monitor/Mwait

Select Enabled to enable the Monitor/MWait instructions. The Monitor instruc-

tion monitors a region of memory for writes, and MWait instructions instruct the

CPU to stop until the monitored region begins to write. The options are Enable

and Disable.

CPU T State Control (Available when Power Technology is set to Custom)

ACPI (Advanced Conguration Power Interface) T-States

Select Enable to support CPU throttling by the operating system to reduce power

consumption. The options are Enable and Disable.

4-10

Chapter 4: AMI BIOS

 CPU Advanced PM Turning (Available when Power

Technology is set to Custom and Energy Efcient)

Energy Perf BIAS

Energy Perf BIAS

Energy Performance Tuning

Use this feature to select whether the BIOS of operating system chooses energy

performance BIAS Tuning. The options are OS and BIOS.

Energy Performance BIAS Setting.

Use this item to set the energy performance bias, which overrides the operating

system setting. The options are Performance, Balanced Performance, Balanced

Power, and Power.

Workload Conguration

Use this item to optimize the workload characterization. The recommended set-

ting is Balanced. The options are Balanced and I/O sensitive.

Chipset Conguration

North Bridge

This feature is used to congure Intel North Bridge settings.

Integrated IO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located

inside a processor will always remain clear during electric tuning. The options

are Disable and Enable.

IIO0 Conguration

IOU0 (IIO PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x8x8 and Auto.

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X10QBL-CT/X10QBL Motherboard User’s Manual

CPU1 SLOT1 PCI-E 3.0 X16

Use the items below to congure the PCI-E settings for a PCI-E port specied

by the user.

The following items will display:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

Link Speed

Use this item to select the PCI-E link speed for the PCI-E port specied by the

user. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8

GT/s).

Pcie Ecrc

Use this item to set end-to-end cyclic redundancy check (ECRC) error checking.

The options are Disable, Enable and Auto.

LAN1/2

Use the items below to congure the PCI-E settings for a PCI-E device

installed on a LAN connection specied by the user.

The following items will display:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

Link Speed

Use this item to select the PCI-E link speed for the PCI-E port specied by the

user. The options are GEN1 (2.5 GT/s), GEN2 (5 GT/s), GEN3 (8 GT/s), and

Auto.

Pcie Ecrc

Use this item to set end-to-end cyclic redundancy check (ECRC) error checking.

The options are Disable, Enable and Auto.

4-12

Chapter 4: AMI BIOS

L-SAS0-3(JSAS1)/L-SAS4-7(JASA2)

Use the items below to congure the PCI-E settings for a PCI-E device

installed on a SAS connection specied by the user.

The following items will display:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

Link Speed

Use this item to select the PCI-E link speed for the PCI-E port specied by the

user. The options are GEN1 (2.5 GT/s), GEN2 (5 GT/s), GEN3 (8 GT/s), and

Auto.

Pcie Ecrc

Use this item to set end-to-end cyclic redundancy check (ECRC) error checking.

The options are Disable, Enable and Auto.

IIO1 Conguration

IOU0 (IIO PCIe Port 2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Port 3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8 and Auto.

No PCIe port active ECO on Socket

Use this feature to select a workaround setting to implement the engineering-

change order (ECO) on the system when PCI ports are not active. The options

are PCU Squelch exit ignore option, and Reset the SQ FLOP by CSR option.

CPU2 SLOT3 PCI-E 3.0 X16/CPU2 SLOT2 PCI-E 3.0 X8/ CPU2 SLOT4 PCI-E 3.0 X8

Use the items below to congure the PCI-E settings for a PCI-E port specied

by the user.

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X10QBL-CT/X10QBL Motherboard User’s Manual

The following items will display:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

Link Speed

Use this item to select the PCI-E link speed for the PCI-E port specied by the

user. The options are Auto, GEN1 (2.5 GT/s), GEN2 (5 GT/s), and GEN3 (8

GT/s).

PCIe Ecrc

Use this item to set end-to-end cyclic redundancy check (ECRC) error checking.

The options are Disable, Enable and Auto.

IOAT (Intel® IO Acceleration) Conguration

Enable IOAT

Select Enable to enable Intel I/OAT (I/O Acceleration Technology) support,

which will signicantly reduce CPU overhead by leveraging CPU architectural

improvements and freeing the system resource for other tasks. The options are

Enable and Disable.

No Snoop

Select Enable to support no-snoop mode for each CB device. The options are

Disable and Enable.

Disable TPH (TLP Processing Hint).

If this item is set to Enable, TLP Processing Hint will be disabled. The options

are Disable and Enable.

Apply BDX CBDMA ECO

This feature is a workaround for Broadwell-EX A0 stepping CPU. It locks TOR

(Table of Record) timeout with CBDMA (Crystal Beach DMA) and CPU trafc

from Rocket test. The options are Yes and No.

 IIO General Conguration

This feature improves the bi-directional bandwidth of Omni-Path 100Gbps LAN

card.

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Chapter 4: AMI BIOS

NpPFDisableGlobalIo0

The options are Disable and Enable.

NpPFDisableGlobalIo1

The options are Disable and Enable.

NpPFDisableGlobalIo2

The options are Disable and Enable.

 Intel VT for Directed I/O (VT-d)

Intel VT for Direct I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d support by reporting the I/O device assignments to the VMM (Virtual Machine

Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O

resource sharing across Intel platforms, providing greater reliability, security and

availability in networking and data-sharing. The options are Enable and Disable.

Interrupt Remapping

Select Enable to support Interrupt Remapping to enhance system performance.

The options are Enable and Disable.

PCI Express Global Options

Power Down Unused Ports

Select Enable to disable the PCI-E ports that are inactive. The options are

Disable, Enable, HSX Disable Unused Ports (No IIO Clock Gating), and HSX

Disable Unused Ports (IIO Clock Gating)

QPI (Quick Path Interconnect) Conguration

QPI General Conguration

QPI Status

The following information will display:

• Number of CPU

• Number of IIO

• LInk Speed

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X10QBL-CT/X10QBL Motherboard User’s Manual

• Current QPI Link Frequency

• QPI Global MMIO Low Base/Limit

• QPI Global MMIO High Base/Limit

• QPI Pci-e Conguration Base/Siz (Size)

Link Speed Mode

Use this feature to select the data transfer speed for QPI Link connections. The

default setting is Fast.

Link Frequency Select

Use this feature to select the desired frequency for QPI Link connections. The

options are 6.4GB/s, 7.2GB/s, 8.0GB/s, 9.6GB/s, Auto, Auto Limited, and Use

Per LInk Setting.

Link L0p Enable

Select Enable for Link L0p support. The options are Disable and Enable.

Link L1 Enable

Select Enable for Link L1 support. The options are Enable and Disable.

Legacy VGA Socket

Enter the VGA socket number (from 0-7) that will be used to support legacy

VGA. The default setting is 0.

COD Enable (Available when the OS and the CPU support this feature)

Select Enabled for Cluster-On-Die support to enhance system performance in

cloud computing. The options are Disable, Enable, and Auto.

Home Dir Snoop with IVT - Style OSB

Use this feature to enable the memory snoop directory to improve latency for

memory access. This feature improves memory and cache latency. The options

are Disable, Enable, and Auto.

QPI Per Socket Conguration

CPU 1/CPU 2

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Chapter 4: AMI BIOS

IO Resource Allocation Ratio

Use this feature to set the IO resource-allocation ratio (from 0-8). The default

setting is 3.

MMIOL Resource Allocation Ratio

Use this feature to set the Memory-Mapped IO resource-allocation ratio (from

0-8). The CPU1 default setting is 3, and for CPU2 is 1.

IIO UniPhy Disable

Select Yes to hide the entire UNIFY in the L2 cache. The options are No, Yes,

and Yes w/Memory Hot Add.

Memory Conguration

This section displays the following Integrated Memory Controller (IMC) informa-

tion.

DDR Speed

Use this feature to force a DDR4 memory module to run at a frequency other

than what is specied in the specication. The options are Auto, 1067, 1333,

1600, 1867, and 2133.

ODT (On-Die Termination) Timing Mode

Use this feature to congure the timing mode setting for the ODT (On-Die Termination) where the termination resistor for impedance matching in transmission

lines is located inside a chip instead of on a printed circuit board. The options

are Aggressive Timing and Conservative Timing.

MxB Rank Sharing Mapping

Use this feature to select the address-mapping setting for memory-rank sharing

to enhance extended multimedia platform performance. The options are Maxi-

mum Performance and Maximum Margin.

LRDIMM (Load-Reduction DIMM) Module Delay

When this item is set to Disabled, the MRC (Memory Regulator Controller) will

not use SPD bytes 90-95 for module delay on LRDIMM memory. The options

are Disabled and Auto.

Data Scrambling

Select Enabled to enable data scrambling to enhance system performance and

data integrity. The options are Disabled and Enabled.

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X10QBL-CT/X10QBL Motherboard User’s Manual

VMSE Lockstep Mode

Select Enabled to support the VMSE Lockstep mode, which will support Lock

step mode for the Intel Scalable Memory Interconnect 2 (Intel SMI 2) controller.

The options are 1 vs 1, and Mode 2 vs 1 Mode.

CECC WA CH Mask

Use this feature to select the memory channel bitmask to apply Correctable ECC

(CECC) workaround, one bit per channel. Select a value between 0 to 15. Value

2 applies WA on CH1, 3 on CH0 and CH1 and so forth. The default setting is 10.

HA (Hash Mode) Early Write Post Mode

Select Enable to support memory hash-method-comparison mode when the

system is running at the early stage of POST (Power-On-Self-Test). The options

are is Enable and Disable.

Command 2 Data Tuning

Select Enabled to ne-tune electrical command paths from the host system to

the memory-extension buffer (MXB). The options are Enabled and Disabled.

Closed Loop Thermal Throttling

Select Enabled to support Closed-Loop Thermal Throttling which will improve

reliability and reduces CPU power consumption via automatic voltage control

while the CPU are in idle states. The options are Disabled and Enabled.

Normal Operation Duration

Use this feature to select the normal operation duration interval. The default

value is 1024.

VMSE Clock Stop

Select Enabled to de-activate the clock driver for the Intel Scalable Memory

Interconnect 2 (Intel SMI 2) controller. The options are Enabled and Disabled.

Memory Topology

This item displays the status of each DIMM module as detected by the BIOS.

• Jordon Creek Revision ID

• Node

• Channel

• DIMM Frequency

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Chapter 4: AMI BIOS

Memory RAS (Reliability_Availability_Serviceability)

Conguration (Available when a DIMM module is detected in a

memory slot specied)

Use this submenu to congure the following Memory RAS settings.

Memory RAS Conguration Setup

Current Memory Mode

This item displays the current memory mode. The default setting is Independent.

Mirroring

This item indicates if memory mirroring is supported by the motherboard. Memory

mirroring creates a duplicate copy of the data stored in the memory to enhance

data security.

Sparing

This item indicates if memory sparing is supported by the motherboard. Memory

sparing enhances system performance.

Memory Rank Sparing

This item indicates if memory rank sparing is supported by the motherboard. Memory

rank sparing enhances system memory performance. The options are Enabled and

Disabled.

Spare Error/Memory Correctable Thr (Threshold)

Use this feature to set the correctable error threshold for spare memory modules.

The default setting is 10.

Leaky Bucket Low Bit

Use this feature to set the Low Bit value for the Leaky Bucket algorithm which

is used to check the data transmissions between CPU sockets and the memory

controller. The default setting is 40.

Leaky Bucket High Bit

Use this feature to set the High Bit value for the Leaky Bucket algorithm which

is used to check the data transmissions between CPU sockets and the memory

controller. The default setting is 41.

CPU1 MC1 Spare/CPU2 MC1 Spare/CPU3 MC1 Spare/CPU4 MC1 Spare (Available when Memory Rank Sparing is set to Enabled)

Select Enabled to enable memory sparing support for a memory module installed

on a memory channel specied by a user for memory performance enhancement.

The options are Enabled and Disabled.

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X10QBL-CT/X10QBL Motherboard User’s Manual

Memory Interleaving

Use this feature to set the DIMM memory interleaving mood. The options are

NUMA (1-way) Node Interleave, 2-way Node Interleave, 4-way Interleave, 8 Way

Interleaving, Inter-socket, and Auto.

Socket Interleave Below 4GB

Select Enabled for the memory above the 4G Address space to be split between

two sockets. The options are Enable and Disable.

Channel Interleaving

Use this feature to set the DIMM channel interleaving mood. The options are Auto,

1-Way Interleave, 2-Way Interleave, 3-Way Interleave, and 4-Way Interleave.

Rank Interleaving

Use this feature to select a rank memory interleaving method. The options are

Auto, 1-Way Interleave, 2-Way Interleave, 3-Way Interleave, 4-Way Interleave,

and 8-Way Interleave.

Patrol Scrub (Available when it is supported by the hardware components)

Patrol Scrubbing is a process that allows the CPU to correct correctable memory

errors detected on a memory module and send the correction to the requestor (the

original source). When this item is set to Enable, read-and-write will be performed

every 16K cycles per cache line if there is no delay caused by internal processing.

The options are Enable and Disable.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable memory

errors found on a memory module. When the CPU or I/O issues a demand-read

command, and the read data from memory turns out to be a correctable error, the

error is corrected and sent to the requestor (the original source). Memory is updated

as well. Select Enable to use Demand Scrubbing for ECC memory correction. The

options are Enable and Disable.

Device Tagging

Select Enable to support device tagging. The options are Disable, Rank SDDC,

and Bank SDDC.

A7 Mode

Select Enabled to support A7 (Addressing) Mode to improve memory performance.

The options are Disable and Enable.

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Chapter 4: AMI BIOS

DDDC Support

Select Enabled to enable Double-Device Data Correction (DDDC) support for the

error-correction codes to correct memory errors caused by two failed DRAM devices.

The options are Disabled, Rank DDDC, and Bank DDDC.

DDDC Wirekill (Available when DDDC support is set to Rank DDDC)

Select Enabled for Double-Device Data Correction (DDDC) Wire-kill support which

will disable the wire connection between two DRAM devices when they fail. The

options are Disabled and Enabled.

DDDC Wirekill (Wire-Kill) Threshold (Available when DDDC support is set to Rank DDDC, and DDDC Wirekill is set to Enabled)

Use this feature to set the DDDC Wirekill threshold. When the memory errors reach

the threshold,wire-connections between the failed DRAM modules will be discon-

nected. The Default setting is 2.

Memory Mirroring

Select Enable to enable memory-mirroring support which will create a duplicate

copy of the data stored in the memory to enhance data security. The options are

Disable and Full CH Mirroring.

Mirror Scrub (Available when Memory Mirroring is set to Enable)

Select Enable for Mirror Scrubbing support which will allow the CPU to correct cor-

rectable memory errors found on a memory module when the memory scheme is

set to Memory MIrroring. The options are Enable and Disable.

CPU1 MC1 Mirror/CPU2 MC1 Mirror/CPU3 MC1 Mirror/CPU4 MC1 Mirror (Unavailable when Memory Mirror is set to Disbled)

Select Enabled to enable memory sparing support for a memory module installed

on a memory channel specied by a user for memory performance enhancement.

The options are Enabled and Disabled.

South Bridge

This feature is used to congure Intel South Bridge settings.

USB Conguration

The following USB items will display.

• USB Module Version

• USB Devices

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X10QBL-CT/X10QBL Motherboard User’s Manual

Legacy USB Support (Available when USB Functions is not Disabled)

Select Enabled to support legacy USB devices. Select Auto to disable legacy sup-

port if USB devices are not present. Select Disabled to have USB devices available

for EFI (Extensive Firmware Interface) applications only. The settings are Disabled,

Enabled and Auto.

USB 2.0 Controller Mode

Select HiSpeed for the USB 2.0 controller to operate at the HiSpeed mode (480Mb

per second). Select FullSpeed for the USB 2.0 controller to operate at the Full Speed

mode (12Mb per second). The options are Full Speed, and HiSpeed.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller

Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will

be claimed by the EHCI driver. The settings are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support which will provide complete

USB keyboard legacy support for the operating system that does not support Legacy

USB devices. The options are Disabled and Enabled.

USB Controller 0 Enable

Select Enabled to enable USB Controller 0 which supports USB Port 0 to Port 7.

The options are Disabled and Enabled.

USB Controller 1 Enable

Select Enabled to enable USB Controller 1 which supports USB Port 8 to Port 13.

The options are Disabled and Enabled.



SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence

of the SATA devices that are supported by the Intel PCH chip and displays the

following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel

PCH chip. The options are Enabled and Disabled.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select

AHCI to congure a SATA drive specied by the user as an AHCI drive. Select

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Chapter 4: AMI BIOS

RAID to congure a SATA drive specied by the user as a RAID drive. The options

are IDE, AHCI, and RAID.

*If the item above "Congure SATA as" is set to AHCI, the following items

will display:

SATA Port 0~ Port 5

This item displays the information detected on the installed SATA drive on the

particular SATA port.

• Display of drive number and capacity as detected by the BIOS

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Port 0 ~ Port 5 Hot Plug

This feature designates the port specied for hot plugging. Set this item to En-

abled for hot-plugging support, which will allow the user to replace a SATA disk

drive without shutting down the system. The options are Enabled and Disabled.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the

device. The options are Enabled and Disabled.

*If the item above "Congure SATA as" is set to IDE, the following items

will display:

Serial ATA Port 0~ Port 5

This item indicates that a SATA port specied by the user is not installed or not

present.

• Display of drive number and capacity as detected by the BIOS

*If the item above "Congure SATA as" is set to RAID, the following items

will display:

SATA RAID Option ROM Type

Use this item to select the device type for onboard SATA RAID Option ROM for

system boot. The options are EFI and Legacy.

Serial ATA Port 0~ Port 5

This item displays the information detected on the installed SATA drives on the

particular SATA port.

• Display of drive number and capacity as detected by the BIO

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X10QBL-CT/X10QBL Motherboard User’s Manual

Port 0~ Port 5

Select Enabled to enable a SATA port specied by the user. The options are

Disabled and Enabled.

Hot Plug

This feature designates this port for hot plugging. Set this item to Enabled for

hot-plugging support, which will allow the user to replace a SATA drive without

shutting down the system. The options are Enabled and Disabled.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-

SET initialization to the device. The options are Enabled and Disabled.

PCIe/PCI/PnP Conguration

PERR# Generation

Select Enabled to allow a PCI/PCI-E device to generate a PCI/PCI-E Parity-Error

(PERR) number for a PCI Bus Signal Error Event. The options are Enabled and

Disabled.

SERR# Generation

Select Enabled to allow a PCI/PCI-E device to generate a System-Error (SERR)

number for a PCI Bus Signal Error Event. The options are Enabled and Disabled.

PCI AER (Advanced Error-Reporting) Support

Select Enabled to support Advanced Error-Reporting for onboard PCI devices. The

options are Disabled and Enabled.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G

Address. The options are Enabled and Disabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled

and Disabled.

Maximum Payload

Select Auto to allow the system BIOS to automatically set the maximum payload

value for a PCI-E device to enhance system performance. The options are Auto,

128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

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Chapter 4: AMI BIOS

Maximum Read Request

Select Auto to allow the system BIOS to automatically set the maximum Read

Request size for a PCI-E device to enhance system performance. The options are

Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

ASPM Support

This feature allows the user to set the Active State Power Management (ASPM)

level for a PCI-E device. Select Force L0s to force all PCI-E links to operate at L0s

state. Select Auto to allow the system BIOS to automatically set the ASPM level for

the system. Select Disabled to disable ASPM support. The options are Disabled,

Force L0s, and Auto.

PCI-E ASPM (Global)

Select Per-Port to support the Active State Power Management (ASPM) level for

all PCI-E ports on the motherboard. Select L1 to force all PCI-E links to operate at

L1 state. The options are L1 Only, and Per-Port

MMIOH Size PerII0

Use this item to set the MMIO (Memory-Mapped I/O Hub) size for each IIO

device. The options are 0x8_00000000 (32GB), 0x10_00000000 (64GB),

0x20_00000000 (128GB), 0x40_00000000 (256GB), 0x80_00000000 (512GB),

and 0x100_00000000 (1024GB).

MMIOHBase

Use this item to select the base memory size according to memory-address

mapping for the IO hub. The base memory size must be between 4032G to

4078G. The options are 0x3800_00000000 (56T), 0x2800_00000000 (40T), and

0x1800_00000000 (24T).

Resource Auto Adjust

Select Enable for the PCI resource-requests for each CPU socket to be automati-

cally adjusted on a need basis when the PCI resource allocator fails. The options

are Enable and Disable.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

PCI Devices Option ROM Settiing

CPU1 SLOT1 PCI-E 3.0 x16 OPROM/CPU1 SLOT2 PCI-E 3.0 x8 OPROM/ CPU2 SLOT3 PCI-E 3.0 x16 OPROM/CPU2 SLOT4 PCI-E 3.0 x8 OPROM/

Use thi s featu re to selec t the ty pe of dev ice installed on a slot specied by the user

for the system to boot from. The options are EFI, Legacy and Disabled.

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X10QBL-CT/X10QBL Motherboard User’s Manual

Video

This feature controls how the system executes UEFI (Unied Extensible Firmware

Interface), and legacy Option ROM. Select Legacy Only to boot the system using a

legacy video device. The options are Do not launch, UEFI Only and Legacy Only.

VGA Priority

This feature allows the user to select the graphics adapter to be used as the primary

boot device. The options are Onboard and Offboard.

Onboard LAN Option ROM Type

Use this item to select the device type for onboard LAN Option ROM for system

boot. The options are EFI and Legacy.

Onboard LAN 1 OPROM/Onboard LAN 2 OPROM

Select iSCSI to use the iSCSI Option ROM to boot the computer using a iSCSI

network device. Select PXE (Preboot Execution Environment) to use an PXE Op-

tion ROM to boot the computer using a PXE network device. The default option

for Onboard LAN 1 is PXE and for Onboard LAN 2 is Disabled..

Load Onboard SAS Option ROM (Available for X10QBL-CT only)

Select EFI to load Onboard LSI SAS 3008 controller’s EFI driver or legacy to load

legacy option ROM driver. The options are Disabled, Legacy and EFI.

Network Stack

Select Enabled enable PXE (Preboot Execution Environment) or UEFI (Unied

Extensible Firmware Interface) for network stack support. The options are Disabled

and Enabled.



ACPI Settings

High Precision Event Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces

periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does

in synchronizing multimedia streams, providing smooth playback, reducing the de-

pendency on other timestamp calculation devices, such as an x86 RDTSC Instruc-

tion embedded in the CPU. The High Performance Event Timer is used to replace

the 8254 Programmable Interval Timer. The options are Enabled and Disabled.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) plat-

form and provide a common infrastructure for the system to handle hardware errors

within the Windows OS environment to reduce system crashes and to enhance

system recovery and health monitoring. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

Trusted Computing (Available when a TPM device is detected by the BIOS)

*FOR TPM 1.2, the following items will display.

Conguration

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled,

onboard security devices will be enabled for TPM (Trusted Platform Module) sup-

port to enhance data integrity and network security. Please reboot the system for

a change on this setting to take effect. The options are Disabled and Enabled.

TPM (Trusted-Platform Module) State

Select Enabled to enable TPM security settings to improve data integrity and

network security. The options are Disabled and Enabled.

Pending Operation

Use this item to schedule a TPM-related operation to be performed by a security

device for system data integrity. The options are None, Enable Take Ownership,

Disable Take Ownership, and TPM Clear.

Note: The computer will reboot in order to execute the pending commands

and change the state of the security device.

Current Status Information: This item displays the information regarding the

current TPM status.

TPM Enable Status

This item displays the status of TPM Support to indicate if TPM is currently

enabled or disabled.

TPM Active Status

This item displays the status of TPM Support to indicate if TPM is currently ac-

tive or deactivated.

TPM Owner Status

This item displays the status of TPM Ownership.

TXT Support

Intel TXT (Trusted Execution Technology) helps protect against software-based at-

tacks and ensures protection, condentiality and integrity of data stored or created

on the system. Use this feature to enable or disable TXT support. The options are

Enabled and Disabled.

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X10QBL-CT/X10QBL Motherboard User’s Manual

*FOR TPM 2.0, the following items will display.

Conguration

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled,

onboard security devices will be enabled for TPM (Trusted Platform Module) sup-

port to enhance data integrity and network security. Please reboot the system for

a change on this setting to take effect. The options are Disabled and Enabled.

*If the item above set to Enabled, the following information will display.

Active PCR banks

Available PCR banks

SHA-1 PCR Bank

Use this item to disable or enable the SHA-1 Platform Conguration Register

(PCR) bank for the installed TPM device. The options are Disabled and Enabled.

SHA256 PCR Bank

Use this item to disable or enable the SHA256 Platform Conguration Register

(PCR) bank for the installed TPM device. The options are Disabled and Enabled.

Pending Operation

Use this item to schedule a TPM-related operation to be performed by a security

device for system data integrity. Your system will reboot to carry out a pending

TPM operation. The options are None and TPM Clear.

Platform Hierarchy

Use this item to disable or enable platform hierarchy for platform protection. The

options are Disabled and Enabled.

Storage Hierarchy

Use this item to disable or enable storage hierarchy for cryptographic protection.

The options are Disabled and Enabled.

Endorsement Hierarchy

Use this item to disable or enable endorsement hierarchy for privacy control.

The options are Disabled and Enabled.

TPM2.0 UEFI Spec Version

Use this feature to specify the TPM UEFI spec version. TCG 1.2 has support for

Win2012, Win8, and Win10. TCG 2 has support for Win10 or later. The options

are TCG_1_2 and TCG_2.

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Chapter 4: AMI BIOS

Device Select

Use this feature to select the TPM version. TPM 1.2 will restrict support to TPM

1.2 devices. TPM 2.0 will restrict support for TPM 2.0 devices. Select Auto to

enable support for both versions. The default setting is Auto.

TXT Support

Intel TXT (Trusted Execution Technology) helps protect against software-based at-

tacks and ensures protection, condentiality and integrity of data stored or created

on the system. Use this feature to enable or disable TXT support. The options are

Disabled and Enabled.

Note: For more information on TPM, please refer to the TPM manual at

http://www.supermicro.com/manuals/other/TPM.pdf.

ME (Management Engine) Subsystem

This feature displays the following ME Subsystem Conguration settings.

General ME Conguration

Operational Firmware Version

Recovery Firmware Version

ME Firmware Features

ME Firmware Status #1

ME Firmware Status #2

Current State

Error Code

Super IO Conguration

Super IO Chip: This item displays the Super IO chip used in the motherboard.

Serial Port 1 Conguration

Serial Port

Select Enabled to enable a serial port specied by the user. The options are En-

abled and Disabled.

Device Settings

This item displays the settings of Serial Port 1 (COM).

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X10QBL-CT/X10QBL Motherboard User’s Manual

Change Port 1 Settings

This option species the base I/O port address and the Interrupt Request address

of Serial Port 1 (COM). Select Disabled to prevent the serial port from accessing

any system resources. When this option is set to Disabled, the serial port becomes

unavailable. The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7,

9, 10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6,

7, 9, 10, 11, 12; IO=2E8h; IRQ=IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12.

Serial Port 2 Conguration

Serial Port

Select Enabled to enable a serial port specied by the user. The options are En-

abled and Disabled.

Change Port 2 Settings

This option species the base I/O port address and the Interrupt Request address

of Serial Port 2 (SOL). Select Disabled to prevent the serial port from accessing

any system resources. When this option is set to Disabled, the serial port becomes

unavailable. The options are Auto, O=2F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,

10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7,

9, 10, 11, 12; IO=2E8h; IRQ=IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12.

Serial Port 2 Attribute

Use this feature to select the attribute for this serial port. The options are SOL

(Serial Over LAN), and COM.

Serial Port Console Redirection

COM 1

COM 1 Console Redirection

Select Enabled to enable COM Port 1 Console Redirection, which will allow a client

machine to be connected to a host machine at a remote site for networking. The

options are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for

conguration:

COM1 Console Redirection Settings

4-30

Supermicro X10QBL operation manual

Specifications and Main Features

Frequently Asked Questions

User Manual