1W Differential Input/Output Audio Power Amplifier
with Selectable Standby
■Differential inputs
■Near zero pop & click
■100dB PSRR @ 217Hz with grounded inputs
■Operating from V
= 2.5V to 5.5V
CC
■1W RAIL to RAIL output power @ Vcc=5V,
THD=1%, F=1kHz, with 8
Ω load
■90dB CMRR @ 217Hz
■Ultra-low consumption in standby mode (10nA)
■Selectable standby mode (active low or
active high
■Ultra fast startup time: 15ms typ.
■Available in DFN10 3x3, 0.5mm pitch &
MiniSO8
■All lead-free packages
Description
The TS4994 is an audio power amplifier capable
of delivering 1W of continuous RMS output power
into an 8
inputs, it exhibits outstanding noise immunity.
An external standby mode control reduces the
supply current to less than 10nA. A STBY MODE
pin allows the standby pin to be active HIGH or
LOW (except in the MiniSO8 version). An internal
thermal shutdown protection is also provided,
making the device capable of sustaining shortcircuits.
The device is equipped with Common Mode
Feedback circuitry allowing outputs to be always
biased at Vcc/2 regardless of the input common
mode voltage.
Ω load @ 5V. Thanks to its differential
Pin Connections (top view)
TS4994IQT - DFN10
STBY
STBY
STBY MODE
STBY MODE
BYPASS
BYPASS
1
1
1
2
2
2
V
V
IN -
IN -
3
3
3
V
V
4
4
4
IN +
IN +
5
5
5
10
10
10
V
V
V
V
9
9
9
N/C
N/C
8
8
8
GND
GND
7
7
7
6
6
6
V
V
TS4994IST - MiniSO8
STBY
STBY
V
V
IN-
IN-
V
V
IN+
IN+
BYPASS
BYPASS
1
1
2
2
3
3
4
4
V
V
8
8
Vcc
Vcc
7
7
GND
GND
6
6
V
V
5
5
Applications
■Mobile phones (cellular / cordless)
■Laptop / notebook computers
■PDAs
■Portable audio devices
■
■
O+
O+
DD
DD
O-
O-
O+
O+
O-
O-
The TS4994 has been designed for high quality
audio applications such as mobile phones and
requires few external components.
Order Codes
Part NumberTemperature RangePackagePackagingMarking
TS4994IQT-40°C to +85°CDFN10Tape & ReelK994
TS4994IST-40°C to +85°CMiniSO8Tape & ReelK994
April 2005Revision 41/31
TS4994Application Component Information
1Application Component Information
ComponentsFunctional Description
C
S
C
B
R
FEED
R
IN
C
IN
Figure 1. Typical Application DFN10 Version
Supply Bypass capacitor which provides power supply filtering.
Bypass capacitor which provides half supply filtering.
Feedback resistor which sets the closed loop gain in conjunction with RIN
= Closed Loop Gain= R
A
V
FEED/RIN
Inverting input resistor which sets the closed loop gain in conjunction with R
.
.
FEED
Optional input capacitor making a high pass filter together with RIN. (fcl = 1 / (2 x Pi x RIN x CIN)
VCC
+
Cs
Bias
GND
Rfeed2
20k
1u
Vo+
10
Vo-
6
8 Ohms
Diff. input -
GND
Diff. Input +
Cin1
220nF
Cin2
220nF
Optional
Rfeed1
20k
Rin1
+
20k
Rin2
+
20k
+
Cb
1u
GND
Vin-
2
Vin+
4
Bypass
5
ModeStdbyTS4994IQ
9
VCC
-
+
Standby
GND
1
73
GND
GNDGNDVCCVCC
Figure 2. Typical Application Mini-SO8 Version
Rfeed1
20k
Diff. input -
Cin1
Rin1
GND
Diff. Input +
220nF
Cin2
220nF
Optional
+
20k
Rin2
+
20k
+
GND
Vin-
2
Vin+
3
Bypass
4
Cb
1u
GNDVCC
Stdby
1
VCC
7
VCC
-
+
Bias
Standby
GND
6
GND
+
GND
Rfeed2
20k
Cs
1u
Vo+
8
Vo-
5
8 Ohms
TS4994IS
2/31
Absolute Maximum RatingsTS4994
2Absolute Maximum Ratings
Table 1. Key parameters and their absolute maximum ratings
SymbolParameterValueUnit
VCC
T
T
R
Supply voltage
V
iInput Voltage
Operating Free Air Temperature Range
oper
Storage Temperature
stg
T
Maximum Junction Temperature
j
Thermal Resistance Junction to Ambient
thja
DFN10
Mini-SO8
PdPower Dissipationinternally limitedW
ESDHuman Body Model2kV
ESDMachine Model200V
Latch-up Immunity200mA
Lead Temperature (soldering, 10sec)260°C
1) All voltages values are measured with respect to the ground pin.
2) The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V
3) The device is protected by a thermal shutdown active at 150°C
1
2
6V
GND to V
CC
V
-40 to + 85°C
-65 to +150°C
150°C
3
120
°C/W
215
Table 2. Operating conditions
SymbolParameterValueUnit
V
V
V
T
R
1) The minimum current consum ption (I
range.
2) When mounted on a 4-layer PCB.
Supply Voltage
CC
Standby Mode Voltage Input:
Standby Active LOW
SM
Standby Active HIGH
Standby Voltage Input:
Device ON (V
STB
Device OFF (V
Thermal Shutdown Temperature
SD
Load Resistor
R
L
Thermal Resistance Junction to Ambient
2
DFN10
THJA
=GND) or Device OFF (VSM=VCC)
SM
=GND) or Device ON (VSM=VCC)
SM
Mini-SO8
STANDBY
) is guaranteed when V
2.5 to 5.5V
V
=GND
SM
V
SM=VCC
1.5
≤ V
≤ VCC
STB
≤ V
G
ND
STB
≤ 0.4
1
150°C
≥ 8Ω
80
190
=GND or VCC (i.e. supply rails) for the whole temperature
Differential Output Offset Voltage
No input signal, RL = 8
Ω
Input Common Mode Voltage
CMRR
≤ -60dB
Output Power
THD = 1% Max, F= 1kHz, RL = 8
Ω
Total Harmonic Distortion + Noise
Po = 225mW rms, Av = 1, 20Hz
≤ F ≤ 20kHz, RL = 8Ω
Power Supply Rejection Ratio with Inputs Grounded
F = 217Hz, R = 8Ω, Av = 1, Cin = 4.7µF, Cb =1µF
Vripple = 200mV
PP
0.6
200250mW
1
0.110mV
-
V
CC
0.9
0.5%
100dB
Common Mode Rejection Ratio
CMRR
SNR
GBP
F = 217Hz, RL = 8
Vic = 200mV
Ω, Av = 1, C
PP
Signal-to-Noise Ratio (A Weighted Filter, A
= 8Ω, THD +N < 0.7%, 20Hz ≤ F ≤ 20kHz)
(R
L
Gain Bandwidth Product
= 8Ω
R
L
= 4.7µF, Cb =1µF
in
= 2.5)
v
90dB
100dB
2MHz
Output Voltage Noise, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
Unweighted, Av = 1
A weighted, Av = 1
Unweighted, Av = 2.5
V
A weighted, Av = 2.5
N
Unweighted, Av = 7.5
A weighted, Av = 7.5
Unweighted, Standby
A weighted, Standby
T
WU
Wake-Up Time
C
=1µF
b
2
6
5.5
12
10.5
33
28
1.5
1
15ms
µV
V
RMS
1) Dynamic measurements - 20*log(rms(Vout)/rms (Vripple)). Vripple is the super-imposed sinus signal relative to Vcc.
2) Transition time from standby mode to fully operational amplifier.
6/31
Electrical CharacteristicsTS4994
0.00.61.21.82.4
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Standby mode=0V
Standby mode=2.6V
Vcc = 2.6V
No load
Tamb=25°C
Current Consumption (mA)
Standby Voltage (V)
0.00.20.40.60.81.0
0.0
0.2
0.4
0.6
RL=16
Ω
RL=8
Ω
Vcc=5V
F=1kHz
THD+N<1%
Power Dissipation (W)
Output Power (W)
Figure 3. Current consumption vs. power
supply voltage
4.0
No load
Tamb=25°C
3.5
3.0
2.5
2.0
1.5
1.0
Current Consumption (mA)
0.5
0.0
012345
Power Supply Voltage (V)
Figure 4. Current consumption vs. standby
voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Current Consumption (mA)
0.5
0.0
012345
Standby mode=5V
Standby mode=0V
Vcc = 5V
No load
Tamb=25°C
Standby Voltage (V)
Figure 6. Current consumption vs. standby
voltage
Figure 7. Differential DC output voltage vs.
common mode input voltage
1000
Av = 1
Tamb = 25°C
100
10
Voo (mV)
1
0.1
0.01
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Vcc=2.5V
Common Mode Input Voltage (V)
Vcc=3.3V
Vcc=5V
Figure 5. Current consumption vs. standby
voltage
3.5
3.0
2.5
2.0
1.5
1.0
Current Consumption (mA)
0.5
0.0
0.00.61.21.82.43.0
Standby mode=0V
Standby mode=3.3V
Standby Voltage (V)
Figure 8. Power dissipation vs. output power
Vcc = 3.3V
No load
Tamb=25°C
7/31
TS4994Electrical Characteristics
88121616202424283232
0.0
0.2
0.4
0.6
0.8
1.0
Vcc=4.5V
Vcc=5V
Vcc=2.5V
Vcc=3V
Vcc=4V
Vcc=3.5V
THD+N=1%
Cb = 1 F
F = 1kHz
BW < 125kHz
Tamb = 25°C
Output power (W)
Load Resistance
0255075100125
0.0
0.5
1.0
1.5
AMR Value
with 4 layers PCB
DFN10 Package Power Dissipation (W)
Ambiant Temperature ( C)
Figure 9. Power dissipation vs. output power
0.3
RL=8
0.2
0.1
Power Dissipation (W)
0.0
0.00.10.20.30.4
RL=16
Ω
Output Power (W)
Ω
Vcc=3.3V
F=1kHz
THD+N<1%
Figure 10. Power dissipation vs. output power
0.20
Vcc=2.6V
F=1kHz
THD+N<1%
0.15
RL=8
Ω
0.10
Figure 12. Output power vs. power supply
voltage
1.50
Cb = 1µF
F = 1kHz
1.25
BW < 125kHz
Tamb = 25°C
1.00
0.75
0.50
0.25
Output power @ 10% THD + N (W)
0.00
2.53.03.54.04.55.0
Vcc (V)
8
Ω
16
Ω
32
Ω
Figure 13. Output power vs. load resistance
0.05
Power Dissipation (W)
0.00
0.00.10.20.3
RL=16
Output Power (W)
Figure 11. Output power vs. power
supply voltage
1.0
Cb = 1µF
F = 1kHz
0.8
BW < 125kHz
Tamb = 25°C
0.6
0.4
0.2
Output power @ 1% THD + N (W)
0.0
2.53.03.54.04.55.0
8/31
Vcc (V)
Ω
Figure 14. Power derating curves
8
Ω
16
Ω
32
Ω
Electrical CharacteristicsTS4994
Figure 15. Power derating curves
0.6
Nominal Value
0.4
0.2
MiniSO8 Package Power Dissipation (W)
0.0
AMR Value
0255075100125
Ambiant Temperature ( C)
Figure 16. Open loop gain vs. frequency
60
Gain
40
20
Gain (dB)
0
Vcc = 5V
-20
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Phase
Frequency (kHz)
0
-40
-80
-120
-160
-200
Figure 18. Open Loop gain vs. frequency
60
Gain
40
20
Gain (dB)
0
Vcc = 2.6V
-20
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Phase
Frequency (kHz)
Figure 19. Close loop gain vs. frequency
10
Gain
0
-10
Phase (°)
-20
Gain (dB)
Vcc = 5V
-30
Av = 1
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Frequency (kHz)
Phase
0
-40
-80
-120
-160
-200
0
-40
-80
-120
-160
-200
Phase (°)
Phase (°)
Figure 17. Open loop gain vs. frequency
60
Gain
40
20
Gain (dB)
0
Vcc = 3.3V
-20
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Phase
Frequency (kHz)
0
-40
-80
-120
-160
-200
Figure 20. Close loop gain vs. frequency
10
Gain
0
-10
Phase (°)
-20
Gain (dB)
Vcc = 3.3V
-30
Av = 1
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Frequency (kHz)
Phase
0
-40
-80
-120
-160
-200
Phase (°)
9/31
TS4994Electrical Characteristics
Figure 21. Close loop gain vs. frequency
10
Gain
0
-10
-20
Gain (dB)
Vcc = 2.6V
-30
Av = 1
ZL = 8Ω + 500pF
Tamb = 25°C
-40
0.1110100100010000
Frequency (kHz)
Phase
Figure 22. PSRR vs. frequency
0
-10
Vcc = 5V
Vripple = 200mVpp
-20
Inputs = Grounded
-30
Av = 1, Cin = 4.7µF
-40
RL ≥ 8
PSRR (dB)
-50
-60
-70
-80
-90
-100
-110
-120
Tamb = 25°C
20
Ω
Cb=0.47µF
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Cb=0
0
-40
-80
-120
-160
-200
20k
Figure 24. PSRR vs. frequency
0
-10
Vcc = 2.6V
Vripple = 200mVpp
-20
Inputs = Grounded
-30
Av = 1, Cin = 4.7µF
-40
RL ≥ 8
Tamb = 25°C
20
Ω
100100010000
-50
Phase (°)
PSRR (dB)
-60
-70
-80
-90
-100
-110
-120
Figure 25. PSRR vs. frequency
0
-10
Vcc = 5V
Vripple = 200mVpp
-20
Inputs = Grounded
-30
Av = 2.5, Cin = 4.7µF
-40
RL ≥ 8
Tamb = 25°C
20
Ω
100100010000
PSRR (dB)
-50
-60
-70
-80
-90
-100
-110
-120
Cb=0.47µF
Cb=1µF
Frequency (Hz)
Cb=0.47µF
Cb=1µF
Frequency (Hz)
Cb=0.1µF
Cb=0
20k
Cb=0.1µF
Cb=0
20k
Figure 23. PSRR vs. frequency
0
-10
Vcc = 3.3V
Vripple = 200mVpp
-20
Inputs = Grounded
-30
Av = 1, Cin = 4.7µF
-40
RL ≥ 8
Tamb = 25°C
20
Ω
Cb=0.47µF
Cb=1µF
100100010000
Frequency (Hz)
10/31
PSRR (dB)
-50
-60
-70
-80
-90
-100
-110
-120
Cb=0.1µF
Cb=0
20k
Figure 26. PSRR vs. frequency
0
-10
Vcc = 3.3V
Vripple = 200mVpp
-20
Inputs = Grounded
-30
Av = 2.5, Cin = 4.7µF
-40
RL ≥ 8
PSRR (dB)
-50
-60
-70
-80
-90
-100
-110
-120
Tamb = 25°C
20
Ω
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Cb=0.47µF
Cb=0
20k
Electrical CharacteristicsTS4994
012345
-100
-80
-60
-40
-20
0
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
Vcc = 5V
Vripple = 200mVpp
Inputs Grounded
F = 217Hz
Av = 1
RL ≥ 8
Ω
Tamb = 25°C
PSRR(dB)
Common Mode Input Voltage (V)
0.00.61.21.82.43.0
-100
-80
-60
-40
-20
0
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
Vcc = 3.3V
Vripple = 200mVpp
Inputs Grounded
F = 217Hz
Av = 1
RL ≥ 8
Ω
Tamb = 25°C
PSRR(dB)
Common Mode Input Voltage (V)
Figure 27. PSRR vs. frequency
0
-10
Vcc = 2.6V
-20
Vripple = 200mVpp
Inputs = Grounded
-30
Av = 2.5, Cin = 4.7µF
-40
RL ≥ 8
PSRR (dB)
-50
-60
-70
-80
-90
-100
-110
-120
Tamb = 25°C
20
Ω
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Cb=0.47µF
Figure 28. PSRR vs. frequency
0
-10
Vcc = 5V
Vripple = 200mVpp
-20
Inputs = Floating
-30
PSRR (dB)
-40
-50
-60
-70
-80
-90
-100
-110
-120
Rfeed = 20k
RL ≥ 8
Tamb = 25°C
20
Ω
Ω
Cb=0.47µF
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Cb=0
Cb=0
20k
20k
Figure 30. PSRR vs. frequency
0
-10
Vcc = 2.6V
Vripple = 200mVpp
-20
Inputs = Floating
-30
PSRR (dB)
-40
-50
-60
-70
-80
-90
-100
-110
-120
Rfeed = 20k
RL ≥ 8
Tamb = 25°C
20
Ω
Ω
Cb=0.47µF
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Cb=0
Figure 31. PSRR vs. common mode input
voltage
20k
Figure 29. PSRR vs. frequency
0
-10
Vcc = 3.3V
Vripple = 200mVpp
-20
Inputs = Floating
-30
Rfeed = 20k
-40
RL ≥ 8
-50
Tamb = 25°C
-60
-70
PSRR (dB)
-80
-90
-100
-110
-120
20
Ω
Ω
Cb=0.47µF
Cb=1µF
100100010000
Frequency (Hz)
Cb=0.1µF
Figure 32. PSRR vs. common mode input
voltage
Cb=0
20k
11/31
TS4994Electrical Characteristics
Figure 33. PSRR vs. common mode input
voltage
0
Vcc = 2.5V
Vripple = 200mVpp
Inputs Grounded
-20
F = 217Hz
Av = 1
-40
RL ≥ 8Ω
Tamb = 25°C
-60
PSRR(dB)
-80
-100
0.00.51.01.52.02.5
Common Mode Input Voltage (V)
Cb=0
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Figure 34. CMRR vs. frequency
0
-10
Vcc = 5V
Vic = 200mVpp
-20
Av = 1, Cin = 470µF
-30
RL ≥ 8
CMRR (dB)
-100
-110
-120
-40
-50
-60
-70
-80
-90
20
Ω
Tamb = 25°C
100100010000
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
Frequency (Hz)
20k
Figure 36. CMRR vs. frequency
0
-10
Vcc = 2.6V
Vic = 200mVpp
-20
Av = 1, Cin = 470µF
-30
RL ≥ 8
CMRR (dB)
-40
-50
-60
-70
-80
-90
-100
-110
-120
Tamb = 25°C
20
Ω
100100010000
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
Frequency (Hz)
Figure 37. CMRR vs. frequency
0
Vcc = 5V
-10
Vic = 200mVpp
-20
Av = 2.5, Cin = 470µF
RL ≥ 8
Tamb = 25°C
20
Ω
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
100100010000
Frequency (Hz)
CMRR (dB)
-30
-40
-50
-60
-70
-80
-90
-100
20k
20k
Figure 35. PSRR vs. frequency
0
-10
Vcc = 3.3V
Vic = 200mVpp
-20
Av = 1, Cin = 470µF
-30
RL ≥ 8
12/31
CMRR (dB)
-100
-110
-120
-40
-50
-60
-70
-80
-90
20
Ω
Tamb = 25°C
100100010000
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
Frequency (Hz)
20k
Figure 38. CMRR vs. frequency
0
Vcc = 3.3V
-10
Vic = 200mVpp
-20
Av = 2.5, Cin = 470µF
RL ≥ 8
Tamb = 25°C
20
Ω
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
100100010000
Frequency (Hz)
CMRR (dB)
-30
-40
-50
-60
-70
-80
-90
-100
20k
Electrical CharacteristicsTS4994
1E-30.010.11
1E-3
0.01
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 8
Ω
F = 20Hz
Av = 1
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
1E-30.010.11
1E-3
0.01
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 8
Ω
F = 20Hz
Av = 2.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
Figure 39. CMRR vs. frequency
0
Vcc = 2.6V
-10
Vic = 200mVpp
-20
Av = 2.5, Cin = 470µF
RL ≥ 8
Tamb = 25°C
20
Ω
Cb=1µF
Cb=0.47µF
Cb=0.1µF
Cb=0
100100010000
Frequency (Hz)
CMRR (dB)
-30
-40
-50
-60
-70
-80
-90
-100
Figure 40. CMRR vs. common mode input
voltage
CMRR(dB)
-20
-40
-60
-80
0
Vcc=2.5V
Vcc=3.3V
Vic = 200mVpp
F = 217Hz
Av = 1, Cb = 1µF
RL ≥ 8
Ω
Tamb = 25°C
Figure 42. THD+N vs. output power
20k
Figure 43. THD+N vs. output power
-100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)
Vcc=5V
Figure 41. CMRR vs. common mode input
voltage
0
-20
-40
-60
CMRR(dB)
-80
-100
Vcc=2.5V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)
Vcc=5V
Vcc=3.3V
Vic = 200mVpp
F = 217Hz
Av = 1, Cb = 0
RL ≥ 8
Ω
Tamb = 25°C
Figure 44. THD+N vs. output power
10
RL = 8
Ω
F = 20Hz
Av = 7.5
Cb = 1µF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
13/31
TS4994Electrical Characteristics
1E-30.010.11
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 8
Ω
F = 20kHz
Av = 1
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
1E-30.010.11
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 8
Ω
F = 20kHz
Av = 2.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
1E-30.010.11
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 8
Ω
F = 20kHz
Av = 7.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
Figure 45. THD+N vs. output power
10
RL = 8
Ω
F = 1kHz
Av = 1
Cb = 1µF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 46. THD+N vs. output power
10
RL = 8
Ω
F = 1kHz
1
THD + N (%)
0.1
Av = 2.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 48. THD+N vs. output power
Figure 49. THD+N vs. output power
0.01
1E-30.010.11
Output Power (W)
Figure 47. THD+N vs. output power
10
RL = 8
Ω
F = 1kHz
Av = 7.5
Cb = 1µF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 50. THD+N vs. output power
14/31
Electrical CharacteristicsTS4994
1E-30.010.11
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
RL = 16
Ω
F = 20kHz
Av = 7.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
Figure 51. THD+N vs. output power
10
RL = 16
Ω
F = 20Hz
Av = 1
1
Cb = 1µF
BW < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 52. THD+N vs. output power
10
RL = 16
1
0.1
THD + N (%)
0.01
Ω
F = 20Hz
Av = 7.5
Cb = 1µF
BW < 125kHz
Tamb = 25°C
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 54. THD+N vs. output power
10
RL = 16
Ω
F = 1kHz
Av = 7.5
Cb = 1µF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Figure 55. THD+N vs. output power
10
RL = 16
1
THD + N (%)
0.1
Ω
F = 20kHz
Av = 1
Cb = 1µF
BW < 125kHz
Tamb = 25°C
Vcc=2.6V
Vcc=3.3V
Vcc=5V
1E-3
1E-30.010.11
Output Power (W)
Figure 53. THD+N vs. output power
10
RL = 16
Ω
F = 1kHz
Av = 1
1
Cb = 1µF
BW < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
1E-30.010.11
Output Power (W)
Vcc=2.6V
Vcc=3.3V
Vcc=5V
0.01
1E-30.010.11
Output Power (W)
Figure 56. THD+N vs. output power
15/31
TS4994Electrical Characteristics
1E-30.010.1
1E-3
0.01
0.1
1
10
F=20kHz
F=20Hz
F=1kHz
RL = 16
Ω
Vcc = 2.6V
Av = 1, Cb = 0
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
Figure 57. THD+N vs. output power
10
RL = 8
Ω
Vcc = 5V
Av = 1
1
Cb = 0
BW < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-30.010.11
Output Power (W)
F=20kHz
F=1kHz
F=20Hz
Figure 58. THD+N vs. output power
10
RL = 8
Ω
Vcc = 2.6V
Av = 1, Cb = 0
1
BW < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
F=20Hz
1E-3
1E-30.010.1
Output Power (W)
F=20kHz
F=1kHz
Figure 60. THD+N vs. output power
Figure 61. THD+N vs. frequency
10
RL = 8
Ω
Av = 1
Cb = 1µF
1
Bw < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
Vcc=2.6V, Po=225mW
Vcc=5V, Po=850mW
100100010000
Frequency (Hz)
20k20
Figure 59. THD+N vs. output power
10
RL = 16
Ω
Vcc = 5V
Av = 1, Cb = 0
1
BW < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
1E-30.010.11
16/31
F=1kHz
F=20Hz
Output Power (W)
F=20kHz
Figure 62. THD+N vs. frequency
10
RL = 8
Ω
Av = 1
Cb = 0
1
Bw < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
Vcc=2.6V, Po=225mW
Vcc=5V, Po=850mW
100100010000
Frequency (Hz)
20k20
Electrical CharacteristicsTS4994
Figure 63. THD+N vs. frequency
10
RL = 8
Ω
Av = 7.5
Cb = 1µF
THD + N (%)
0.01
0.1
Bw < 125kHz
1
Tamb = 25°C
Vcc=2.6V, Po=225mW
Vcc=5V, Po=850mW
100100010000
Frequency (Hz)
Figure 64. THD+N vs. frequency
10
RL = 8
Ω
Av = 7.5
Cb = 0
Bw < 125kHz
1
Tamb = 25°C
Vcc=2.6V, Po=225mW
Figure 66. THD+N vs. frequency
10
RL = 16
Ω
Av = 7.5
Cb = 1µF
1
Bw < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
20k20
1E-3
Vcc=2.6V, Po=155mW
Vcc=5V, Po=600mW
100100010000
Frequency (Hz)
20k20
Figure 67. SNR vs. power supply voltage with
unweighted filter
110
RL=16
105
100
Ω
THD + N (%)
0.1
Vcc=5V, Po=850mW
0.01
100100010000
Frequency (Hz)
Figure 65. THD+N vs. frequency
10
RL = 16
Ω
Av = 1
Cb = 1µF
1
Bw < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
1E-3
Vcc=2.6V, Po=155mW
Vcc=5V, Po=600mW
100100010000
Frequency (Hz)
RL=8
95
90
Av = 2.5
Signal to Noise Ratio (dB)
Cb = 1µF
85
THD+N < 0.7%
Tamb = 25°C
80
20k20
2.53.03.54.04.55.0
Power Supply Voltage (V)
Ω
Figure 68. SNR vs. power supply voltage with
a weighted filter
110
105
100
95
90
Signal to Noise Ratio (dB)
85
20k20
80
2.53.03.54.04.55.0
RL=16
Av = 2.5
Cb = 1µF
THD+N < 0.7%
Tamb = 25°C
Ω
RL=8
Ω
Power Supply Voltage (V)
17/31
TS4994Electrical Characteristics
Figure 69. Startup time vs. bypass capacitor
20
Tamb=25°C
15
10
Startup Time (ms)
5
0
0.00.40.81.21.62.0
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Bypass Capacitor Cb ( F)
18/31
Application InformationTS4994
+
4Application Information
4.1 Differential configuration principle
The TS4994 is a monolithic full-differential input/ output power amplifier. The TS4994 also includes a
common mode feedback loop that controls the output bias value to average it at Vcc/2 for any DC
common mode input voltage. This allows the device to always have a maximum output voltage swing,
and by consequence, maximize the output power. Moreover, as the load is connected differentially
compared to a single-ended topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
l
Very high PSRR (Power Supply Rejection Ratio).
l
High common mode noise rejection.
l
Virtually zero pop without additional circuitry, giving an faster start-up time compared to conventional
single-ended input amplifiers.
l
Easier interfacing with differential output audio DAC.
l
No input coupling capacitors required thanks to common mode feedback loop.
l
In theory, the filtering of the internal bias by an external bypass capacitor is not necessary. But, to
reach maximal performances in all tolerance situations, it’s better to keep this option.
The main disadvantage is:
l
As the differential function is directly linked to external resistors mismatching, in order to reach
maximal performances of the amplifier paying particular attention to this mismatching is mandatory.
4.2 Gain in typical application schematic
Typical differential applications are shown on the figures on page 2.
In the flat region of the frequency-response curve(no C
effect), the differential gain is expressed by the
in
relation:
R
feed
R
InputInput
in
−
where R
Note:
= R
in1
= R
in
For the rest of this chapter, Av
in2
and R
feed
VV
−
OO
Av=
=
diff
= R
diff
= R
feed1
will be called Av to simplify the expression.
feed2
−+
.Diff.Diff
−+
.
4.3 Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias voltage to be
averaged at Vcc/2 for any DC common mode bias input voltage.
However, due to VICM limitation of the input stage (see Electrical Characteristics on page 4), the
common mode feedback loop can ensure its role only within a defined range. This range depends upon
the values of Vcc, R
formula:
with
and R
in
(Av). To have a good estimation of the VICM value, we can apply this
feed
××+×
RV2RVcc
V
ICM
=
V
=
IC
+×
2
feedICin
)RR(2
feedin
.Diff.Diff
InputInput
−+
)V(
)V(
19/31
TS4994Application Information
and the result of the calculation must be in the range:
V9.0VccVV6.0
IC
M
If the result of VICM calculation is not in the previous range, an input coupling capacitor must be used.
−≤≤
Example: With Vcc=2.5V, R
in=Rfeed
0.9V=1.6V, so input coupling capacitors are required or you will have to change the V
=20k and VIC=2V, we found V
=1.63V. This is higher than 2.5V-
ICM
value.
IC
4.4 Low and high frequency response
In the low frequency region, Cin starts to have an effect. Cin forms, with Rin, a high-pass filter with a -3dB
cut-off frequency. F
In the high-frequency region, you can limit the bandwidth by adding a capacitor (C
. It forms a low-pass filter with a -3dB cut-off frequency. FCH is in Hz.
R
feed
While these bandwidth limitations are in theory attractive, in practice, because of low performance in
terms of capacitor precision (and by consequence in terms of mismatching), they deteriorate the values of
PSRR and CMRR.
We will discuss the influence of mismatching on PSRR and CMRR performance in more detail in the
following paragraphs.
Example: A typical application with input coupling and feedback capacitor with F
F
=8kHz. We assume that the mismatching between R
CH
the frequency from DC to 20kHz we observe the following with respect to the PSRR value:
l
From DC to 200Hz, the Cin impedance decreases from infinite to a finite value and the C
impedance is high enough to be neglected. Due to the tolerance of C
mismatch factor (R
l
From 200Hz to 5kHz, the Cin impedance is low enough to be neglected when compare to R
the C
impedance is high enough to be neglected as well. In this range, we can reach the PSRR
feed
performance of the TS4994 itself.
l
From 5kHz to 20kHz, the Cin impedance is low to be neglected when compared to R
impedance decreases to a finite value. Due to tolerance of C
factor (R
feed 1xCfeed 1
is in Hz.
CL
in1xCin
≠ R
≠ R
feed2xCfeed 2
F
CL
F
=
CH
in2xCin2
=
1
CR2
××π×
inin
1
CR2
××π×
feedfeed
in1,2
)Hz(
and C
feed
)Hz(
can be neglected. If we sweep
feed1,2
, we must introduce a
in1,2
) that will decrease the PSRR performance.
, we introduce a mismatching
feed1,2
) that will decrease the PSRR performance.
) in parallel with
=50Hz and
CL
feed
and
in,
and the C
in,
feed
20/31
Application InformationTS4994
4.5 Calculating the influence of mismatching
On PSRR performance:
For this calculation, we consider that C
and C
in
We use the same kind of resistor (same tolerance) and ∆R is the tolerance value in %.
The following equation is valid for frequencies ranging from DC to about 1kHz. Above this frequency,
parasitic effects start to be significant and a literal equation is not possible to write.
The PSRR equation is (∆R in %):
This equation doesn’t include the additional performance provided by bypass capacitor filtering. If a
bypass capacitor is added, it acts, together with the internal high output impedance bias, as a low-pass
filter, and the result is a quite important PSRR improvement with a relatively small bypass capacitor.
have no influence.
feed
⎡
×≤
Log20PSRR
⎢
⎣
×∆
⎤
100R
2
∆−
)R10000(
)dB(
⎥
⎦
The complete PSRR equation (∆R in %, C
PSRR 20
Example: With ∆R=0.1% and C
=0, the minimum PSRR would be -60dB. With a 100nF bypass
This example is a worst case scenario, where each resistor has extreme tolerance and illustrates the fact
that with only a small bypass capacitor, the TS4994 produce high PSRR performance.
In addition, it’s important to note that this is a theoretical formula. As the TS4994 has self-generated
noise, you should consider that the highest practical PSRR reachable is about -110dB. It is therefore
unreasonable to target a -120dB PSRR.
The three following graphs show PSRR versus frequency and versus bypass capacitor C
in worst-case
b
condition (∆R=0.1%).
Figure 70. PSRR vs. frequency worst case
condition
0
-10
Vcc = 5V, Vripple = 200mVpp
-20
Av = 1, Cin = 4.7µF
-30
∆
R/R = 0.1%, RL ≥ 8
-40
Tamb = 25°C, Inputs = Grounded
-50
-60
-70
-80
PSRR (dB)
-90
-100
-110
-120
-130
-140
20
Cb=1µF
100100010000
Ω
Cb=0
Cb=0.1µF
Cb=0.47µF
Frequency (Hz)
20k
Figure 71. PSRR vs. frequency worst case
condition
0
-10
Vcc = 3.3V, Vripple = 200mVpp
-20
Av = 1, Cin = 4.7µF
-30
∆
R/R = 0.1%, RL ≥ 8
Tamb = 25°C, Inputs = Grounded
-40
-50
-60
-70
-80
PSRR (dB)
-90
-100
-110
-120
-130
-140
Cb=1µF
20
100100010000
Ω
Cb=0
Cb=0.1µF
Cb=0.47µF
Frequency (Hz)
20k
21/31
TS4994Application Information
Figure 72. PSRR vs. frequency worst case condition
0
-10
Vcc = 2.5V, Vripple = 200mVpp
-20
Av = 1, Cin = 4.7µF
-30
∆
R/R = 0.1%, RL ≥ 8
Tamb = 25°C, Inputs = Grounded
-40
-50
-60
-70
-80
PSRR (dB)
-90
-100
-110
-120
-130
-140
20
Cb=1µF
100100010000
The two following graphs show typical application of TS4994 with four 0.1% tolerances and a random
choice for them.
Ω
Cb=0
Cb=0.1µF
Cb=0.47µF
20k
Frequency (Hz)
Figure 73. PSRR vs. frequency with random
choice condition
0
-10
Vcc = 5V, Vripple = 200mVpp
Av = 1, Cin = 4.7µF
-20
∆
PSRR (dB)
R/R ≤ 0.1%, RL ≥ 8
-30
Tamb = 25°C, Inputs = Grounded
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
20
Cb=1µF
100100010000
Ω
Cb=0.1µF
Cb=0.47µF
Frequency (Hz)
Cb=0
20k
Figure 74. PSRR vs. frequency with random
choice condition
0
-10
Vcc = 2.5V, Vripple = 200mVpp
Av = 1, Cin = 4.7µF
-20
∆
R/R ≤ 0.1%, RL ≥ 8
-30
Tamb = 25°C, Inputs = Grounded
-40
-50
-60
-70
-80
PSRR (dB)
-90
-100
-110
-120
-130
-140
Cb=1µF
20
100100010000
Ω
Cb=0.1µF
Cb=0.47µF
Frequency (Hz)
Cb=0
20k
CMRR performance
For this calculation, we consider there to be no influence of C
and C
in
. Cb has no influence in the
feed
calculation of the CMRR.
We use the same kind of resistor (same tolerance) and ∆R is the tolerance value in %.
The following equation is valid for frequencies ranging from DC to about 1kHz. Above this frequency,
parasitic effects start to be significant and a literal equation is not possible to write.
The CMRR equation is (∆R in %):
⎡
×≤
Log20CMRR
×∆
⎢
⎣
⎤
200R
2
∆−
)R10000(
)dB(
⎥
⎦
Example: With ∆R=1%, the minimum CMRR would be -34dB.
With a DC Vic=2.5V, the DC differential output (Voo) which results is 50mV maximum. As this Voo is
across the load, for an 8Ω load the extra consumption would be 50mV/8=6.2mA.
22/31
Application InformationTS4994
With ∆R=1%, the minimum CMRR would be -53dB that give Voo=5.6mV and an maximum extra
consumption less than 700µA.
This example is of a worst case scenario where each resistor has extreme tolerance and illustrates the
fact that for CMRR, good matching is essential.
As with the PSRR, due to self-generated noise, the TS4994 CMRR limitation would be about -110dB.
Figures 75 and 76 show CMRR versus frequency and versus bypass capacitor C
in worst-case condition
b
(∆R=0.1%).
Figure 75. CMRR vs. frequency worst case
condition
0
Vcc = 5V
Vic = 200mVpp
-10
Av = 1, Cin = 470µF
∆
-20
-30
CMRR (dB)
-40
-50
-60
Tamb = 25°C
20
R/R = 0.1%, RL ≥ 8
100100010000
Ω
Cb=1µF
Cb=0
Frequency (Hz)
20k
Figure 76. CMRR vs. frequency worst case
condition
0
Vcc = 2.5V
Vic = 200mVpp
-10
Av = 1, Cin = 470µF
∆
-20
-30
CMRR (dB)
-40
-50
-60
Tamb = 25°C
20
R/R = 0.1%, RL ≥ 8
100100010000
Ω
Cb=1µF
Cb=0
Frequency (Hz)
20k
Figures 77 and 78 show CMRR versus frequency for a typical application with four 0.1% tolerances and
a random choice for them.
Figure 77. CMRR vs. frequency with random
choice condition
0
Vcc = 5V
-10
Vic = 200mVpp
-20
Av = 1, Cin = 470µF
∆
-30
-40
-50
CMRR (dB)
-60
-70
-80
-90
Tamb = 25°C
20
R/R ≤ 0.1%, RL ≥ 8
100100010000
Ω
Cb=1µF
Cb=0
Frequency (Hz)
20k
Figure 78. CMRR vs. frequency with random
choice condition
0
Vcc = 2.5V
-10
Vic = 200mVpp
-20
Av = 1, Cin = 470µF
∆
-30
-40
-50
CMRR (dB)
-60
-70
-80
-90
Tamb = 25°C
20
R/R ≤ 0.1%, RL ≥ 8
100100010000
Ω
Cb=1µF
Cb=0
Frequency (Hz)
20k
23/31
TS4994Application Information
4.6 Power dissipation and efficiency
Assumptions:
l
Load voltage and current are sinusoidal (V
l
Supply voltage is a pure DC source (Vcc)
Regarding the load we have:
out
and I
out
)
= V
V
out
PEAK
sin ω t (V)
and
V
I
out
out
=
-------------- (A)
R
L
and
PEAK
2R
2
L
V
=
out
---------------------- ( W )
P
Therefore, the average current delivered by the supply voltage is:
V
I
CC
AVG
= 2
-------------------- (A)
PEAK
L
πR
The power delivered by the supply voltage is:
P
supply
= Vcc Icc
AVG
(W)
Then, the power dissipated by each amplifier is
P
diss
= P
supply
- P
out
(W)
P
diss
22V
CC
----------------------- -
π R
L
–=
P
outPout
and the maximum value is obtained when:
∂Pdiss
---------------------- = 0
∂P
out
and its value is:
2
Note:
maxPdiss
This maximum value is only dependent on power supply voltage and load values.
Vcc2
=
2
R
π
)W(
L
The efficiency is the ratio between the output power and the power supply
η =
P
out
--------------------- =
P
supply
πV
PEAK
----------------------4VCC
The maximum theoretical value is reached when Vpeak = Vcc, so
π
----- = 78.5%
4
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Application InformationTS4994
The maximum die temperature allowable for the TS4994 is 125°C. However, in case of overheating, a
thermal shutdown set to 150°C, puts the TS4994 in standby until the temperature of the die is reduced by
about 5°C.
Two capacitors are needed to correctly bypass the TS4994. A power supply bypass capacitor CS and a
bias voltage bypass capacitor C
has particular influence on the THD+N in the high frequency region (above 7kHz) and an indirect
C
S
influence on power supply disturbances. With a value for C
performances to those shown in the datasheet.
In the high frequency region, if C
supply rail are less filtered.
On the other hand, if C
has an influence on THD+N at lower frequencies, but its function is critical to the final result of PSRR
C
b
is higher than 1µF, those disturbances on the power supply rail are more filtered.
S
(with input grounded and in the lower frequency region).
.
B
of 1µF, you can expect similar THD+N
S
is lower than 1µF, it increases THD+N and disturbances on the power
S
4.8 Wake-up Time: T
WU
When the standby is released to put the device ON, the bypass capacitor Cb will not be charged
immediately. As C
is directly linked to the bias of the amplifier, the bias will not work properly until the C
b
voltage is correct. The time to reach this voltage is called the wake-up time or TWU and is specified in the
tables found in Electrical Characteristics on page 4, with C
=1µF. During the wake-up time phase, the
b
TS4994 gain is close to zero. After the wake-up time period, the gain is released and set to its nominal
value.
has a value other than 1µF, please refer to the graph in Figure 69 on page 18 to establish the wake-
If C
b
up time value.
4.9 Shutdown time
When the standby command is set, the time required to put the two output stages in high impedance and
the internal circuitry in shutdown mode is a few microseconds.
Note:
In shutdown mode, Bypass pin and Vin+, Vin- pins are short-circuited to ground by internal switches. This allows
a quick discharge of C
and Cin capacitors.
b
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b
TS4994Application Information
4.10 Pop performance
In theory, due to a fully differential structure, the pop performance of the TS4994 should be perfect.
, R
However, due to R
in
, and Cin mismatching, some noise could remain at startup. In TS4994 we
feed
included a pop reduction circuitry reach the pop that is theoretical with mismatched components. With this
circuitry, the TS4994 is close to zero pop for all common applications possible.
In addition, when the TS4994 is set in standby, due to the high impedance output stage configuration in
this mode, no pop is possible.
4.11 Single ended input configuration
It’s possible to use the TS4994 in a single-ended input configuration. However, input coupling capacitors
areneeded in this configuration. The schematic in Figure 79 shows this configuration using the miniSO8
version of the TS4994 as example.
Figure 79. Single ended input typical application
VCC
+
Cs
GND
Rfeed2
20k
1u
Vo+
8
Vo-
5
8 Ohms
TS4994IS
Ve
GND
Cin1
220nF
Cin2
220nF
Optional
Rfeed1
20k
Rin1
+
20k
Rin2
+
20k
+
Cb
1u
GND
2
3
4
Vin-
Vin+
Bypass
Stdby
1
7
VCC
-
+
Bias
Standby
GND
6
GND
GND VCC
The components calculations remain the same except for the gain. The new formula is:
R
VV
26/31
Av=
SE
−
=
Ve
feedOO
−+
R
in
Application InformationTS4994
4.12 Demoboard
A demoboard for the TS4994 is available, however it is designed only for the TS4994 in the DFN10
package. However, we can guarantee that all electrical parameters are similar except for the power
dissipation.
For more information about this demoboard, please refer to Application Note AN2013.
Figure 80. Demoboard schematic
Pos. Input
Neg. Input
Cn1
Cn2
GND
GND
Cn3
J1
100nF/10V
100nF/10V
J2
Cn4
R2
R4
Cn8
22k/1%
22k/1%
GND
Vcc
+
GNDGND
C4
1uF/6V
C5
100nF/10V
9
VCC
C1
R1
22k/1%
R3
22k/1%
C2
+
GND
C3
1uF/6V
J3
2
4
5
Cn6
Vin-
Vin+
Bypass
-
+
Bias
Standby
ModeStdbyTS4994DFN10
1
1
2
3
GNDGND
VccVcc
GND
73
Cn7
GND
1
J4
2
3
Vo+
Vo-
10
6
Cn5
Figure 81. Components locationFigure 82. Top layer
27/31
TS4994Application Information
Figure 83. Bottom layer
28/31
Package Mechanical DataTS4994
5Package Mechanical Data
5.1 MiniSO8 package
29/31
TS4994Package Mechanical Data
5.2 DFN10 package
Dimensions in millimeters unless otherwise indicated.
3.0
3.0
10
10
3.0
3.0
0.35
0.35
1
1
0.8
0.8
0.25
0.25
* The Exposed Pad is connected to the Ground
* The Exposed Pad is connected to the Ground
0.5
0.5
30/31
Revision HistoryTS4994
6Revision History
DateRevisionDescription of Changes
01 Sept. 20031First Release
01 Oct. 2004Curves updated in the document
01 Jan. 20052Update Mechanical Data on Flip-Chip Package
17 Mar. 20053Remove datas on Flip-Chip Package
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