ST VNP10N06 User Manual

VNP10N06

"OMNIFET":

FULLY AUTOPROTECTED POWER MOSFET

TYPE V

clamp

R

DS(on)

I

lim

VNP10N06 60 V 0.3 Ω 10 A

■ LINEAR CURRENT LIMITATION

■ THERMAL SHUT DO W N

■ SHORT CIRCUIT PROTECTION

■ INTEGRATED CLAMP

■ LOW CURRENT DRAWN FROM INPUT PIN

■ LOGIC LEVEL INPUT THRESHOLD

■ ESD PROTECTION

■ SCHMITT TRIGGER ON INPUT

■ HIGH NOISE IMMUNI T Y

■ STANDARD TO-220 PAC KA G E

DESCRIP TION

The VNP10N06 is a monolithic device made

using STMicroelectronics VIPower Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limitation and overvoltage clamp protect the chip

n harsh enviroments.

BLOCK DIAG RAM

TO-220

3

2

1

March 2004

1/11

VNP10N06

ABSOLUTE MAXIMUM RATING

Symbol Parameter Value Unit

V

P

T

THERMAL DATA

R

thj-case

R

thj-amb

Drain-source Voltage (Vin = 0) Internally Clamped V

DS

Input Voltage Internally Clamped V

in

I

Input Current ± 20 mA

in

I

Drain Current Internally Limited A

D

I

Reverse DC Output Current -15 A

R

Electrostatic Discharge (C= 100 pF, R=1.5 KΩ)

esd

Total Dissipation at Tc = 25 oC42W

tot

T

Operating Junction Temperature Internally Limited

j

T

Case Operating Temperature Internally Limited

c

Storage Temperature -55 to 150

stg

Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max

4000 V

3

62.5

o o

o

C

o

C

o

C

C/W C/W

ELECTRICAL CHARACTERISTICS (T

= 25 oC unless otherwise specified)

case

OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

CLAMP

Drain-source Clamp

ID = 200 mA V

= 0 506070 V

in

Voltage

V

IL

Input Low Level

I

= 100 µA V

D

DS

= 16 V

1.5 V

Voltage

V

I

DSS

I

IH

INCL

ISS

Input High Level Voltage

Input-Source Reverse Clamp Voltage

Zero Input Voltage Drain Current (V

in

= 0)

Supply Current from

R

= 27 Ω V

L

V

= 0.5 V

DS

I

= -1 mA

in

I

= 1 mA

in

= 50 V V

V

DS

VDS < 35 V V

DD

in in

= 16 V

= V

IL

= V

IL

VDS = 0 V Vin = 5 V 150 300 µA

3.2 V

-1 8

-0.3 11

250 100

Input Pin

ON (∗)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

R

DS(on)

Static Drain-source On

V

= 7 V ID = 1 A TJ < 125 oC

in

0.15 0.3 Ω

Resistance

DYNAMIC

V V

µA µA

Symbol Parameter Test Conditions Min. Typ. Max. Unit

C

Output Capacitance V

oss

= 13 V f = 1 MHz V

DS

= 0 350 500 pF

in

2/11

VNP10N06

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING (∗∗)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

t

d(on)

t

d(off)

t

(di/dt)

Q

Turn-on Delay Time Rise Time

r

Turn-off Delay Time Fall Time

f

Turn-on Delay Time Rise Time

r

Turn-off Delay Time Fall Time

f

Turn-on Current Slope V

on

Total Input Charge VDD = 12 V ID = 1 A V

i

V

= 16 V Id = 1 A

DD

V

= 7 V R

gen

(see figure 3)

V

= 16 V Id = 1 A

DD

V

= 7 V R

gen

(see figure 3)

= 16 V ID = 1 A

DD

= 7 V R

V

in

gen

= 10 Ω

= 1000 Ω

= 10 Ω

1100

550 200 100

1.2

1.6

1.2

1.5 A/µs

= 7 V 13 nC

in

SOURCE DRAIN DIO DE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VSD (∗) Forward On Voltage ISD = 1 A Vin = V

t

Q

(∗∗)

rr

(∗∗)

Reverse Recovery Time Reverse Recovery

I

= 1 A di/dt = 100 A/µs

SD

V

= 30 V Tj = 25 oC

DD

(see test circuit, figure 5) Charge Reverse Recovery

(∗∗)

I

RRM

Current

IL

0.8 1.6 V

125

0.22

3.5

1600

900 400 200

1.8

1

1.5

2.3

1.8

ns ns ns ns

µs µs µs µs

ns

µC

A

PROTECTION

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

lim

t

dlim

T

jsh

T

jrs

Eas (∗∗) Single Pulse

(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (∗∗) Parameters guaranteed by design/characterizat i on

Drain Current Limit Vin = 7 V VDS = 13 V 6 10 15 A

(∗∗) Step Response

Vin = 7 V VDS step from 0 to 13 V 12 20 µs Current Limit

(∗∗) Overtemperature

150

Shutdown

(∗∗) Overtemperature Reset 135

Avalanche Energy

starting Tj = 25 oC VDD = 24 V

Vin = 7 V R

= 1 KΩ L = 10 mH

gen

250 mJ

o

C

o

C

3/11

VNP10N06

PROTECTION FEATURES

During Normal Operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path as soon as V

> VIH.

IN

The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user’s standpoint is that a small DC current (typically 150 µA) flows into the INPUT pin in order to supply the internal circuitry.

During turn-off of an unclamped inductive load the output voltage is clamped to a safe level by an integrated Zener clamp between DRAIN pin and the gate of the internal Power MOSFET.

In this condition, the Power MOSFET gate is set

to a voltage high enough to sustain the inductive load current even if the INPUT pin is driven to 0V.

The device integrates an active current limiter circuit which limits the drain current I

to I

D

lim

whatever the INPUT pin Voltage. When the current limiter is active, the device

operates in the linear region, so power dissipation may exceed the heatsinking capability. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperat ure thres hold T

If T

reaches T

j

, the device shuts down

jsh

.

whatever the INPUT pin voltage. The device will restart automatically when T T

jrs

has cooled down to

j

4/11