Double channel high side driver for automotive applications
Max supply voltageV
Operating voltage rangeV
Max On-State resistance (per ch.)
Current limitation (typ)I
Off-state supply currentI
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
■ Diagnostic functions
– Open Drain status output
– On-state open-load detection
– Off-state open-load detection
– Output short to Vcc detection
– Overload and short to ground (power
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
■ All types of resistive, inductive and capacitive
loads
Description
The VND5E050J-E and VND5E050K-E are
double channel high-side drivers manufactured in
the ST proprietary VIPower M0-5 technology
and housed in the tiny PowerSSO-12 and
PowerSSO-24 packages.
The
VND5E050J-E and VND5E050K-E
designed to drive automotive
grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS-compatible interface with any
microcontroller.
The devices integrate advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over temperature shut-off with
auto-restart and over-voltage active clamp.
A dedicated active low digital status pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground, over temperature indication, short-circuit
to V
diagnosis and on & off-state open-load
CC
detection.
The diagnostic feedback of the whole device can
be disabled by pulling the STAT_DIS pin up, thus
allowing wired-ORing with other similar devices.
Table 2.Suggested connections for unused and not connected pins
PowerSSO-24
Connection / pinStatusN.C.OutputInputSTAT_DIS
FloatingXXXXX
To groundNot allowedXNot allowed
Through 10KΩ
resistor
Through 10KΩ
resistor
6/40 Doc ID 14472 Rev 3
VND5E050K-EElectrical specifications
2 Electrical specifications
Figure 3.Current and voltage conventions
I
S
V
CC
V
CC
Fn
V
I
SD
V
SD
I
INn
INPUTn
V
INn
Note:V
Fn
= V
- VCC during reverse battery condition.
OUTn
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.Absolute maximum ratings
SymbolParameterValueUnit
GND
OUTPUTnSTAT_DIS
STATUSn
I
GND
I
OUTn
I
STATn
V
STATn
V
OUTn
V
- V
- I
I
OUT
- I
I
STAT
I
STAT_DIS
E
DC supply voltage41V
CC
Reverse DC supply voltage0.3V
CC
DC reverse ground pin current200mA
GND
DC output currentInternally limitedA
Reverse DC output current 15A
OUT
DC input current+10 / -1mA
I
IN
DC status current+10 / -1mA
DC status disable current+10 / -1mA
Maximum switching energy
MAX
(L=3 mH; RL=0Ω; V
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.))
104mJ
Doc ID 14472 Rev 37/40
Electrical specificationsVND5E050K-E
Table 3.Absolute maximum ratings (continued)
SymbolParameterValueUnit
Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)
4000
4000
4000
5000
5000
V
V
V
V
V
V
V
T
– Input
– Status
ESD
–STAT_DIS
– Output
–V
CC
Charge device model (CDM-AEC-Q100-011)750V
ESD
Junction operating temperature-40 to 150°C
T
j
Storage temperature- 55 to 150°C
stg
2.2 Thermal data
Table 4.Thermal data
Value
SymbolParameter
PowerSSO-12PowerSSO-24
Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (max.)
(with one channel ON)
Thermal resistance junction-ambient
(max.)
2.82.8°C/W
See Figure 36See Figure 40°C/W
8/40 Doc ID 14472 Rev 3
VND5E050K-EElectrical specifications
2.3 Electrical characteristics
Values specified in this section are for 8 V<VCC<28V; -40°C<Tj<150 °C, unless otherwise
stated.
.
Table 5.Power section
SymbolParameterTest conditionsMin.Typ. Max. Unit
V
CC
V
USD
V
USDhyst
R
ON
V
clamp
I
I
L(off1)
V
1. PowerMOS leakage included.
2. For each channel.
Operating supply voltage4.51328V
Undervoltage shutdown3.54.5V
Undervoltage shutdown
hysteresis
On-state resistance
Clamp voltageIS=20mA414652V
Supply current
S
Off-state output
(2)
current
Output - VCC diode
voltage
(2)
F
I
=2A; Tj=25°C
(2)
OUT
=2A; Tj=150°C
I
OUT
I
=2A; VCC=5V; Tj=25°C
OUT
Off-state; VCC=13V; Tj=25°C;
V
IN=VOUT
On-state; V
I
OUT
VIN=V
= 0V
CC
=0A
=0V; VCC=13V;
OUT
Tj=25°C
V
IN=VOUT
=0V; VCC=13V;
Tj=125°C
-I
=2 A; Tj=150°C0.7V
OUT
=13V; VIN=5V;
0.5V
100
(1)
5
2
3
000.013
50
mΩ
mΩ
65
mΩ
(1)
6µAmA
5
µA
Table 6.Switching (VCC=13V; Tj= 25°C)
SymbolParameterTest conditionsMin.Typ.Max. Unit
t
d(on)
t
d(off)
dV
/dt
OUT
/dt
dV
OUT
W
ON
W
OFF
Turn- On delay time RL= 6.5Ω (see Figure 6)20 µs
Turn- Off delay time RL= 6.5Ω (see Figure 6)40 µs
Turn- On voltage slopeRL= 6.5Ω
(on)
Turn- Off voltage slopeRL= 6.5Ω
(off)
Switching energy
losses during t
won
Switching energy
losses during t
woff
RL= 6.5Ω (see Figure 6)0.21mJ
RL= 6.5Ω (see Figure 6)0.28mJ
See
Figure 26
See
Figure 28
V/µs
V/µs
Doc ID 14472 Rev 39/40
Electrical specificationsVND5E050K-E
Table 7.Status pin (VSD=0V)
SymbolParameterTest conditionsMin.Typ.MaxUnit
V
STAT
I
LSTAT
C
STAT
V
Table 8.Protections
Status low output
voltage
Status leakage current
Status pin input
capacitance
Status clamp voltage
SCL
(1)
=1.6 mA, VSD=0V0.5V
I
STAT
Normal Operation or V
= 5V
V
STAT
SD
=5V,
Normal Operation or VSD=5V,
V
= 5V
STAT
I
STAT
I
STAT
= 1mA
= -1mA
5.5
-0.7
10µA
100pF
7V
SymbolParameterTest conditionsMin.Typ.Max.Unit
I
limH
I
limL
T
TSD
T
T
T
HYST
t
SDL
V
DEMAG
V
ON
RS
DC short circuit currentVCC=13V;5V<VCC<28V
=13V
Short circuit current
during thermal cycling
V
CC
TR<Tj<T
TSD
Shutdown temperature150175200°C
Reset temperature
R
Thermal reset of
STATUS
Thermal hysteresis
(T
Status delay in overload
conditions
Turn-off output voltage
clamp
Output voltage drop
limitation
TSD-TR
)
T
I
OUT
I
OUT
T
(see Figure 4)20µs
j>TTSD
=2A; VIN=0; L=6mH
=0.1A;
= -40°C...+150°C
j
(see Figure 5)
192738
38
7A
TRS + 1TRS + 5
135°C
7°C
VCC-41VCC-46VCC-52
25mV
V
A
A
°C
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.