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VND5E050AJ-E
Datasheet (ST)
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Datasheet VND5E050AJ-E, VND5E050AK-E Datasheet (ST)

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Double channel high side driver with analog current sense
Features
Max transient supply voltage V
Operating voltage range V
Max On-state resistance (per ch.) R
Current limitation (typ) I
Off-state supply current I
1. Typical value with all loads connected.
■ General
– Inrush current active management by
power limitation – Very low standby current – 3.0 V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
european directive – Very low current sense leakage
■ Diagnostic functions
– Proportional load current sense – High current sense precision for wide
currents range – Current sense disable – Off-state open load detection – Output short to V – Overload and short to ground (power
limitation) indication – Thermal shutdown indication
■ Protections
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Over temperature shutdown with auto
restart (thermal shutdown)
detection
CC
CC
CC
ON
LIMH
S
41 V
4.5 to 28 V
50 mΩ
27 A
(1)
2 µA
VND5E050AJ-E
VND5E050AK-E
for automotive applications
PowerSSO-12
– Reverse battery protected (see Figure 32) – Electrostatic discharge protection
Applications
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VND5E050AJ-E and VND5E050AK-E are double channel high-side drivers manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-12 and PowerSSO­24 packages. The VND5E050AJ-E and VND5E050AK-E are designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller.
The devices integrate advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, over­temperature indication, short-circuit to Vcc diagnosis and on & off state open load detection.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
PowerSSO-24
July 2009 Doc ID 14617 Rev 4 1/44
www.st.com
1
Contents VND5E050AJ-E / VND5E050AK-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 25
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 25
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 26
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and off-state open load detection . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 29
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E List of tables
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8V<V Table 10. Open load detection (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 17. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 18. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 19. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 20. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
CC
Doc ID 14617 Rev 4 3/44
List of figures VND5E050AJ-E / VND5E050AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. I
OUT/ISENSE
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 14. Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 15. Short to V Figure 16. T
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
J
Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 29
Figure 35. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 30
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 31
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12
Figure 39. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 33
Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 34
Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24
Figure 43. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 44. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 45. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 46. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 47. PowerSS0-24
vs I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
OUT
. . . . . . . . . . . . . . . . . . . 31
. . . . . . . . . . . . . . . . . . . 34
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E List of figures
Figure 48. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Doc ID 14617 Rev 4 5/44
Block diagram and pin description VND5E050AJ-E / VND5E050AK-E

1 Block diagram and pin description

Figure 1. Block diagram

V
CC
Signal Clamp
Undervoltage
IN1
IN2
CS_ DIS
CS1
CS2
LOGIC

Table 1. Pin function

Control & Diagnostic 1
DRIVER
Over temp.
V
SENSEH
OVERLOAD PROTE CTION
(ACTIVE POWER LIMITATION)
Current
Limitation
Current
Sense
Power Clamp
V
ON
Limitation
OFF State Open load
Name Function
V
CC
OUTPUT
GND
Battery connection.
Power output.
1,2
Ground connection. Must be reverse battery protected by an external diode/resistor network.
CH 1
GND
Channels 2
CH 2
CONTROL & DIAGNOSTIC
OUT2
OUT1
INPUT
CURRENT
SENSE
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
1,2
switch state.
Analog current sense pin, delivers a current proportional to the load current.
1,2
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
6/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Block diagram and pin description

Figure 2. Configuration diagram (top view)

TAB = V
GND
INPUT2
CURRENT SENSE1
INPUT1
CURRENT SENSE2
CS_DIS
cc
12
1 2 3 4 5
6
11 10
V
cc
OUTPUT2 OUTPUT2
9
OUTPUT1
8
OUTPUT1
7
V
cc
CURRENT SENSE1
CURRENT SENSE2
V
GND
N.C.
INPUT2
N.C.
INPUT1
N.C.
N.C.
CS_DIS.
V
CC
CC
OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1
TAB = V
CC
PowerSSO-12

Table 2. Suggested connections for unused and not connected pins

PowerSSO-24
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground
Through 1 KΩ
resistor
X
Through 22 KΩ
resistor
Through 10 KΩ
resistor
Through 10 KΩ
resistor
Doc ID 14617 Rev 4 7/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
CC
V
V
SENSE1
Fn
V
OUT1
I
I
CSD
V
CSD
I
IN1
V
IN1
I
IN2
V
IN2
CS_DIS
INPUT1
INPUT2
GND
OUTPUT1
CURRENT SENSE1
OUTPUT2
CURRENT SENSE2
I
GND
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
OUT2
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
-I
I
-I
GND
OUT
OUT
I
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current 20 A
DC input current -1 to 10 mA
IN
I
CSD
-I
CSENSE
V
CSENSE
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
8/44 Doc ID 14617 Rev 4
V
- 41 to
CC
+V
CC
V
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
E
MAX
Maximum switching energy (single pulse) (L= 3mH; R
Electrostatic discharge (human body model: R=1.5KΩ; C=100pF) – Input
V
ESD
– Current sense –CS_DIS –Output –V
CC
V
ESD
T
T
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature - 40 to 150 °C
j
Storage temperature - 55 to 150 °C
stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter
R
thj-case
R
thj-amb
Thermal resistance junction-case (with one channel ON)
Thermal resistance junction-ambient See Figure 36 See Figure 40 °C/W
=0Ω; V
L
=13.5V; T
bat
jstart
=150°C; I
OUT
= I
limL
(Typ.))
104 mJ
4000 2000 4000 5000 5000
Max value
PowerSSO-12 PowerSSO-24
2.7 2.7 °C/W
V V V V V
Unit

2.3 Electrical characteristics

Values specified in this section are for 8 V<VCC<28V; -40°C<Tj<150 °C, unless otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
USD
V
USDhyst
R
V
clamp
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
Undervoltage shutdown hysteresis
On-state resistance
ON
Clamp voltage IS= 20mA 41 46 52 V
0.5 V
I
= 2A; Tj= 25°C 50
OUT
(1)
= 2A; Tj= 150°C 100
OUT
= 2A; VCC= 5V; Tj= 25°C 65
I
OUT
mΩI
Doc ID 14617 Rev 4 9/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Table 5. Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
L(off1)
V
Supply current
S
Off-state output current
Output - VCC diode voltage
F
Off-state; VCC= 13V; Tj= 25°C; V
IN=VOUT=VSENSE=VCSD
= 13V; VIN= 5V;
CC
= 0V; VCC= 13V;
= 0V; VCC= 13V;
(1)
On-state; V
=0A
I
OUT
VIN=V
OUT
Tj=25°C
V
IN=VOUT
Tj=125°C
(1)
-I
= 4A; Tj= 150°C 0.7 V
OUT
=0V
(2)5(2)
2
36mA
00.013
05
1. For each channel.
2. PowerMOS leakage included.
Table 6. Switching (VCC=13V; Tj= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Turn-on delay time RL= 6.5Ω (see Figure 6)20 µs
Turn-off delay time RL= 6.5Ω (see Figure 6)45 µs
Turn-on voltage slope RL= 6.5Ω
(on)
Turn-off voltage slope RL= 6.5Ω
(off)
Switching energy losses during t
won
Switching energy losses during t
woff
RL= 6.5Ω (see Figure 6)0.15 mJ
RL= 6.5Ω (see Figure 6)0.3 mJ
See
Figure 26
See
Figure 28
dV
dV
t
d(on)
t
d(off)
OUT
OUT
W
W
/dt
/dt
ON
OFF
µA
µA
V/µs
V/µs

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
V
I(hyst)
V
V
CSDL
I
CSDL
Input low level voltage 0.9 V
IL
Low level input current VIN=0.9V 1 µA
IL
Input high level voltage 2.1 V
IH
High level input current VIN=2.1V 10 µA
IH
Input hysteresis voltage 0.25 V
Input clamp voltage
ICL
CS_DIS low level voltage 0.9 V
Low level CS_DIS current
10/44 Doc ID 14617 Rev 4
I
=1mA 5.5 7
IN
=-1mA -0.7
I
IN
V
=0.9V 1 µA
CSD
V
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 7. Logic inputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 8. Protections and diagnostics

CS_DIS high level voltage
High level CS_DIS current
CS_DIS hysteresis voltage
CS_DIS clamp voltage
V
=2.1V 10 µA
CSD
I
=1mA 5.5 7
CSD
=-1mA -0.7
I
CSD
(1)
2.1 V
0.25 V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
I
limL
T
T
T
T
HYST
V
DEMAG
TSD
R
RS
V
=13V
DC short circuit current
Short circuit current during thermal cycling
V
CC
5V<V
CC
= 13V TR<Tj<T
CC
< 28V
TSD
Shutdown temperature 150 175 200 °C
Reset temperature TRS+1 TRS+5 °C
Thermal reset of status 135 °C
Thermal hysteresis
TSD -TR
)
I
= 2A; VIN=0; L=6mH VCC-41 VCC-46 VCC-52 V
OUT
(T
Turn-off output voltage clamp
19 27 38
38
7A
7°C
V
A A
I
= 0.1A;
V
ON
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.

Table 9. Current sense (8V<VCC<18V)

Output voltage drop limitation
OUT
Tj= -40°C...+150°C
(see Figure 8)
25 mV
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.05A; V
K
K
dK
1/K1
I
0
OUT/ISENSE
I
1
OUT/ISENSE
Current sense ratio
(1)
drift
OUT
Tj= -40°C...150°C 1440 2250 3630
I
= 1A; V
OUT
SENSE
Tj= -40°C...150°C
= 25°C...150°C
T
j
=1A; V
I
OUT
V
CSD
= -40 °C to 150 °C
T
J
SENSE
=0V;
SENSE
=4V;V
= 4V;
=0.5V;V
CSD
CSD
=0V;
=0V;
1740
2070
2820
1750
2070
2562
-15 15 %
Doc ID 14617 Rev 4 11/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
K
2
dK
2/K2
K
3
dK
3/K3
I
SENSE0
I
OL
V
SENSE
V
SENSEH
I
SENSEH
t
DSENSE1H
t
DSENSE1L
I
OUT/ISENSE
Current sense ratio
(1)
drift
I
OUT/ISENSE
Current sense ratio
(1)
drift
Analog sense leakage current
Open load on-state current detection threshold
Max analog sense output voltage
Analog sense output voltage in fault condition
Analog sense output current in fault condition
Delay response time from falling edge of CS_DIS pin
Delay response time from rising edge of CS_DIS pin
= 2A; V
OUT
= -40°C...150°C
T
j
= 25°C...150°C
T
j
= 2 A; V
I
OUT
=0V;
V
CSD
TJ= -40 °C to 150 °C
I
= 4A; V
OUT
Tj= -40°C...150°C
= 25°C...150°C
T
j
= 4 A; V
I
OUT
= 0V;
V
CSD
= -40 °C to 150 °C
T
J
I
= 0A; V
OUT
=5V; VIN=0V; Tj= -40°C...150°C
V
CSD
= 0V; VIN=5V; Tj= -40°C...150°C00
V
CSD
= 2A; V
I
OUT
= 5V; VIN= 5V; Tj= -40°C...150°C
V
CSD
VIN = 5V, 8V<VCC<18V I
SENSE
I
= 4A; V
OUT
VCC= 13V; R
(2)
VCC= 13V; V
(2)
V
SENSE
I
SENSE
(see Figure 4)
V
SENSE
I
SENSE
(see Figure 4)
= 5 µA
<4V, 0.5A<Iout<4A = 90% of I
<4V, 0.5A<Iout<4A =10% of I
SENSE
SENSE
= 4V;V
= 4 V;
CSD
= 0V;
1900 1899
2000 2000
2395 2282
-9 9 %
SENSE
SENSE
= 4V;V
= 4 V;
CSD
= 0V;
1969 1950
1990 1990
2210 2153
-6 6 %
=0V;
SENSE
1 2
= 0V;
SENSE
01
420mA
= 0V 5 V
CSD
= 3.9 KΩ 8V
SENSE
= 5V 9 mA
SENSE
SENSEMAX
SENSEMAX
40 100 µs
520µs
µA
Delay response
t
DSENSE2H
time from rising edge of INPUT pin
V
SENSE
I
SENSE
(see Figure 4)
12/44 Doc ID 14617 Rev 4
<4V, 0.5A<Iout<4A =90% of I
SENSEMAX
80 250 µs
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Delay response
V I I I
V I (see Figure 4)
Δt
DSENSE2H
t
DSENSE2L
time between rising edge of output current and rising edge of current sense
Delay response time from falling edge of INPUT pin
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, over temperature and open load off-state detection.

Table 10. Open load detection (8V<VCC<18V)

<4V,
SENSE
= 90% of I
SENSE
= 90% of I
OUT
OUTMAX
= 2A (see Figure 7)
<4V, 0.5A<Iout<4A
SENSE
=10% of I
SENSE
SENSEMAX,
OUTMAX
SENSEMAX
40 µs
80 250 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Open load off-state
V
OL
voltage detection
VIN = 0 V 2
threshold
See
Figure 5
4V
Output short circuit to
t
DSTKON
VCC detection delay at
See Figure 5 180 1200 µs
turn-off
I
L(off2)r
I
L(off2)f
Off-state output current at V
OUT
= 4V
Off-state output current at V
OUT
= 2V
=0V; V
V
IN
rising from 0V to 4V
V
OUT
=0V; V
V
IN
V
falling from VCC to 2V
OUT
=0V
SENSE
SENSE=VSENSEH
-120 0 µA
-50 90 µA
Delay response from
= 4 V; VIN= 0V
td_vol
output rising edge to
SENSE
rising edge in
V open load
V
OUT
V
SENSE
= 90% of V
SENSEH
20 µs

Figure 4. Current sense delay characteristics

INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
Doc ID 14617 Rev 4 13/44
t
DSENSE1L
t
DSENSE1H
t
DSENSE2L
Electrical specifications VND5E050AJ-E / VND5E050AK-E

Figure 5. Open load off-state delay timing

OUTPUT STUCK TO V
V
IN
V
CS

Figure 6. Switching characteristics

V
OUT
dV
OUT
INPUT
/dt
(on)
t
d(on)
t
Won
80%
t
r
10%
t
d(off)
CC
V
t
DSTKON
t
Woff
90%
t
f
OUT
V
SENSEH
> V
dV
OL
OUT
/dt
(off)
t
14/44 Doc ID 14617 Rev 4
t
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
V
IN
Δ
t
DSENSE2H
t
I
OUT
I
SENSE
90% I
OUTMAX
I
OUTMAX
I
SENSEMAX
t
90% I
SENSEMAX
t

Figure 8. Output voltage drop limitation

Vcc-V
out
Tj=150oC
V
on
Von/R
on(T)
T
=25oC
j
T
=-40oC
j
I
out
Doc ID 14617 Rev 4 15/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E
Figure 9. I
I
/ I
out
sense
3000
2800
2600
2400
max Tj = 25 °C to 150 °C
2200
2000
1800
1600
1400
1200
11,522,533,54
OUT/ISENSE
max Tj = -40 °C to 150 °C
min Tj = 25 °C to 150 °C
min Tj = -40 °C to 150 °C
vs I
OUT
typical value
I
(A)
OUT

Figure 10. Maximum current sense ratio drift vs load current

dk/k(%)
20
15
10
5
0
-5
-10
-15
-20
1234
Note: Parameter guaranteed by design; it is not tested.
I
OUT
(A)
16/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Electrical specifications

Table 11. Truth table

Conditions Input Output Sense (V
Normal operation
L
H
L
H
CSD
0
Nominal
=0V)
(1)
Overtemperature
Undervoltage
Overload
Short circuit to GND (power limitation)
Open load off-state (with external pull-up)
Short circuit to V
CC
(external pull-up disconnected)
Negative output voltage clamp
1. If the V and external circuit.
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
CSD
L
H
L
H
H
L L
L L
X
0
V
SENSEH
0 0
Nominal
(no power limitation)
H
Cycling
V
SENSEH
(power limitation)
L
H
LHV
L
H
L L
H H
0
V
SENSEH
SENSEH
V
SENSEH
< Nominal
LL0
Doc ID 14617 Rev 4 17/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E

Table 12. Electrical transient requirements (part 1)

ISO 7637-2:
2004(E)
test pulse
Test levels
(1)
Number of
pulses or
III IV Min. Max.
test times
Burst cycle/pulse
repetition time
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
(2)
5b
1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 13. Electrical transient requirements (part 2)

ISO 7637-2:
+65V +87V 1 pulse 400ms, 2Ω
Test level results
2004E
test pulse
III VI
1C C
2a C C
3a C C
3b C C
Delays and
Impedance
4C C
(1)
5b
1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 3)

CC
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device did not perform as designed after exposure to
E
disturbance and cannot be returned to proper operation without replacing the device.
18/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Electrical specifications

2.4 Waveforms

Figure 11. Normal operation

Normal operation
INPUT
Nominal load Nominal load
I
OUT
V
SENSE
V
CS_DIS

Figure 12. Overload or short to GND

Overload or Short to GND
INPUT
I
>
LimH
I
OUT
V
SENSE
V
CS_DIS
Power Limitation
I
LimL
Thermal cycling
>
Doc ID 14617 Rev 4 19/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E

Figure 13. Intermittent overload

Intermittent Overload
INPUT
Overload
I
>
LimH
I
>
LimL
I
OUT
V
>
SENSEH
V
SENSE
V
CS_DIS

Figure 14. Off-state open load with external circuitry

OFF-State Open Load
with external circuitry
Nominal load
INPUT
V
t
DSTK(on)
OL
V
SENSEH
V
OUT
I
OUT
V
SENSE
V
CS_DIS
20/44 Doc ID 14617 Rev 4
V
> V
OUT
OL
>
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Figure 15. Short to V
V
OUT
I
OUT
V
CS_DIS
CC
Resistive
Short to V
V
OL
t
DSTK(on)
CC
Short to V
CC
Hard
Short to V
V
> V
OUT
t
DSTK(on)
CC
OL

Figure 16. TJ evolution in overload or short to GND

TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
T
J_START
T
J
I
>
LimH
I
OUT
Power Limitation
T
T
TSD
R
< I
T
HYST
LimL
Doc ID 14617 Rev 4 21/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E

2.5 Electrical characteristics curves

Figure 17. Off-state output current Figure 18. High level input current

Iloff (nA)
550
500
450
400
350
300
250
200
150
100
50
0
-50 -25 0 25 50 75 100 125 150 175
Off State Vcc=13V
Vin=Vout=0V
Tc (°C)
Iih (µA)
5
4,5
3,5
2,5
1,5
0,5
Vin=2.1V
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175

Figure 19. Input clamp voltage Figure 20. Input low level

Vicl (V)
7
6,8
6,6
6,4
6,2
5,8
5,6
5,4
5,2
lin=1mA
6
5
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vil (V)
2
1,8
1,6
1,4
1,2
1
0,8
0,6
0,4
0,2
0
-50 -25 0 25 50 75 100 125 150 175

Figure 21. Input high level Figure 22. Input hysteresis voltage

Vih (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vihyst (V)
1
0,9
0,8
0,7
0,6
0,5
0,4
0,3
0,2
0,1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Tc (°C)
Tc (°C)
22/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Electrical specifications
Figure 23. On-state resistance vs T
case
Ron (mOhm)
300
250
200
150
100
50
Iout= 2A Vcc=13V
0
-50 -25 0 25 50 75 100 125 150 175
Figure 24. On-state resistance vs V
Ron (mOhm)
100
80
60
40
20
0
0 5 10 15 20 25 30 35 40
Tc (°C)

Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope

(dVout/dt )On (V/ms)
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0 25 50 75 100 125 150 175
(dVout/dt )Off (V/ms)
600
550
500
450
400
350
300
250
200
150
100
50
0
-50 -25 0 25 50 75 100 125 150 175
Vusd (V)
16
14
12
10
8
6
4
2
0
-50 -25 0 25 50 75 100 125 150 175
Figure 27. I
Ilimh (A)
40
35
30
25
20
15
10
-50 -25 0 25 50 75 100 125 150 175
LIMH
vs T
Vcc=13V
case
Tc (°C)
Tc (°C)

Figure 28. Turn-off voltage slope

Vcc (V)
Vcc=13V
RI=6.5 Ohm
Tc (°C)
Vcc=13V
RI= 6.5 Ohm
Tc (°C)
CC
Tc=150°C
Tc=125°C
Tc=25°C
Tc=-40°C
Doc ID 14617 Rev 4 23/44
Electrical specifications VND5E050AJ-E / VND5E050AK-E

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage

Vcsdh (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vcsdcl(V)
10
9
8
Icsd = 1 mA
7
6
5
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)

Figure 31. CS_DIS low level voltage

Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
24/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Application information

3 Application information

Figure 32. Application schematic

+5V
V
CC
R
prot
Μ
CU
R
prot
R
prot
R
SENSE
C
EXT
CS_DIS
INPUT
CURRENT SENSE
D
ld
OUTPUT
GND
R
GND
GND
D
GND
V
Note: Channel 2 has the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against reverse battery.
3.1.1 Solution 1: resistor in the ground line (R
This can be used with any type of load.
The following is an indication on how to dimension the R
1. R
2. R
where -I maximum rating section of the device datasheet.
Power dissipation in R
P
= (-VCC)2/R
D
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the R
GND
values. This shift will vary depending on how many devices are on in the case of several high side drivers sharing the same R
≤ 600mV / (I
GND
≥ (−VCC) / (-I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
GND
)
)
(when VCC<0: during reverse battery situations) is:
GND
will produce a shift (I
S(on)max
* R
GND
GND
) in the input thresholds and the status output
.
GND
only)
GND
S(on)max
resistor.
becomes the sum of the
Doc ID 14617 Rev 4 25/44
Application information VND5E050AJ-E / VND5E050AK-E
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the
ground line.
3.1.2 Solution 2: diode (D
A resistor (R
=1kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (≈600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the V
max DC rating. The same applies if the device is subject to transients on the VCC line
CC
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (R prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os:
if the device drives an
GND
prot
) in line to
-V
CCpeak/Ilatchup
≤ R
prot
≤ (V
OHμC-VIH-VGND
Calculation example:
For V
5kΩ ≤ R
Recommended values: R
CCpeak
prot
≤ 180kΩ
= - 100V and I
latchup
=10kΩ, C
prot
≥ 20mA; V

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
● Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio K The current I external resistor R minimum (see parameter V
26/44 Doc ID 14617 Rev 4
can be easily converted to a voltage V
SENSE
. Linearity between I
SENSE
SENSE
) / I
IHmax
≥ 4.5V
OHµC
=10nF.
EXT
.
OUT
and V
X
SENSE
by means of an
SENSE
is ensured up to 5V
in Table 9: Current sense (8V<VCC<18V)). The
VND5E050AJ-E / VND5E050AK-E Application information
current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8V<V
● Diagnostic flag in fault conditions, delivering a fixed voltage V
maximum current I
SENSEH
in case of the following fault conditions (refer to ):
<18V)).
CC
SENSEH
up to a
– Power limitation activation
– Over-temperature
–Short to V
in off-state
CC
– Open load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.

Figure 33. Current sense and diagnostic

V
V
BAT
V
CC
PU
41V
Overtemperature
OL OFF
Pwr_Lim
SENSEH
CS_DIS
To uC ADC
I
OUT/KX
R
PROT
R
SENSE
I
SENSEH
CURRENT
SENSEn
V
SENSE
V

3.4.1 Short to VCC and off-state open load detection

Short to V
A short circuit between V V
SENSEH
during the on-state depending on the nature of the short circuit.
Off-state open load with external circuitry
CC
and output is indicated by the relevant current sense pin set to
CC
during the device off-state. Small or no current is delivered by the current sense
INPUTn
Main MOSn
+
-
GND
PU_CMD
R
PU
V
OL
OUTn
I
I
Loff2r
Loff2f
Load
R
PD
Detection of an open load in off mode requires an external pull-up resistor R the output to a positive supply voltage V
Doc ID 14617 Rev 4 27/44
PU
.
connecting
PU
Application information VND5E050AJ-E / VND5E050AK-E
It is preferable VPU to be switched off during the module stand-by mode in order to avoid the overall stand-by current consumption to increase in normal conditions, i.e. when load is connected.
An external pull down resistor R
connected between output and GND is mandatory to
PD
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
R
must be selected in order to ensure V
PD
OUT < VOLmin
unless pulled up by the external
circuitry:
VVIRV
2
=<⋅=
OLfoffLPD
min)2(
R
≤ 22 KΩ is recommended.
PD
OUT
OFFupPull
_
−
For proper open load detection in off-state, the external pull-up resistor must be selected according to the following formula:
IRRVR
V
OUT
For the values of V
(8V<V
CC
<18V).
=
ONupPull
_
−
OLmin,VOLmax, IL(off2)r
and I
⋅⋅−⋅
RR
+
PDPU
see Table 10: Open load detection
L(off2)f
roffLPDPUPUPD
)2(
OL
max
VV
4
=>
28/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Application information

3.5 Maximum demagnetization energy (VCC = 13.5V)

Figure 34. Maximum turn-off current versus inductance (for each channel)

100
A
B
C
10
I (A)
1
0,1 1 10 100L (mH)
A: T
B: T
C: T
VIN, I
= 150°C single pulse
jstart
= 100°C repetitive pulse
jstart
= 125°C repetitive pulse
jstart
L
Note: Values are generated with R
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
Demagnetization Demagnetization Demagnetization
=0 Ω.In case of repetitive pulses, T
L
(at beginning of each
jstart
t
Doc ID 14617 Rev 4 29/44
Package and PCB thermal data VND5E050AJ-E / VND5E050AK-E

4 Package and PCB thermal data

4.1 PowerSSO-12 thermal data

Figure 35. PowerSSO-12 PC board

Note: Layout condition of R
area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm
Figure 36. R
thj-amb
ON)
RTHj_amb(°C/ W)
70
65
60
55
50
45
40
35
30
0246810
and Zth measurements (PCB: Double layer, Thermal Vias, FR4
th
2
).
Vs. PCB copper area in open box free air condition (one channel
PCB Cu heatsink area (cm^ 2)
30/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and PCB thermal data
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/ W)
100
Footprint
2 cm
8 cm
2
2
10
1
0,1
0,0001 0,001 0,01 0,1 1 10 100 1000
Time ( s)
Equation 1: pulse calculation formula
Z
where

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12

THδ
RTHδ Z
δ tpT⁄=
THtp
1 δ–()+⋅=
(a)
a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 14617 Rev 4 31/44
Package and PCB thermal data VND5E050AJ-E / VND5E050AK-E

Table 15. Thermal parameters

Area/island (cm2)Footprint28
R1=R7 (°C/W) 0.7
R2=R8 (°C/W) 2.8
R3 (°C/W) 4
R4 (°C/W) 8 8 7
R5 (°C/W) 22 15 10
R6 (°C/W) 26 20 15
C1=C7 (W.s/°C) 0.001
C2=C8 (W.s/°C) 0.0025
C3 (W.s/°C) 0.05
C4 (W.s/°C) 0.2 0.1 0.1
C5 (W.s/°C) 0.27 0.8 1
C6 (W.s/°C) 3 6 9

4.2 PowerSSO-24 thermal data

Figure 39. PowerSSO-24 PC board

Note: Layout condition of R
area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm
and Zth measurements (PCB: Double layer, Thermal Vias, FR4
th
2
).
32/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and PCB thermal data
Figure 40. R
RTHj_amb(°C/W)
55
50
45
40
35
30
0246810
thj-amb
ON)
vs PCB copper area in open box free air condition (one channel
PCB Cu heatsink area (cm^2)
Doc ID 14617 Rev 4 33/44
Package and PCB thermal data VND5E050AJ-E / VND5E050AK-E
Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
Equation 2: pulse calculation formula
Z
where

Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24

b. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
THδ
RTHδ Z
THtp
1 δ–()+⋅=
δ tpT⁄=
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
(b)
34/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and PCB thermal data

Table 16. Thermal parameters

Area / island (cm2)Footprint 2 8
R1= R7 (°C/W) 0.4
R2= R8 (°C/W) 2
R3 (°C/W) 6
R4 (°C/W) 7.7
R5 (°C/W) 9 9 8
R6 (°C/W) 28 17 10
C1= C7 (W.s/°C) 0.001
C2= C8 (W.s/°C) 0.0022
C3 (W.s/°C) 0.025
C4 (W.s/°C) 0.75
C5 (W.s/°C) 1 4 9
C6 (W.s/°C) 2.2 5 17
Doc ID 14617 Rev 4 35/44
Package and packing information VND5E050AJ-E / VND5E050AK-E

5 Package and packing information

5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com
ECOPACK® is an ST trademark.

5.2 PowerSSO-12 package information

Figure 43. PowerSSO-12 package dimensions

.
36/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and packing information

Table 17. PowerSSO-12 mechanical data

Symbol
Min. Typ. Max.
A 1.25 1.62
A1 0 0.1
A2 1.10 1.65
B 0.23 0.41
C 0.19 0.25
D4.8 5.0
E3.8 4.0
e0.8
H5.8 6.2
h 0.25 0.5
L 0.4 1.27
Millimeters
k0° 8°
X1.9 2.5
Y3.6 4.2
ddd 0.1
Doc ID 14617 Rev 4 37/44
Package and packing information VND5E050AJ-E / VND5E050AK-E

5.3 PowerSSO-24 package information

Figure 44. PowerSSO-24 package dimensions

38/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and packing information

Table 18. PowerSSO-24 mechanical data

Symbol
Min. Typ. Max.
A 2.45
A2 2.15 2.35
a1 0 0.1
b0.33 0.51
c0.23 0.32
(3)
D
(3)
E
10.10 10.50
7.40 7.60
e0.8
e3 8.8
F2.3
G 0.1
H 10.1 10.5
(1) (2)
Millimeters
h 0.4
k0° 8°
L0.55 0.85
O1.2
Q0.8
S2.9
T3.65
U1.0
N 10°
X4.1 4.7
Y6.5 7.1
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.5 mm per side
3. “D and E” do not include mold Flash or protusions. Mold Flash or protusions shall not exceed 0.15 mm per side
Doc ID 14617 Rev 4 39/44
Package and packing information VND5E050AJ-E / VND5E050AK-E

5.4 PowerSSO-12 packing information

Figure 45. PowerSSO-12 tube shipment (no suffix)

B
C
Base q.ty 100 Bulk q.ty 2000 Tube length (± 0.5) 532
A
A1.85 B6.75 C (± 0.1) 0.6
All dimensions are in mm.

Figure 46. PowerSSO-12 tape and reel shipment (suffix “TR”)

REEL DIMENSIONS
Base q.ty 2500 Bulk q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 12.4 N (min) 60 T (max) 18.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12 Tape hole spacing P0 (± 0.1) 4 Component spacing P 8 Hole diameter D (± 0.05) 1.5 Hole diameter D1 (min) 1.5 Hole position F (± 0.1) 5.5 Compartment depth K (max) 4.5 Hole spacing P1 (± 0.1) 2
All dimensions are in mm.
End
Start
Top
cover
tape
500mm min
Empty components pockets saled with cover tape.
User direction of feed
No componentsNo components Components
500mm min
40/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Package and packing information

5.5 PowerSSO-24 packing information

Figure 47. PowerSS0-24 tube shipment (no suffix)

Base qty 49
C
B
A

Figure 48. PowerSSO-24 tape and reel shipment (suffix “TR”)

Bulk qty 1225 Tube length (±0.5) 532 A 3.5 B 13.8 C (±0.1) 0.6
All dimensions are in mm.
REEL DIMENSIONS
Base qty 1000 Bulk qty 1000 A (max) 330 B (min) 1.5 C (±0.2) 13 F 20.2 G (+2 / -0) 24.4 N (min) 100 T (max) 30.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986
Tape width W 24 Tape hole spacing P0 (±0.1) 4 Component spacing P 12 Hole diameter D (±0.05) 1.55 Hole diameter D1 (min) 1.5 Hole position F (±0.1) 11.5 Compartment depth K (max) 2.85 Hole spacing P1 (±0.1) 2
End
All dimensions are in mm.
Start
Top
cover
tape
500mm min
Empty components pockets sealed with cover tape.
User direction of feed
No componentsNo components Components
500mm min
Doc ID 14617 Rev 4 41/44
Order codes VND5E050AJ-E / VND5E050AK-E

6 Order codes

Table 19. Device summary

Order codes
Package
Tube Tape and reel
PowerSSO-12 VND5E050AJ-E VND5E050AJTR-E
PowerSSO-24 VND5E050AK-E VND5E050AKTR-E
42/44 Doc ID 14617 Rev 4
VND5E050AJ-E / VND5E050AK-E Revision history

7 Revision history

Table 20. Document revision history

Date Revision Changes
01-Apr-2008 1 Initial release.
05-Mar-2009 2 Changed Table 18: PowerSSO-24 mechanical data
Table 18: PowerSSO-24 mechanical data:
19-Jun-2009 3
22-Jul-2009 4 Updated Figure 44: PowerSSO-24 package dimensions.
– Changed L (min) value from 0.6 to 0.55 – Changed L (max) value from 1 to 0.85
Doc ID 14617 Rev 4 43/44
VND5E050AJ-E / VND5E050AK-E
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