ST TDA7528 User Manual

FM/AM car-radio receiver front-end for IF-sampling systems
Features
High-performance AM/FM front-end chip for IF-
sampling car-radio tuners
US, JAPAN, OIRT) / Weather Band / HD-Radio / DRM applications
Ready for multi-tuner applications (phase
diversity, background tuner)
Dual input FM-mixer with high image rejection,
specialized for different front-end circuits
Integrated AM preamplifier and tank for lower-
cost applications
Fully integrated tuning PLL with two VCO's for
diversity systems
World tuning capable
Integrated IF tank
AGC controlled IF amplifier with four inputs for
connection of up to four ceramic filters
Fully electronically adjustable
2
I
C/SPI controlled
Description
TDA7528
with fully integrated VCO
LQFP64
Its field of use includes all the current radio broadcast services in the range of 50kHz to 163MHz for AM radio, FM radio and US weather band. Digital standards such as DRM and HD radio can also be handled. A single supterheterodyne architecture with 10.7 MHz IF­frequency provides high dynamic range.
The IMR mixer has separate input and output stages for AM frequency bands up to 30 MHz and for FM frequencies above 30 MHz.
The integrated AM-preamplifier and the fully integrated low-pass filter enable low cost applications. Two FM inputs with different noise / IP3 parameter, provide full flexibility for the pre­stage circuitry. Each mixer output is able to drive two IF-filters, which can be selected by the different IF-amplifier inputs.
The TDA7528 is a front-end module for use in car radio receivers with digital IF processing, using the STA3004, respectively the STA3005 backend
The fast tuning PLL controls two different VCO, which are designed to operate without frequency overlap.
IC.

Table 1. Device summary

Order code Package Packing
TDA7528 LQFP64 exposed pad (10x10x1.4 mm) Tray
December 2009 Doc ID 13141 Rev 6 1/65
www.st.com
1
Contents TDA7528
Contents
1 Product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 General parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 Power management and voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3.1 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3.2 Power-on circuit and low supply voltage detector . . . . . . . . . . . . . . . . . 14
3.3.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4 FM - Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.4.1 IMR and active balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.4.2 FM AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 AM - Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5.1 AM LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5.2 Switchable LPF 4
3.5.3 IMR and active balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5.4 AM AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
th
order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.6 IF - Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.6.1 IF-Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.6.2 IF-AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.6.3 IF buffer amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7 Phase Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7.1 VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.7.2 Reference oscillator / reference frequency input buffer . . . . . . . . . . . . . 32
3.7.3 Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.7.4 Phase frequency detector and charge pump . . . . . . . . . . . . . . . . . . . . . 33
3.8 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/65 Doc ID 13141 Rev 6
TDA7528 Contents
3.9 D/A-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.10 A/D-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.11 GPIO - general purpose I/O interface pins . . . . . . . . . . . . . . . . . . . . . . . . 36
3.11.1 Serial data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.11.2 Communication using the I
3.11.3 Communication using the SPI protocol . . . . . . . . . . . . . . . . . . . . . . . . . 38
2
C protocol . . . . . . . . . . . . . . . . . . . . . . . . . 37
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5 Programming information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.1 Address organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5.2 Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.2.1 Short_reg (0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5.2.2 ADCctrl (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.2.3 GPIO mode (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.2.4 AGC and mixer control (3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5.2.5 Supply control (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.2.6 Divider R MSB (5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5.2.7 IF AGC control (6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.2.8 FM AGC (7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.2.9 AGC voltage threshold (8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.2.10 Mixer alignment 1 (9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5.2.11 Mixer alignment 2 (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.2.12 PLL control 1 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.2.13 PLL control 2 (12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.2.14 PLL test (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.2.15 Misc 1 (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.2.16 Misc 2 (15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.2.17 AGC time constant settings (16 / 32) . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.2.18 AMAGC control (17 / 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.2.19 GPIO output level control (18 / 34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.2.20 IF control (19 / 35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2.21 VCO divider (V-divider) (20 / 36) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.2.22 PLL main divider (N-divider) 1 (21 / 37) . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.2.23 PLL main divider (N-divider) 2 (22 / 38) . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.2.24 PLL main divider (N-divider) 3 (23 / 39) . . . . . . . . . . . . . . . . . . . . . . . . . 56
5.2.25 PLL Divider ratio calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Doc ID 13141 Rev 6 3/65
Contents TDA7528
5.2.26 Divider R LSB (24/40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.2.27 Charge pump current (25 / 41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.2.28 Tuning DAC 1 (26 / 42) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.2.29 Tuning DAC 2 (27 / 43) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.2.30 Different controls (28 / 44) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.2.31 AM filter adjust (29 / 45) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
5.2.32 Misc 3 (30 / 46) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.2.33 AD converter test (31 / 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.2.34 Read 1 (48) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
5.2.35 Read 2 (49) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4/65 Doc ID 13141 Rev 6
TDA7528 List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin function description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. General parameters electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. Voltage sag detection electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. Voltage regulator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 7. IMR and active balun electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 8. FM-AGC electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. AM LNA electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 10. Switchable LPF 4
Table 11. IMR and active balun electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 12. AM-AGC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 13. IF-Amplifier with anti aliasing filter and ADC buffer electrical characteristics . . . . . . . . . . . 27
Table 14. IF-AGC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 15. IF buffer amplifier electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 16. Phase Locked Loop electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 17. VCO electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 18. Reference oscillator / reference frequency input buffer electrical characteristics . . . . . . . . 32
Table 19. Divider electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 20. Phase frequency detector and charge pump electrical characteristics. . . . . . . . . . . . . . . . 33
Table 21. Temperature sensor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 22. D/A-converter electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 23. A/D-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 24. GPIO - general purpose I/O interface pins electrical characteristics . . . . . . . . . . . . . . . . . 36
Table 25. GPIO test conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 26. Pin configuration of the serial data interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 27. I
Table 28. Communication using the SPI protocol electrical characteristics . . . . . . . . . . . . . . . . . . . . 38
Table 29. Short_reg (0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 30. ADCctrl (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 31. GPIO mode (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 32. AGC and mixer control (3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 33. Supply control (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 34. Divider R MSB (5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 35. IF AGC control (6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 36. FM AGC (7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 37. AGC voltage threshold (8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 38. Mixer alignment 1 (9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 39. Mixer alignment 2 (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 40. PLL control 1 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 41. PLL control 2 (12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 42. PLL test (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 43. Misc 1 (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 44. Misc 2 (15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 45. AGC time constant settings (16 / 32) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 46. AMAGC control (17 / 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 47. GPIO output level control (18 / 34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 48. IF control (19 / 35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2
C addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
th
order electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Doc ID 13141 Rev 6 5/65
List of tables TDA7528
Table 49. VCO divider (V-divider) (20 / 36) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 50. PLL main divider (N-divider) 1 (21 / 37) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 51. PLL main divider (N-divider) 2 (22 / 38) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 52. PLL main divider (N-divider) 3 (23 / 39) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 53. PLL Divider ratio calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 54. Divider R LSB (24/40). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 55. Charge pump current (25 / 41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 56. Tuning DAC 1 (26 / 42) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 57. Tuning DAC 2 (27 / 43) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 58. Different controls (28 / 44) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 59. AM filter adjust (29 / 45) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 60. Misc 3 (30 / 46) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 61. AD converter test (31 / 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 62. Read 1 (48) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 63. Read 2 (49) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 64. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
6/65 Doc ID 13141 Rev 6
TDA7528 List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 2. Pinout diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 3. FM AGC - Controlled current output mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 4. FM AGC - Controlled current output mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 5. FM AGC - Controlled Voltage / current output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6. AM AGC - Controlled current output mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 7. AM AGC - Voltage and current mode with hand-over . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 8. Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 9. Address organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 10. LQFP64 (10x10x1.4mm) exposed pad down mechanical data and package dimensions . 63
Doc ID 13141 Rev 6 7/65
Product description TDA7528

1 Product description

1.1 Summary

The TDA7528 is a front-end module for use in car radio receivers on the 50 kHz - 108 MHz and 161 MHz - 163 MHz frequency bands. Its field of use includes all the current radio broadcast services worldwide on long, medium and short wave, CB radio, FM radio on the OIRT, Japanese and ITU frequency bands and the American weather band. Both analogue AM and FM and digital standards such as DRM and HD radio (IBOC) can be handled.
The receiver is designed as a single super-heterodyne with an intermediate frequency of
10.7 MHz. The IF signal is digitized, filtered and demodulated in the appropriate backend IC. The combination of two independently-operating front-ends with the backend makes phase diversity operation possible or the simultaneous reception of two freely-selectable frequencies with any combination of types of demodulation.
The TDA7528 IMR mixer has separate input- and output-stages for AM frequency bands up to 30 MHz (narrowband services) and for FM frequencies above 30 MHz (broadband signals).
As an option, the AM path can be operated with an integrated preamplifier stage and an integrated low-pass filter to reduce interfering input signals on the IF and image frequencies. The mixer has two FM inputs with different properties. The more sensitive (lower noise) input is intended for the use of a passive pre-selection stage and the high level, advanced IP3 input for an active preamplifier stage. The mixer outputs have a single ended low impedance design to drive one or two IF filters with different bandwidths. A switchable gain IF amplifier, independent IF AGC and an integrated anti-aliasing stage drive the IF A/D converter of the backend. Programmable RF AGCs to actuate adjustable preamplifier stages and two D/A converters for tuning external filter stages complete the reception path.
Two fully-integrated VCOs are included in the TDA7528, oscillating in a range around
3.7 GHz and 4.7 GHz respectively. The output signal of the selected VCO drives a programmable divider generating the LO signal for the mixer stage. The PLL, integrated with the exception of the loop filter, facilitates reception on all the above-mentioned frequencies, rapid frequency changes in the standard tuning steps of 50 kHz for FM, 9 or 10 kHz for LW and MW and 5 kHz for SW. The smallest available tuning steps are 12.5 kHz for FM and 1 kHz for all AM bands.
The TDA7528 is controlled by a serial command interface, switchable between SPI and I protocol. The external reference source is typically 74.1 MHz. However, the TDA7528 also has its own reference oscillator.
All the necessary calibration steps can be carried out electronically during production. An integrated temperature sensor facilitates the adaptation of various parameters during operation, like IF gain or AGC threshold.
2
C
8/65 Doc ID 13141 Rev 6
TDA7528 Product description

1.2 Block diagram

Figure 1. Block diagram

TDA7528
Doc ID 13141 Rev 6 9/65
Pin description TDA7528

2 Pin description

2.1 Pin connection

Figure 2. Pinout diagram (top view)

GNDRF2
GP5/IFbuff
IFin1
GP2/TCAM2
IFin2
IFin3
VCCIF
IFin4/GP3/key
IFdec
TCIF2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GNDDIF
TCIFI
IFout1
IFout2
BIASD2
VDDdec
VCCBUS
MISO
MOSI
CLK
CS/AS
PS
GNDBUS
VCCRO
XTAL0
XTAL1
Balun1
Balundec
DAC2
DAC1
FMMIX1in
FMMIX1dec
FMAGC2/GP7
FMAGC1
FMMIX2in
FMMIX2dec
GNDRF1
AMAGC1
AMMIXdec
AMMIXin
AMFdec
AMFin
BALUNout1
BALUNout2
63
64
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17 18 19 20 21
VCCRF2
61
62
TCAM
TCFM
59 58 57 565455 53 52 51 50 49
60
22 23 24 25 26
BIASD1
271128 29 30 31 32

2.2 Pin description

Table 2. Pin function description
Pin # Pin name Description
1 BALUN1 Active balun input 1
2 BALUNdec Active balun input 2 (decoupling)
3 DAC2 Tuning DAC 2 output
4 DAC1 Tuning DAC 1 output
5 FMMIX1in FM mixer input – high gain stage = mode 1
6 FMMIX1dec FM mixer decouple
7 FMAGC2/GP7 FM AGC voltage output / alternative GP7 output
8 FMAGC1 FM AGC current output for PIN diode
9 FMMIX2in FM Mixer input – low gain stage = mode2
GP4/UDS
AMLNAout
AMLNAin
AMLNAgnd
AMGC2/GP8
VCCRF1
VCOdec1
Vtune
VCOdec2
VCOGND
LFLC
LFHC
VDDPLL
GNDPLL
GP1
GNDRO
TDA7528_LQFP64_PinOut
10/65 Doc ID 13141 Rev 6
TDA7528 Pin description
Table 2. Pin function description (continued)
Pin # Pin name Description
10 FMMIX2dec FM Mixer decouple
11 GNDRF1 GND RF1 section
12 AMAGC1 AMAGC PIN diode driver output
13 AMMIXdec AM mixer decouple
14 AMMIXin AM mixer input
15 AMFdec Decoupling of AM filter
16 AMFin Input of AM filter
17 AMLNAout AM LNA output
18 GP4/UDS GPIO 4 / UDS input
19 AMAGC2/GP8 AM AGC voltage output / alternative GP8 output
20 AMLNAin AM LNA input
21 AMLNAGND AM LNA Ground
22 VCCRF1 Supply RF1 section
23 VCOdec1 BIAS decouple for VCO
24 Vtune VCO tuning voltage
25 VCOdec2 BIAS decouple for VCO
26 GNDVCO VCO Ground
27 LFLC Loop filter low current output
28 LFHC Loop filter high current output
29 GNDPLL PLL Ground
30 VDDPLL Supply PLL
31 GP1 GPIO 1
32 GNDRO Ground PLL digital part
33 XTALI Reference oscillator input
34 XTALO Reference oscillator output
35 VCCRO Supply PLL digital part
36 BUSGND BUS interface Ground
37 PS Protocol Select
38 CS/AS Chip select / Address select
39 CLK SPI / I2C clock
40 MOSI SPI data input / I2C Data
41 MISO SPI data output / GP6
42 VCCBUS Supply of BUS interface
43 VDDdec Decouple of internal 3.3V (=3,3V + Vbe)
44 BIASD2 Decoupling for biasing
Doc ID 13141 Rev 6 11/65
Pin description TDA7528
Table 2. Pin function description (continued)
Pin # Pin name Description
45 IFout2 Differential IF output 2
46 IFout1 Differential IF output 1
47 TCIF1 time constant IF AGC for AM
48 GNDIF ground IF section
49 TCIF2 time constant IF AGC for FM
50 IFdec Decouple of IF amplifier
51 IFin4 / GP3 IF input 4 (= AM IBOC input) / GPIO 3
52 VCCIF Supply IF section
53 IFin3 IF input 3 (= AM analog input)
54 BIASD1 Decoupling for biasing
55 IFin2 IF input 2 (= FM IBOC input)
56 GP2/TCAM2 GPIO 2 / input for 2nd order time constant of AM AGC
57 IFin1 IF input 1 (= FM analog input)
58 GP5/IFbuff GPIO 5 / IF buffer amplifier output
59 GNDRF2 GND RF2 section = active balun GND
60 TCAM AM AGC time constant
61 TCFM FM AGC time constant
62 VCCRF2 Supply voltage RF2 section
63 Balunout1 Active balun output 1 = FM output
64 Balunout2 Active balun output 2 = AM output
12/65 Doc ID 13141 Rev 6
TDA7528 Electrical characteristics

3 Electrical characteristics

3.1 Absolute maximum ratings

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
V
T
CC
DD
amb
T
s
T
j
Supply voltage 5.5 V
Supply voltage 3.6 V
Ambient temperature range -40 to 125 °C
Storage temperature -55 to 150 °C
Max. junction temperature 150 °C
Operating temperature and supply voltage range: -40 °C to 105 °C; 4.7 V to 5.35 V. All specification parameter are fulfilled in this temperature and supply voltage range, unless otherwise specified. Typical values reflect average measurement at T V
= 5.0 V and VDD = 3.3 V.
CC
= 25 °C,
amb

3.2 General parameters

Table 4. General parameters electrical characteristics

Symbol Parameter Test conditions Min. Typ Max Unit
V
CC
V
DD
I
CC
I
CCmax
I
CC_pwd
P
max
T
amb
T
extend
Full performance 4.7 5 5.35 V
5V supply voltage
3.3V supply voltage
V
slew rate range - 0.01 - 1000 V/ms
CC
Fully functional but with reduced performance
When used with external
3.3 V power supply regulator
4.6 - 4.7 V
3.1 3.3 3.5 V
FM typical application - 160 200 mA
Supply current @5V typ
AM external pre-stage - 160 200 mA
AM integrated pre-stage - 175 215 mA
FM, max application,
Max supply current
(FM typ + Xtal, IF-buffer,
- 170 215 mA
AMAGC)
Supply current @5V in power down mode
--711mA
FM typical application - 650 950 mW
Power dissipation
AM external pre-stage - 650 950 mW
AM integrated pre-stage 710 1015 mW
Ambient temperature range
Extended ambient temperature range
Full performance, unless otherwise specified
Signal path functional with reduced performance
-40 - 105 °C
105 - 125 °C
Doc ID 13141 Rev 6 13/65
Electrical characteristics TDA7528

3.3 Power management and voltage regulator

The TDA7528 has a single 5 V supply. The 3.3 V supply for the VCO must be derived from an external NPN transistor controlled by the internal voltage regulator. It is also possible to use an external 3.3 V regulator. In this case, special care has to be taken on this 3.3V .

3.3.1 Power management

The TDA7528 detects whether all the voltages are high enough and stable when the operating power supply is applied. The power-on reset is tripped and all the control registers are set to "low" if this condition is not met.
As long as the voltages remain within the permissible range, the SPI/I (in the I
2
C mode this can be detected by the μP through the acknowledge signal on every
communication with the bus master).
The SPI-/I
2
C interface is in power-on mode when the operating voltage is applied to the
TDA7528.
The following function groups can be switched on/off via SPI/I
PLL {divider R, N and V, PFD, charge pump, VCO1 (3,7 GHz-VCO) or VCO2 (4,7 GHz-
2
C:
VCO), Reference-Oscillator or LVDS input buffer}
FM/AM-mixer and active balun, FM-AGC
D/A-converter_1
D/A-converter_2
AM-LNA
AM-low pass filter
AM-AGC
IF-section {IF-amplifier, anti-aliasing-filter, IF-AGC}
GPIO
temperature-sensor,
Sensor ADC
2
C interface is active

3.3.2 Power-on circuit and low supply voltage detector

Power-on circuit:
The power-on circuit produces a reset whenever one of the following voltages is below it's POR level. (BIASD1, BIASD2 < 1.2 V; VDDPLL < 2.4V; VCCIF < 3.8 V)
Low supply voltage detector:
The "PWR_STABLE_read" status bit has the value "0" after power on. This bit is set to "1" by an SPI/I2C write command from the microcontroller in initialization communication to the "PWR_STABLE_write" bit. The microcontroller cannot reset the "PWR_STABLE_read" bit. A "0" transmitted in the "PWR_STABLE_write" bit has no effect.
If the power supply falls below the programmed threshold all registers are set to their power­on default, including that the "PWR_STABLE_read" bit is set to "0". By this the microcontroller can verify at any time whether a critical drop in voltage (value "0") has taken place since the last TDA7528 read out of this bit. The threshold voltage can be calibrated
14/65 Doc ID 13141 Rev 6
TDA7528 Electrical characteristics
indirect by measuring the DAC1 (9 bit) output voltage for DAC1=0x200 or the DAC2 (8 bit) output voltage for DAC2=0x100).
The PWR_STABLE functionality can be switched on/off. The default value is the switched off mode.
Table 5. Voltage sag detection electrical characteristics
Symbol Parameter Test conditions Min. Typ Max Unit
V
STHmin
V
STHmax
Min. supply voltage threshold -40 to 150 °C, Tj ≤150 °C 4.1 4.3 4.5 V
Max supply voltage threshold - 4.4 4.6 4.9 V
- Step size - - 100 - mV
Time constant - - 1 - μs
t
c

3.3.3 Voltage regulator

The internal voltage regulator drives the external transistor for the 3.3V supply of the VCO and PLL. The 3.3 V voltage regulator for the bus interface and the reference oscillator is fully integrated.
Table 6. Voltage regulator electrical characteristics
Symbol Parameter Test conditions Min. Typ Max Unit
V
DD
I
DD
3.3V supply voltage
Internal voltage regulator with external power transistor
3.1 3.3 3.5 V
Current through external
current of external V
DD
transistor or from external
-6080mA
3.3 V supply
When an external 3.3 V supply is used for the VCO and PLL supply, special care has to be taken on the supply voltages during the ramp-up phase:
the 3.3 V supply must never be higher than the 5 V supply;
the difference between 5 V and 3.3 V must never exceed 3.6 V.
The second prerequisite is automatically met using a 3.3 V Z-diode between the 5 V and the
3.3 V supplies.
Doc ID 13141 Rev 6 15/65
Electrical characteristics TDA7528

3.4 FM - Section

3.4.1 IMR and active balun

The IMR mixer has two software-selectable FM inputs (referred to as mode 1 and mode 2). These inputs are implemented with different gains, noise figures, IIP3, maximum input signal.
There are two single ended outputs of the IMR mixer. One is dedicated to FM (Balunout1) and the other to AM (Balunout2). It is not recommended to use both outputs in parallel.
Table 7. IMR and active balun electrical characteristics
Symbol Parameter Test condition Min. Typ Max Units
(All parameter are referred to Balunout1, unless otherwise specified)
G G
G G
mix1
mix2
mix1
mix2
Gain vs. Balunout1 Gain vs. Balunout1
Gain vs. Balunout2 Gain vs. Balunout2
Mode 1 (unloaded gain) Mode 2 (unloaded gain)
Mode 1 (unloaded gain) Mode 2 (unloaded gain)
20 13
16
9
22 15
18 11
24 17
20 13
- Absolute gain error @ 100 MHz @ 25°C - - ± 1.0 dB
Freq. range @ 25°C
- Gain error vs. frequency
47,0 to 74,0 MHz 76,0 to 90,0 MHz 87,5 to 108,0 MHz 30,0 to 170,0 MHz
--
± 0,5 ± 0,5 ± 0,5 ± 2,0
- Gain error vs. temperature -40 °C to 105 °C - - ± 2,0 dB
- Gain attenuation range Controlled by IF-AGC 17.5 20 - dB
- Input impedance
- Input resistance
Mode 1 Mode 2
Mode 1 Mode 2
5 5
30
9.5
--kΩ
50
12.5 19.5
- Output impedance Active balun 15 20 30 Ω
- External load
V
out_max
V
in_max
Max. output voltage
Max. input voltage
Full current: reg14[5] = 0 Red. current: reg14[5] = 1
1dB below 1dB compression point
Mode 1 Mode 2
1dB below 1dB compression
320 600
--
121 123 - dBμV
100 108
--dBμV
point
V
noise
d
noise
Input noise voltage – mode1
(1)
Input noise voltage – mode2
vnoise*atten*dnoise
Rsource=1.5 kΩ, noiseless in 65 MHz-170 MHz range Rsource = 800 Ω, noiseless in 65 MHz-170 MHz range
AGC noise behavior @ 6 dB attenuation
-
-6-dB
3.1
5
3.7
6
dB
dB
dB
kΩ
Ω Ω
nV/ Hz
16/65 Doc ID 13141 Rev 6
TDA7528 Electrical characteristics
Table 7. IMR and active balun electrical characteristics (continued)
(All parameter are referred to Balunout1, unless otherwise specified)
Symbol Parameter Test condition Min. Typ Max Units
Mode 1
123
125
up to Vin/tone = 90 dBµV
3rd order intercept point Reg9[5:4]=00
Mode 2 up to Vin/tone = 98 dBµV up to 95 °C junction
126
130
133
temperature
IIP3
IIP2
IFattn
(1)
rd
order intercept point in
3 reduced current mode
(1)
2nd order intercept point
IF- output attenuation (without external circuitry)
Mode 1; reg14[3:2]=01 - 120 -
Mode 2; reg14[3:2]=01 60 °C up to 125 °C junction
temperature
130
132
Mode 1; reg14[3:2]=10 - 117 -
Mode 2; reg14[3:2]=10 junction temperature > 90 °C 129
Mode 1 Mode 2
@ 26.35 MHz @ 100 MHz
144 157
1 9
130 -
--dBμV
2
- IF rejection - 38 - - dB
R
=1.5 kΩ
source
V
LO_IN
LO signal @ mixer input
@ fundamental LO freq.
--1040dBμV
@ LO harmonics
Incl. LC-tank with Q=2,
R
= 1.0 kΩ
V
LO_OUT
LO signal @ balun output
load
@ fundamental LO freq.
--
@ LO harmonics
I/Q gain adjust
I
QG
Min. Max.
4bit - -0.7
0.7
- gain step - - 0.1 - dB
I/Q phase adjust
P
IQ
Min. Max.
4bit - -1.2
1.2
- Phase step - - 0.2 - °
Center frequency adjust
-
Min. Max.
3bit - -2.4
2.4
- Frequency step - - 0.6 - MHz
without gain/phase adjust 30 45 -
IRR Image rejection ratio
1. Parameter not guaranteed by production test
with freq/gain adjust @ 25°C 45 - -
with freq/gain/phase adjust vs. complete temp. range
40 - -
-dBμV
-
dBμV
-dB
66
dBμV
60
-dB
-MHz
dB
Doc ID 13141 Rev 6 17/65
Electrical characteristics TDA7528

3.4.2 FM AGC

The time constant of the FM AGC is defined by an external capacitor and the programmable internal currents (details given in the Ta bl e 8 ). The currents can be selected independently for AGC attack and decay. By this a symmetrical behavior rather than a 2...250 times faster attack behavior can be programmed.
Control behavior:
The FM-RF-AGC is realized with two output pins which control the gain of the corresponding pre-stage.
The control behavior can be programmed to the following modes:
1. Controlled current output mode 1 data byte FMAGC[3:0] = 1000 positive current I = f(e): after reaching the AGC threshold voltage the current output delivers a current I = f(e) up to -15 mA in a voltage range from 0.2V up to V
Figure 3. FM AGC - Controlled current output mode 1
Iout
Iout
15mA
15mA
f(e) current
f(e) currentf(e) current
CC
-1.5 V.
V_TCAGCFM
V_TCAGCFM
2. Controlled current output mode 2 data byte FMAGC[3:0] = 1100 Below the AGC threshold voltage the AGC output sinks a constant current of 5 mA. When the RF input level crosses the AGC threshold voltage the current is reduced down to 0mA with a quasi-log. behavior. At half control voltage the current becomes positive and reaches up to -15 mA following an exponential function.
Figure 4. FM AGC - Controlled current output mode 2
Iout
Iout
Iout
f(e) - current
f(e) - current
f(e) - current
15m
15m
15m A
A
A
1.65V
1.65V
1.65V
3. Constant current mode data byte FMAGC[3:0] = 0100 The output current can be set to 2 mA source current. The AGC detector is in power­down mode and only the pin diode driver is active.
4. Controlled Voltage / current output data byte FMAGC[3:0] = 1011 voltage and current mode with hand-over: the Vthr level is programmable in the range of 0.2 V to 2.6 V.
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TDA7528 Electrical characteristics
Figure 5. FM AGC - Controlled Voltage / current output
Iout Vout
Iout Vout
Iout Vout
Vthr
Vthr
Vthr
Vthr
Vthr
5. Calibration mode data byte FMAGC[3:0] = 0010 calibration mode for voltage output: The voltage Vthr can be switched directly to the voltage output pin.
All other possible bit combinations of data byte FMAGC[3:0] are not recommended.
The voltage output can be configured as GPO.
The FMAGC2 output (voltage output) is short-circuit protected by a current limiter. The FMAGC1 output (current output) needs an external resistor for current limitation. The current output is voltage-tolerant up to V
, the voltage output up to VDD.
CC
The microcontroller can read the voltage at the AGC capacitor via the serial control interface. On request of the microcontroller the measurement is done by applying the time constant capacitor voltage to the central ADC (specified in chapter 3.10) and gives information to calculate the AGC-attenuation.
The FM AGC system is controlled by a peak detector.
The Key AGC function is controlled by a D/A converter in the backend.
Table 8. FM-AGC electrical characteristics
Symbol Parameter Test condition Min. Typ Max Units
Lthr
- Threshold steps 4 bit control 0.5 1 1.5 dB
- Threshold error 30 to170 MHz @ 25 °C -1.5 - 1,5 dB
- Total threshold error 30.0 to 170.0 MHz -3 - 3 dB
-
- Frequency range - 30 - 170 MHz
-
-
Threshold RF level Min. Threshold
Max Threshold
Temperature behavior of AGC thresholds
Pin diode source current (I ≈−1.5 mA * (exp(V
V
AGCTC
)-1))
DD
-
Pin diode sink current (I 1 mA * (exp(V
AGCTC
-
1.65V)-1))
Referred to mixer input - - - -
Mode 1 - high gain mixer - 86 -
Mode 2 – low gain mixer - 92 -
Mode 1 - high gain mixer - 100 -
Mode 2 – low gain mixer - 106 -
- - 0.011 - dB/°C
AGCTC
< 1V
---10mA
V (due to exponential behavior, external resistor needed)
V (due to exponential behavior,
AGCTC
= V
DD
3--mA
external resistor needed)
dBμV
Doc ID 13141 Rev 6 19/65
Electrical characteristics TDA7528
Table 8. FM-AGC electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ Max Units
-
-Min. voltage
- Max. voltage AGC control pin 1 V
- Max. source current
- Min. sink current
-
-
Vthr
Vthr
- Step size of Vthr 6bit - 40 - mV
DNL nonlinearity of Vthr - -0.5 0.5 LSB
- I attack for 6dB control error
- I decay max
-
-
- Threshold shift keyed AGC
- Keyed AGC range - 10 - - dB
1. The time constant is defined as the 1τ value after a 6 dB level step
Pin diode source current in constant current mode
- - -2 -1 mA
AGC control pin 1 @ positive current mode
--0.2
@ pos/neg current mode
-1.5 VCC-1.3 - V
CC
AGC control pin 2; voltage output
AGC control pin 2; voltage output
Max. output voltage in analog voltage mode (follower mode)
Min. output voltage in analog voltage mode
Vthr_min - 0.1 0.2 0.3 V
min
Vthr_max - 2.4 2.6 2.8 V
max
AGC control pin 2
= 1 mA
@ I
load
AGC control pin 2
= -50 µA
@ I
load
Mode A1 Mode A2 Mode A3
Mode D1 Mode D2 Mode D3
Typical AGC time constant for
(1)
attack
Typical AGC time constant for
(1)
decay
C AGC conductance versus V
C AGC conductance versus V
= 1 µF, mode A2
AGCTC
= 20 dB/V
AGCTC
= 1 µF, mode D2
AGCTC
= 20 dB/V
AGCTC
Control input range = 0.2 to 1V
1--mA
- -100 - μA
VDD-0.3 - V
--1V
30
150
0.75
-6
-30
-150
50
250
1.25
-4
-20
-100
-0.5-ms
-15-ms
-19-dB/V
0.4
DD
80
400
2.0
-2.5
-12
-60
V
V
µA
µA
20/65 Doc ID 13141 Rev 6
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