TDA7498E
160-watt + 160-watt dual BTL class-D audio amplifier
Features
■160-W + 160-W output power at
THD = 10% with RL = 4 Ω and VCC = 36 V
■1 x 220 W output power mono parallel BTL at THD = 10% with RL = 3 Ω and VCC = 36 V
■Wide-range single-supply operation (14 - 36 V)
■High efficiency (η = 85%)
■Parallel BTL function using the MODE pin
■Four selectable, fixed gain settings of nominally 23.8 dB, 29.8 dB, 33.3 dB and 35.8 dB
■Differential inputs minimize common-mode noise
■Standby and mute features
■Smart protection
■Thermal overload protection
■Small offset less than 20 mV
Preliminary data
PowerSSO36 with exposed pad up
Description
The TDA7498E is a dual BTL class-D audio amplifier with a single power supply designed for home systems and active speaker applications.
It comes in a 36-pin PowerSSO package with exposed pad up (EPU) to facilitate mounting a separate heatsink.
Table 1. |
Device summary |
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Order code |
Operating temp. range |
Package |
Packaging |
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TDA7498E |
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0 to 70 °C |
PowerSSO36 (EPU) |
Tube |
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TDA7498ETR |
0 to 70 °C |
PowerSSO36 (EPU) |
Tape and reel |
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December 2011 |
Doc ID 022595 Rev 1 |
1/20 |
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to |
www.st.com |
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change without notice. |
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Contents |
TDA7498E |
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Contents
1 |
Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 4 |
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2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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2.1 |
Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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2.2 |
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
3 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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3.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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3.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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3.3 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3.4 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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3.5 |
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
4 |
Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11 |
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4.1 |
For RL = 4 Ω, stereo configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.2 |
For RL = 3 Ω, mono BTL configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . |
14 |
5 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
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5.1 |
Stereo and mono BTL operation selection using the MODE pin . . . . . . . |
16 |
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5.2 |
Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
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5.3 |
Smart protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
6 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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7 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
19 |
2/20 |
Doc ID 022595 Rev 1 |
TDA7498E |
List of figures |
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List of figures
Figure 1. Internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Pin connections (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Test circuit stereo application and mono BTL mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 4. Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. THD vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. FFT performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. THD vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. PowerSSO36 EPU outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Doc ID 022595 Rev 1 |
3/20 |
Device block diagram |
TDA7498E |
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Figure 1 shows the block diagram of one of the two identical channels of the TDA7498E.
4/20 |
Doc ID 022595 Rev 1 |
TDA7498E |
Pin description |
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36 VSS
35 SVCC
34 VREF
33 INNB
32 INPB
31 MODE
30 GAIN
29 SVR
28 DIAG
27 SGND
26 VDDS
25 SYNCLK
24 ROSC
23 INNA
22 INPA
21 MUTE
20 STBY
19 VDDPW
EP, exposed pad
Connect to ground
SUB_GND 1
OUTPB 2
OUTPB 3
PGNDB 4
PGNDB 5
PVCCB 6
PVCCB 7
OUTNB 8
OUTNB 9
OUTNA 10
OUTNA 11 PVCCA 12 PVCCA 13
PGNDA 14 PGNDA 15
OUTPA 16 OUTPA 17 PGND 18
Doc ID 022595 Rev 1 |
5/20 |
Pin description |
TDA7498E |
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Table 2. |
Pin description list |
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Number |
Name |
Type |
Description |
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1 |
SUB_GND |
PWR |
Connect to the frame |
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2,3 |
OUTPB |
O |
Positive PWM for right channel |
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4,5 |
PGNDB |
PWR |
Power stage ground for right channel |
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6,7 |
PVCCB |
PWR |
Power supply for right channel |
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8,9 |
OUTNB |
O |
Negative PWM output for right channel |
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10,11 |
OUTNA |
O |
Negative PWM output for left channel |
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12,13 |
PVCCA |
PWR |
Power supply for left channel |
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14,15 |
PGNDA |
PWR |
Power stage ground for left channel |
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16,17 |
OUTPA |
O |
Positive PWM output for left channel |
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18 |
PGND |
PWR |
Power stage ground |
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19 |
VDDPW |
O |
3.3-V (nominal) regulator output referred to ground for power |
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20 |
STBY |
I |
Standby mode control |
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21 |
MUTE |
I |
Mute mode control |
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22 |
INPA |
I |
Positive differential input of left channel |
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23 |
INNA |
I |
Negative differential input of left channel |
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24 |
ROSC |
O |
Master oscillator frequency-setting pin |
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25 |
SYNCLK |
I/O |
Clock in/out for external oscillator |
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26 |
VDDS |
O |
3.3-V (nominal) regulator output referred to ground for signal |
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27 |
SGND |
PWR |
Signal ground |
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28 |
DIAG |
O |
Open-drain diagnostic output |
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29 |
SVR |
O |
Supply voltage rejection |
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30 |
GAIN |
I |
Gain setting input |
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31 |
MODE |
I |
Enables stereo or mono BTL mode of operation |
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32 |
INPB |
I |
Positive differential input of right channel |
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33 |
INNB |
I |
Negative differential input of right channel |
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34 |
VREF |
O |
Half VDDS (nominal) referred to ground |
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35 |
SVCC |
PWR |
Signal power supply |
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36 |
VSS |
O |
3.3-V (nominal) regulator output referred to power supply |
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EP |
- |
Exposed pad for heatsink, to be connected to ground |
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6/20 |
Doc ID 022595 Rev 1 |