ST TDA7498 User Manual

100-watt + 100-watt dual BTL class-D audio amplifier
Features
100-W + 100-W output power at
THD = 10% with R
80-W + 80-W output power at
THD = 10% with R
Wide-range single-supply operation (14 - 39 V)
High efficiency (η = 90%)
Four selectable, fixed gain settings of
nominally 25.6 dB, 31.6 dB, 35.1 dB and
37.6 dB
Differential inputs minimize common-mode
noise
Standby and mute features
Short-circuit protection
Thermal overload protection
Externally synchronizable
L
L
CC
CC
= 36 V
= 34 V
TDA7498
PowerSSO36
with exposed pad up
Description
The TDA7498 is a dual BTL class-D audio amplifier with single power supply designed for home systems and active speaker applications.
It comes in a 36-pin PowerSSO package with exposed pad up (EPU) to facilitate mounting a separate heatsink.

Table 1. Device summary

Order code Operating temp. range Package Packaging
TDA7498 -40 to 85 °C PowerSSO36 (EPU) Tube
TDA7498TR -40 to 85 °C PowerSSO36 (EPU) Tape and reel
September 2011 Doc ID 16107 Rev 8 1/28
www.st.com
28
Contents TDA7498
Contents
1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Characterizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.1 For RL = 6 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.2.2 For R
= 8 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
L
4 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.4 Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.5 Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5.1 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5.2 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.6 Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.7 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.8 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 Doc ID 16107 Rev 8
TDA7498 List of figures
List of figures
Figure 1. Internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Pin connections (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Test circuit for characterizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4. Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Output power (THD = 10%) vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. THD vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. THD vs. frequency (1 W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. THD vs. frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. FFT performance (0 dBFS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. FFT performance (-60 dBFS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Output power (THD = 10%) vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. THD vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. THD vs. frequency (1 W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. THD vs. frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. FFT performance (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 18. FFT performance (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Applications circuit for 6- or 8-Ω speakers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. Turn on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. Typical LC filter for a 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 25. Typical LC filter for a 6-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 27. PowerSSO36 EPU outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 16107 Rev 8 3/28
List of tables TDA7498
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 8. Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 9. How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 10. PowerSSO36 EPU dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4/28 Doc ID 16107 Rev 8
TDA7498 Device block diagram
Device block diagram
Figure 1 shows the block diagram of one of the two identical channels of the TDA7498.

Figure 1. Internal block diagram (showing one channel only)

Doc ID 16107 Rev 8 5/28
Pin description TDA7498

1 Pin description

1.1 Pinout

Figure 2. Pin connections (top view, PCB view)

36
35
34
33
32
31
30
29
28
27
26
25
24
VSS
SVCC
VREF
INNB
INPB
GAIN1
GAIN0
SVR
DIAG
SGND
VDDS
SYNCLK
ROSC
SUB_GND
OUTPB
OUTPB
PGNDB
PGNDB
PVCCB
PVCCB
OUTNB
OUTNB
OUTNA
OUTNA
PVCCA
PVCCA
1
2
3
4
5
6
7
8
9
10
11
12
13
23
INNA
22
INPA
21
MUTE
20
STBY
19
VDDPW
6/28 Doc ID 16107 Rev 8
EP, exposed pad Connect to ground
PGNDA
PGNDA
OUTPA
OUTPA
PGND
14
15
16
17
18
TDA7498 Pin description

1.2 Pin list

Table 2. Pin description list

Number Name Type Description
1 SUB_GND PWR Connect to the frame
2,3 OUTPB O Positive PWM for right channel
4,5 PGNDB PWR Power stage ground for right channel
6,7 PVCCB PWR Power supply for right channel
8,9 OUTNB O Negative PWM output for right channel
10,11 OUTNA O Negative PWM output for left channel
12,13 PVCCA PWR Power supply for left channel
14,15 PGNDA PWR Power stage ground for left channel
16,17 OUTPA O Positive PWM output for left channel
18 PGND PWR Power stage ground
19 VDDPW O
3.3-V (nominal) regulator output referred to ground for power stage
20 STBY I Standby mode control
21 MUTE I Mute mode control
22 INPA I Positive differential input of left channel
23 INNA I Negative differential input of left channel
24 ROSC O Master oscillator frequency-setting pin
25 SYNCLK I/O Clock in/out for external oscillator
26 VDDS O
3.3-V (nominal) regulator output referred to ground for signal blocks
27 SGND PWR Signal ground
28 DIAG O Open-drain diagnostic output
29 SVR O Supply voltage rejection
30 GAIN0 I Gain setting input 1
31 GAIN1 I Gain setting input 2
32 INPB I Positive differential input of right channel
33 INNB I Negative differential input of right channel
34 VREF O Half VDDS (nominal) referred to ground
35 SVCC PWR Signal power supply
36 VSS O 3.3-V (nominal) regulator output referred to power supply
- EP - Exposed pad for heatsink, to be connected to ground
Doc ID 16107 Rev 8 7/28
Electrical specifications TDA7498

2 Electrical specifications

2.1 Absolute maximum ratings

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
VI
T
T
CC
j
stg
DC supply voltage for pins PVCCA, PVCCB, SVCC 44 V
Voltage limits for input pins STBY, MUTE, INNA, INPA, INNB, INPB, GAIN0, GAIN1
Operating junction temperature -40 to 150 °C
Storage temperature -40 to 150 °C

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Min Typ Max Unit
R
th j-case
Thermal resistance, junction to case - 2 3 °C/W

2.3 Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Min Typ Max Unit
V
CC
Tamb Ambient operating temperature -40 - 85 °C
Supply voltage for pins PVCCA, PVCCB, SVCC 14 - 39 V
-0.3 to 3.6 V

2.4 Electrical specifications

Unless otherwise stated, the values in the table below are specified for the conditions: V
=36V, RL = 6 Ω, R
CC
Ta mb = 2 5 ° C.

Table 6. Electrical specifications

Symbol Parameter Condition Min Typ Max Unit
I
q
I
qSTBY
V
OS
I
OCP
8/28 Doc ID 16107 Rev 8
Total quiescent current No LC filter, no load - 40 60 mA
Quiescent current in standby - - 1 10 µA
Output offset voltage
Overcurrent protection threshold RL = 0 Ω 67- A
= R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 25.6 dB
OSC
Play mode -100 - 100
Mute mode -60 - 60
mV
TDA7498 Electrical specifications
Table 6. Electrical specifications (continued)
Symbol Parameter Condition Min Typ Max Unit
T
R
V
V
R
P
P
P
j
i
OVP
UVP
dsON
o
o
D
Junction temperature at thermal shutdown
Input resistance Differential input 48 60 - kΩ
Overvoltage protection threshold - 42 43 - V
Undervoltage protection threshold
Power transistor on resistance
Output power
Output power RL = 8 Ω, THD = 10% - 80 - W
Dissipated power
η Efficiency P
THD Total harmonic distortion P
G
ΔG
C
V
V
T
Closed-loop gain
Gain matching - -1 - 1 dB
Crosstalk f = 1 kHz, Po = 1 W 5070- dB
eN Total input noise
SVRR Supply voltage rejection ratio
, T
T
r
f
SW
f
SWR
V
inH
V
inL
Rise and fall times - - 50 - ns
f
Switching frequency Internal oscillator 290 310 330 kHz
Output switching frequency range
Digital input high (H)
Digital input low (L) - - 0.8
- - 150 - °C
- --8V
High side - 0.2 -
Ω
Low side - 0.2 -
THD = 10% - 100 -
W
THD = 1% - 78 -
= 100 W + 100 W,
P
o
THD = 10%
= 100 W + 100 W - 90 - %
o
= 1 W - 0.1 - %
o
-20-W
GAIN0 = L, GAIN1 = L 24.6 25.6 26.6
GAIN0 = L, GAIN1 = H 30.6 31.6 32.6
dB
GAIN0 = H, GAIN1 = L 34.1 35.1 36.1
GAIN0 = H, GAIN1 = H 36.6 37.6 38.6
A Curve, G
= 20 dB - 15 -
V
µV
f = 22 Hz to 22 kHz - 25 50
fr = 100 Hz, Vr = 0.5 Vpp,
= 10 µF
C
SVR
With internal oscillator
With external oscillator
-70-dB
(1)
250 - 400
(2)
250 - 400
kHz
2.3 - -
-
V
Doc ID 16107 Rev 8 9/28
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