ST TDA7492 User Manual

TDA7492

50 W + 50 W dual BTL class-D audio amplifier

Features

■50 W + 50 W continuous output power at THD = 10% with RL = 6 Ω and VCC = 25 V

■40 W + 40 W continuous output power at THD = 10% with RL = 8 Ω and VCC = 25 V

■Wide-range single-supply operation (8 - 26 V)

■High efficiency (η = 90%)

■Four selectable, fixed gain settings of nominally 21.6 dB, 27.6 dB, 31.1 dB and 33.6 dB

■Differential inputs minimize common-mode noise

■Standby and mute features

■Short-circuit protection

■Thermal overload protection

■Externally synchronizable

■ECOPACK®, environmentally-friendly package

Table 1. Device summary

PowerSSO-36

with exposed pad up

Description

The TDA7492 is a dual BTL class-D audio amplifier with single power supply designed for LCD TVs and monitors.

Thanks to the high efficiency and exposed-pad-up (EPU) package only a simple heatsink is required.

Order code	Operating temp. range	Package	Packaging
TDA7492	0 to 70 °C	PowerSSO-36 EPU	Tube
TDA749213TR	0 to 70 °C	PowerSSO-36 EPU	Tape and reel

September 2011

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www.st.com

Contents	TDA7492

Contents

1	Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		7
	2.1	Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.2	Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
3	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	3.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.3	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
4	Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		11
	4.1	Characterizations for 6-Ω loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
	4.2	Characterizations for 8-Ω loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.3	Characterizations for 4-Ω loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
	4.4	Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
5	Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		22
6	Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
	6.1	Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	6.2	Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	6.3	Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	6.4	Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25

6.4.1 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4.2 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.5 Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.6 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.7 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.8 Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

7

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

29

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TDA7492		Contents
8	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 31

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List of tables	TDA7492

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description list. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 7. Gain settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 8. How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 9. PowerSSO-36 EPU dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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TDA7492	List of figures

List of figures

Figure 1.	Internal block diagram (showing one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 6
Figure 2.	Pin connections (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 7
Figure 3.	Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
Figure 4.	THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 5.	THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 6.	THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 7.	Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 8.	Crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 9.	FFT performance (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 10.	FFT performance (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 11.	Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 12.	THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 13.	THD vs. output (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 14.	THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 15.	Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 16.	Crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 17.	FFT performance (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 18.	FFT performance (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 19.	Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 20.	THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 21.	THD vs. output (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 22.	THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 23.	Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 24.	Crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 25.	FFT performance (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 26.	FFT performance (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 27.	Test board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 28.	Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
Figure 29.	Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 30.	Turn on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 31.	Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
Figure 32.	Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
Figure 33. Typical LC filter for a 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
Figure 34. Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
Figure 35.	Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
Figure 36.	PowerSSO-36 EPU outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29

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Device block diagram	TDA7492

1 Device block diagram

Figure 1 shows the block diagram of one of the two identical channels of the TDA7492.

Figure 1. Internal block diagram (showing one channel only)

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TDA7492	Pin description

2 Pin description

2.1Pinout

Figure 2. Pin connections (top view, PCB view)

36 VSS

35 SVCC

34 VREF

33 INNB

32 INPB

31 GAIN1

30 GAIN0

29 SVR

28 DIAG

27 SGND

26 VDDS

25 SYNCLK

24 ROSC

23 INNA

22 INPA

21 MUTE

20 STBY

EP

exposed pad up Connect to ground

SUB GND 1

OUTPB 2

OUTPB 3

PGNDB 4

PGNDB 5

PVCCB 6

PVCCB 7

OUTNB 8

OUTNB 9

OUTNA 10

OUTNA 11 PVCCA 12 PVCCA 13 PGNDA 14 PGNDA 15

OUTPA 16

OUTPA 17

19

VDDPW

PGND 18

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Pin description	TDA7492

2.2Pin list

	Table 2.	Pin description list
	Number	Name	Type	Description
	1	SUB_GND	PWR	Connect to the frame
	2,3	OUTPB	O	Positive PWM for right channel
	4,5	PGNDB	PWR	Power stage ground for right channel
	6,7	PVCCB	PWR	Power supply for right channel
	8,9	OUTNB	O	Negative PWM output for right channel
	10,11	OUTNA	O	Negative PWM output for left channel
	12,13	PVCCA	PWR	Power supply for left channel
	14,15	PGNDA	PWR	Power stage ground for left channel
	16,17	OUTPA	O	Positive PWM output for left channel
	18	PGND	PWR	Power stage ground
	19	VDDPW	O	3.3-V (nominal) regulator output referred to ground for power
				stage
	20	STBY	I	Standby mode control
	21	MUTE	I	Mute mode control
	22	INPA	I	Positive differential input of left channel
	23	INNA	I	Negative differential input of left channel
	24	ROSC	O	Master oscillator frequency-setting pin
	25	SYNCLK	I/O	Clock in/out for external oscillator
	26	VDDS	O	3.3-V (nominal) regulator output referred to ground for signal
				blocks
	27	SGND	PWR	Signal ground
	28	DIAG	O	Open-drain diagnostic output
	29	SVR	O	Supply voltage rejection
	30	GAIN0	I	Gain setting input 1
	31	GAIN1	I	Gain setting input 2
	32	INPB	I	Positive differential input of right channel
	33	INNB	I	Negative differential input of right channel
	34	VREF	O	Half VDDS (nominal) referred to ground
	35	SVCC	PWR	Signal power supply
	36	VSS	O	3.3-V (nominal) regulator output referred to power supply
	-	EP	-	Exposed pad for heatsink, to be connected to GND

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TDA7492	Electrical specifications

3 Electrical specifications

3.1Absolute maximum ratings

	Table 3.	Absolute maximum ratings
	Symbol	Parameter	Value	Unit
	VCC	DC supply voltage for pins PVCCA, PVCCB, SVCC	30	V
	VI	Voltage limits for input pins STBY, MUTE, INNA, INPA,	-0.3 - 3.6	V
		INNB, INPB, GAIN0, GAIN1
	Top	Operating temperature	0 to 70	°C
	Tj	Junction temperature	-40 to 150	°C
	Tstg	Storage temperature	-40 to 150	°C

3.2Thermal data

Table 4.	Thermal data
Symbol	Parameter	Min	Typ	Max	Unit
Rth j-case	Thermal resistance, junction to case	-	2	3	°C/W

3.3Electrical specifications

Unless otherwise stated, the results in Table 5 below are given for the conditions:

VCC = 25 V, RL (load) = 8 Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 21.6 dB and Tamb = 25 °C.

	Table 5.	Electrical specifications
	Symbol	Parameter	Condition	Min	Typ	Max	Unit
	VCC	Supply voltage for	-	8	-	26	V
		pins PVCCA, PVCCB, SVCC
	Iq	Total quiescent current	Without LC	-	26	35	mA
	IqSTBY	Quiescent current in standby	-	-	2.5	5.0	µA
	VOS	Output offset voltage	Play mode	-	-	±100	mV
			Mute mode	-	-	±60
	IOCP	Overcurrent protection threshold	RL = 0 Ω	4.8	6.0	-	A
	Tj	Junction temperature at thermal	-	-	150	-	°C
		shutdown
	Ri	Input resistance	Differential input	48	60	-	kΩ
	VOVP	Overvoltage protection threshold	-	28	29	-	V

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Electrical specifications								TDA7492
	Table 5.	Electrical specifications	(continued)
	Symbol	Parameter		Condition		Min	Typ	Max	Unit
	VUVP	Undervoltage protection		-		-	-	7	V
		threshold
	RdsON	Power transistor on resistance		High side		-	0.2	-	Ω
				Low side		-	0.2	-
	Po	Output power		THD = 10%		-	40	-	W
				THD = 1%		-	32	-
				RL = 6 Ω, THD = 10%,		-	50	-
	Po	Output power		VCC = 25V					W
				RL = 6 Ω, THD = 1%		-	40	-
				VCC = 25V
	PD	Dissipated power		Po =40W +40 W,		-	8.0	-	W
				THD = 10%
	η	Efficiency		Po = 40 W + 40W		80	90	-	%
	THD	Total harmonic distortion		Po = 1 W		-	0.1	0.4	%
				GAIN0 = L, GAIN1 = L		20.6	21.6	22.6
	GV	Closed-loop gain		GAIN0 = L, GAIN1 = H		26.6	27.6	28.6	dB
				GAIN0 = H, GAIN1 = L		30.1	31.1	32.1
				GAIN0 = H, GAIN1 = H		32.6	33.6	34.6
	GV	Gain matching		-		-	-	±1	dB
	CT	Cross talk		f = 1 kHz		-	50	-	dB
	eN	Total input noise		A Curve, GV = 20 dB		-	20	-	µV
				f = 22 Hz to 22 kHz		-	25	35
	SVRR	Supply voltage rejection ratio		fr = 100 Hz, Vr = 0.5 V,		40	50	-	dB
				CSVR = 10 µF
	Tr, Tf	Rise and fall times		-		-	50	-	ns
	fSW	Switching frequency		Internal oscillator		290	310	330	kHz
	fSWR	Output switching frequency		With internal oscillator (1)		250	-	400	kHz
		Range		With external oscillator	(2)	250	-	400
	VinH	Digital input high (H)		-		2.3	-	-	V
	VinL	Digital input low (L)				-	-	0.8
	AMUTE	Mute attenuation		VMUTE = 1 V		60	80	-	dB

1.fSW = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 kΩ (see Figure 28.).

2.fSW = fSYNCLK / 2 with the frequency of the external oscillator.

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