ST TDA7491LP User Manual

TDA7491LP

2 x 5-watt dual BTL class-D audio amplifier

Features

■5 W + 5 W continuous output power: RL = 8 Ω, THD = 10% at VCC = 9 V

■5 W + 5 W continuous output power: RL = 4 Ω, THD = 10% at VCC = 6.6 V

■Wide range single supply operation (5 V - 14 V)

■High efficiency (η = 90%)

■Four selectable, fixed gain settings of nominally 20 dB, 26 dB, 30 dB and 32 dB

■Differential inputs minimize common-mode noise

■Filterless operation

■No ‘pop’ at turn-on/off

■Standby and mute features

■Short-circuit protection

■Thermal overload protection

■Externally synchronizable

PowerSSO-36 with

exposed pad down

Description

The TDA7491LP is a dual BTL class-D audio amplifier with single power supply designed for LCD TVs and monitors.

Thanks to the high efficiency and exposed-pad-down (EPD) package no separate heatsink is required.

Furthermore, the filterless operation allows a reduction in the external component count.

The TDA7491LP is pin-to-pin compatible with the TDA7491P and TDA7491HV.

Table 1.	Device summary
Order code		Operating temperature	Package	Packaging
TDA7491LP		-40 to 85 °C	PowerSSO-36 EPD	Tube
TDA7491LP13TR		-40 to 85 °C	PowerSSO-36 EPD	Tape and reel

March 2011

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Contents	TDA7491LP

Contents

1	Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		7
	2.1	Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
	2.2	Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
3	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	3.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.3	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
4	Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		12
	4.1	With 4-Ω load at VCC = 6.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
	4.2	With 8-Ω load at VCC = 9 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
5	Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	5.1	Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	5.2	Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
	5.3	Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
	5.4	Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
	5.5	Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27

5.5.1 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5.2 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.6 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.6.1 Reconstruction low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.6.2 Filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.7 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.8 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.9 Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.10 Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

34

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7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 36

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List of tables	TDA7491LP

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description list. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 6. Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 7. Gain settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 8. How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 9. PowerSSO-36 EPD dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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TDA7491LP	List of figures

List of figures

Figure 1.	Internal block diagram (one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 6
Figure 2.	Pin connection (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 7
Figure 3.	Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 4.	THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 5.	THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 6.	THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 7.	Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 8.	Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 9.	FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 10.	FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 11.	Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 12.	Power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
Figure 13.	Attenuation vs. voltage on pin MUTE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 14.	Current consumption vs. voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
Figure 15.	Attenuation vs. voltage on pin STBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
Figure 16.	Output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 17.	THD vs. output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
Figure 18.	THD vs. output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 19.	THD vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
Figure 20.	Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 21.	Crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
Figure 22.	FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
Figure 23.	FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
Figure 24.	Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 25.	Power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
Figure 26.	Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
Figure 27.	Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
Figure 28.	Turn-on/off sequence for minimizing speaker “pop” . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
Figure 29.	Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
Figure 30.	Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
Figure 31.	Unipolar PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
Figure 32. Typical LC filter for an 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
Figure 33. Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
Figure 34.	Filterless application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	30
Figure 35.	Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
Figure 36.	Power derating curves for PCB used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
Figure 37.	Test board (TDA7491LP) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	33
Figure 38.	PowerSSO-36 EPD outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	35

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Device block diagram	TDA7491LP

1 Device block diagram

Figure 1 shows the block diagram of one of the two identical channels of the TDA7491LP.

Figure 1. Internal block diagram (one channel only)

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TDA7491LP	Pin description

2 Pin description

2.1Pin out

Figure 2. Pin connection (top view, PCB view)

																				VSS
SUB_GND															36
			1
OUTPB															35					SVCC
			2
OUTPB			3												34					VREF
PGNDB			4												33					INNB
PGNDB			5														32			INPB
PVCCB			6														31			GAIN1
			7														30			GAIN0
PVCCB
OUTNB			8														29			SVR
OUTNB			9														28			DIAG
OUTNA			10																	SGND
																	27
			11																	VDDS
OUTNA																	26
PVCCA			12														25			SYNCLK
PVCCA			13														24			ROSC
PGNDA			14		EP												23			INNA
					exposed pad down															INPA
PGNDA			15		Connect to ground										22
OUTPA			16												21					MUTE
OUTPA			17												20					STBY
PGND			18												19					VDDPW

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Pin description	TDA7491LP

2.2Pin list

	Table 2.	Pin description list
	Number	Name	Type	Description
	1	SUB_GND	POWER	Connect to the frame
	2,3	OUTPB	OUT	Positive PWM output for right channel
	4,5	PGNDB	POWER	Power stage ground for right channel
	6,7	PVCCB	POWER	Power supply for right channel
	8,9	OUTNB	OUT	Negative PWM output for right channel
	10,11	OUTNA	OUT	Negative PWM output for left channel
	12,13	PVCCA	POWER	Power supply for left channel
	14,15	PGNDA	POWER	Power stage ground for left channel
	16,17	OUTPA	OUT	Positive PWM output for left channel
	18	PGND	POWER	Power stage ground
	19	VDDPW	OUT	3.3-V (nominal) regulator output referred to ground for power
				stage
	20	STBY	INPUT	Standby mode control
	21	MUTE	INPUT	Mute mode control
	22	INPA	INPUT	Positive differential input of left channel
	23	INNA	INPUT	Negative differential input of left channel
	24	ROSC	OUT	Master oscillator frequency-setting pin
	25	SYNCLCK	IN/OUT	Clock in/out for external oscillator
	26	VDDS	OUT	3.3-V (nominal) regulator output referred to ground for signal
				blocks
	27	SGND	POWER	Signal ground
	28	DIAG	OUT	Open-drain diagnostic output
	29	SVR	OUT	Supply voltage rejection
	30	GAIN0	INPUT	Gain setting input 1
	31	GAIN1	INPUT	Gain setting input 2
	32	INPB	INPUT	Positive differential input of right channel
	33	INNB	INPUT	Negative differential input of right channel
	34	VREF	OUT	Half VDDS (nominal) referred to ground
	35	SVCC	POWER	Signal power supply
	36	VSS	OUT	3.3-V (nominal) regulator output referred to power supply
	-	EP	-	Exposed pad for ground-plane heatsink, to be connected to
				GND

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TDA7491LP	Electrical specifications

3 Electrical specifications

3.1Absolute maximum ratings

Table 3.	Absolute maximum ratings
Symbol	Parameter	Value	Unit
VCC	DC supply voltage	18	V
VI	Voltage limits for input pins STBY, MUTE, INNA, INPA,	-0.3 to 3.6	V
	INNB, INPB, GAIN0, GAIN1
Top	Operating temperature	-40 to 85	°C
Tj	Operating junction temperature	-40 to 150	°C
Tstg	Storage temperature	-40 to 150	°C

3.2Thermal data

Refer also to Section 5.9: Heatsink requirements on page 32.

	Table 4.	Thermal data
	Symbol	Parameter	Min	Typ	Max	Unit
	Rth j-case	Thermal resistance, junction to case	-	2	3	°C/W
	Rth j-amb	Thermal resistance, junction to ambient	-	24	-

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Electrical specifications	TDA7491LP

3.3Electrical specifications

Unless otherwise stated, the results in Table 5 below are given for the conditions: VCC = 9 V, RL (load) = 8Ω, ROSC = R3 = 39 kΩ, C8 = 100 nF, f = 1 kHz, GV = 20 dB, and Tamb = 25 °C.

	Table 5.	Electrical specifications
	Symbol	Parameter	Condition	Min	Typ	Max	Unit
	VCC	Supply voltage	-	5	-	14	V
	Iq	Total quiescent current	Without LC filter	-	26	35	mA
	IqSTBY	Quiescent current in standby	-	-	-	10	µA
	VOS	Output offset voltage	Play mode	-100	-	100	mV
			Mute mode	-60	-	60	mV
	IOCP	Overcurrent protection threshold	RL = 0 Ω	3	-	-	A
	Tj	Junction temperature at thermal	-	-	150	-	°C
		shutdown
	Ri	Input resistance	Differential input	54	68	-	kΩ
	VUVP	Undervoltage protection	-	-	-	4.5	V
		threshold
	RdsON	Power transistor on resistance	High side	-	0.2	-	Ω
			Low side	-	0.2	-
	Po	Output power	THD = 10%	-	5.0	-	W
			THD = 1%	-	4.0	-
			RL = 4 Ω, THD = 10%,	-	5.0	-
	Po	Output power	VCC = 6.6 V				W
			RL = 4 Ω, THD = 1%,	-	4.0	-
			VCC = 6.6 V
	PD	Dissipated power	Po = 5 W + 5 W,	-	1.0	-	W
			THD = 10%
			Po = 5 W + 5 W,
	η	Efficiency	RL = 8 Ω, THD = 10%,	-	90	-	%
			VCC = 9 V
	THD	Total harmonic distortion	Po = 1 W	-	0.1	-	%
			GAIN0 = L, GAIN1 = L	18	20	22
	GV	Closed loop gain	GAIN0 = L, GAIN1 = H	24	26	28	dB
			GAIN0 = H, GAIN1 = L	28	30	32
			GAIN0 = H, GAIN1 = H	30	32	34
	GV	Gain matching	-	-1	-	1	dB
	CT	Crosstalk	f = 1 kHz, Po = 1 W	-	70	-	dB
	eN	Total input noise	A Curve, GV = 20 dB	-	15	-	µV
			f = 22 Hz to 22 kHz	-	20	-

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TDA7491LP					Electrical specifications
	Table 5.	Electrical specifications	(continued)
	Symbol	Parameter		Condition	Min		Typ		Max	Unit
	SVRR	Supply voltage rejection ratio		fr = 100 Hz, Vr = 1 Vpp,	-		50		-	dB
				CSVR = 10 µF
	Tr, Tf	Rise and fall times		-	-		40		-	ns
	fSW	Switching frequency		Internal oscillator,	290		320		350	kHz
				master mode
	fSWR	Switching frequency range		(1)	250		-		400	kHz
	VinH	Digital input high (H)		-	2.3		-		-	V
	VinL	Digital input low (L)			-		-		0.8
	AMUTE	Mute attenuation		VMUTE = low,	-		80		-	dB
				VSTBY = high
				VSTBY < 0.5 V		Standby				-
				VMUTE = X
	Function	Standby, mute and play modes		VSTBY > 2.9 V			Mute			-
	mode			VMUTE < 0.8 V
				VSTBY > 2.9 V			Play			-
				VMUTE > 2.9 V

1. Refer to Section 5.5: Internal and external clocks on page 27.

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Characterization curves	TDA7491LP

4 Characterization curves

The following characterization curves were made using the TDA7491LP demo board. The LC filter for the 4-Ω load uses components of 15 µH and 470 nF and that for the 8-Ω load uses 33 µH and 220 nF.

4.1With 4-Ω load at VCC = 6.6 V

Figure 3. Output power vs. supply voltage

Test Condition :

Vcc = 5~6.6V

RL = 4 ohm,

Rosc =39kΩ, Cosc =100nF,

f =1kHz,

Gv =30dB,

Tamb =25°C

Specification Limit:

Typical:

Vs =6.6V, Rl = 4 ohm

Po =5W @THD =10%

Po =3.7W @THD =1%

	6
	5				THD =10%
( W )	4				THD =1%
	3
Po
	2
	1
	0
	5	5. 4	5. 8	6. 2	6. 6

Supply voltage (V)

Figure 4. THD vs. output power (1 kHz)

THD(%)

Test Condition:

Vcc =6.6V,

RL= 4 ohm,

Rosc =39kΩ, Cosc =100nF,

f =1kHz,

Gv =30dB,

Tamb =25°C

Specification Limit:

Typical:

Po =5W @ THD =10%

Po per Channel (W)

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