ST TDA7342EQ2N User Manual

Features

■ Input multiplexer

– Two stereo and one mono inputs
– One quasi differential input
– Selectable input gain for optimal adaptation

to different sources

■ Fully programmable loudness function

■ Volume control in 0.3dB steps including gain

up to 20dB

■ Zero crossing mute, soft mute and direct mute

■ Bass and treble control

■ Four speaker attenuators

– Four independent speakers control in

1.25dB steps for balance and fader facilities

– Independent mute function

■ All functions programmable via serial I

2

C bus

Description

The audioprocessor TDA7342EQ2N is an
upgrade of the TDA731X audioprocessor family.

TDA7342EQ2N

Digitally controlled audio processor

TQFP32

Due to a highly linear signal processing, using
CMOS-switching techniques instead of standard
bipolar multipliers, very low distortion and very
low noise are obtained. Several new features like
softmute, and zero-crossing mute are
implemented. The soft Mute function can be
activated in two ways:

1. Via serial bus (Mute byte, bit D0)

2. Directly on pin 21 through an I/O line of the
microcontroller

Very low DC stepping is obtained by use of a
BICMOS technology.

Order codes

Part number Package Packing

TDA7342EQ2N TQFP32 Tray

TDA7342EQ2NTR TQFP32 Tape and reel

August 2006 Rev 1 1/21

www.st.com

1

Contents TDA7342EQ2N

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Pns description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.1 Data Validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.2 Start and Stop Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3 Byte Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.5 Transmission without Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5 Software specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.1 Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.2 Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.3 Transmitted data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.4 Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2/21

TDA7342EQ2N List of tables

List of tables

Table 1. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 2. Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. SUBADDRESS (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 6. Send mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 7. Input selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 8. Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 9. Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 10. Speaker attenuators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 11. Bass/Treble. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3/21

List of figures TDA7342EQ2N

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Pin connection (Top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Data Validity on the I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 4. Timing Diagram of I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Acknowledge on the I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 6. TQFP32 Mechanical Data & Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4/21

TDA7342EQ2N Block diagram

1 Block diagram

Figure 1. Block diagram

BUS

+Vcc

R2

C17 2.7nF

4.7K
100nF 100nF

C9

C14 C15

C11

TREBLE(L)

47nF

BOUT(L) BIN(L)

LOUD(L)

OUT(L) IN(L)

32

18 17

9

16 15

ATT

SPKR

OUT

LEFT FRONT

24

MUTE

TREBLE

BASS

VOL

LOUD+

ZERO

CROSS +

ATT

SPKR

MUTE

OUT

22

SCL

LEFT REAR

SDA

DIGGND

ADDR

292726

25

MUTE

SPKR

SERIAL BUS DECODER + LATCHES

SOFT

MUTE

ATT

OUT

RIGHT FRONT

23

MUTE

LOUD+

ZERO

CROSS +

TREBLE

BASS

VOL

MUTE

ATT

SPKR

OUT

RIGHT REAR

21

D93AU043B

MUTE

C16

TREBLE(R)

C12 C13

BOUT(R) BIN(R)

20 19 1

SM

C

CSMOUT(R)CREF

C10

LOUD(R)

2 4

IN(R)

314

2.7nF

100nF100nF

R1 4.7K

47nF

47nF

C8

INPUT

+ GAIN

SELECTOR

L1

13

L1

C1

LEFT

L2

12

L2

INPUTS

L3

M

11

L3

C2

C6

10

SGND

CD

R3

5

R3

C3

C7

M

R2

8

6

M

R2

MONO INPUT

R1

7

R1

C4

RIGHT

INPUTS

C5

SUPPLY

10µF

30 31 28

S

V

5/21

Pns description TDA7342EQ2N

2 Pns description

Figure 2. Pin connection (Top view)

S

TR L

GND

ADDR

CREF

SCL

SDA

DIG GND

24

23

22

21

20

19

18

17

OUT LF

OUT RF

OUT LR

OUT RR

BOUT R

BIN R

BOUT L

BIN L

TR R

IN R

OUT R

LOUD R

IN R3

IN R2

IN R1

MONO

V

323031 29 28 27 26 25

1

2

3

4

5

6

7

8

910

11 12 13 14 15 16

LOUD L

CD GND

IN L3

IN L2

IN L1

CSM

IN L

OUT L

D94AU060A

6/21

TDA7342EQ2N Electrical specifications

3 Electrical specifications

3.1 Absolute maximum ratings

Table 1. Absolute Maximum Ratings

Symbol Parameter Value Unit

V

Operating Supply Voltage 10.5 V

S

T

amb

T

3.2 Quick reference data

Table 2. Quick reference data

Symbol Parameter Min. Typ. Max. Unit

V

V

THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 0.08 %

S/N Signal to Noise Ratio 106 dB

Operating Ambient Temperature -40 to 85 °C

Storage Temperature Range -55 to 150 °C

stg

Supply Voltage 6 9 10.2 V

S

Max. input signal handling 2.1 2.6 Vrms

CL

Channel Separation 100 dB

S

C

Volume Control 0.3dB step -59.7 20 dB

Treble Control 2dB step -14 +14 dB

Bass Control 2dB step -10 +18 dB

Fader and Balance Control 1.25dB step -38.75 0 dB

Input Gain 3.75dB step 0 11.25 dB

Mute Attenuation 100 dB

3.3 Thermal data

Table 3. Thermal data

Symbol Parameter Value Unit

R

th j-amb

Thermal Resistance Junction-pins 150 °C/W

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