STM181x devices are low power reset devices
used to monitor power supplies for microcont rollers. They perform a single function: as serting a
reset signal whenever V
below a preset value and keeping it asserte d unt il
has risen above the preset threshold for a
V
CC
minimum period of time (t
lent circuit reliability without additional external
components when used with +3.0V/+3.3V
(STM1815–STM1818), and +5V (STM1810–
STM1813) power supply systems.
A precision voltage reference and comparator
monitors the V
input for an out-of-tolerance con-
CC
dition. When an invalid V
reset output (RST
) is forced low (or high in the
case of RST) and remains asserted for t
rises above the reset threshold. The
V
CC
STM1813/1818 also keep reset asserted for t
after the output is momentarily pulled to ground by
an external push-button switch.
The STM1812 and STM1817 have an active-high,
push-pull output. The STM1810 and STM1815
(push-pull) and STM1811, STM1813, STM1816,
supply voltage drops
CC
). They provide excel-
rec
condition occurs, the
CC
rec
after
rec
and STM1818 (open drain) have an active-low
output. The open drain devices (STM1811/
RST
STM1813/STM1816/STM1818) also have an internal pull-up resistor to V
. The STM1813 and
CC
STM1818 feature a debounced manual reset feature that asserts a reset if the RST
pin is pulled low
for more than 1.5µs. When used to initiate manual
reset, RST
debounces s ignals from device s such
as mechanical switches. For devices with this feature, the release of the external switch triggers the
reset period.
The STM181x devices are guaranteed to output
the correct logic state for V
down to 1.0V (0°C
CC
to +105°C). They also provide a reset comparator
designed to ignore fast transients on V
CC
.
Reset thresholds are available between +2.55V
and +4.62V These small, low power devices are
ideal for use in port able equipment. All are available in the space-saving 3-pin SOT23 package,
and are specified from –40°C to +105°C. Figure
4., page 5 shows a typical hardware hookup for
STM181x devices to a Microcontroller.
Figure 2. Logic Diagram
V
CC
STM181x
V
SS
Note: 1. For STM1812, STM1817
RST (RST)
AI09648
(1)
Table 2. Signal Names
V
SS
RST
RST
V
CC
Note: 1. For STM1812, STM1817
Ground
Active-low Reset Output
(1)
Active-high Reset Output
Supply Voltage and Input for Reset
Threshold Monitor
Figure 3. SOT23-3 Connections
RST (RST)
V
CC
Note: RST for STM1812 and STM1817
1
3
2
AI09649
V
SS
4/20
Figure 4. Hardware Hookup
V
CC
STM1810/1811/1812/1813/1815/1816/1817/1818
V
CC
STM181x
(1)
RST
Push-button
V
SS
Note: 1. RST for STM1812 and S TM1817 (see Ta bl e 1. , Device Opti ons)
Names for a brief overview of the signals connect-
ed to this de vice.
Active-Low RST
low when V
long as V
CC
mains low for t
Output (Push-pull). Pulses
drops below V
CC
, and stays low as
RST
is below the reset threshold. It re-
after VCC rises above the reset
rec
threshold.
Active-Low RST
low when V
long as V
CC
mains low for t
thres ho ld. R ST
Output (Open D rain) . Pulses
drops below V
CC
, and stays low as
RST
is below the reset threshold. It re-
after VCC rises above the reset
rec
output has a n internal 5.5k Ω p ull-
up resistor.
Table 3. STM1810/STM1815
PinNameFunction
1RST
2
3
V
V
Active-low Reset Output (Push-pull)
Supply Voltage and Input for Reset Threshold Monitor
CC
Ground
SS
Active-hi gh R S T Ou t put (P us h -p ul l ). Pulses
high when V
as long as V
mains high for t
threshold.
Active-Low RST
nal 5.5kΩ pull-up) with Manual Reset Detect.
Pulses low when V
is externally pulled low for at least 1.5µs. It remains low for t
set threshold, or after the external manual reset is
released (see Figure 10., page 8). RST
an internal 5.5kΩ pull-up resistor.
V
CC
tor.
V
SS
ply. It must be connected to the system ground.
drops below V
CC
is below the reset threshold. It re-
CC
after VCC rises above the reset
rec
, and stays high
RST
Output (Open Drain with inter-
drops below V
CC
after VCC rises above the re-
PBRST
RST
, or RST
output has
. Supply voltage and input for V
compara-
RST
. Ground, is the reference for the power sup-
Table 4. STM1811/STM1816
PinNameFunction
1RST
2
3
V
V
Active-low Reset Output (Open Drain, with internal 5.5kΩ pull-up resistor)
Supply Voltage and Input for Reset Threshold Monitor
CC
Ground
SS
Table 5. STM1812/STM1817
PinNameFunction
1RSTActive-high Reset Output (Push-pull)
2
3
V
V
Supply Voltage and Input for Reset Threshold Monitor
CC
Ground
SS
Table 6. STM1813/STM1818
PinNameFunction
1RST
2
3
V
V
Active-low Reset Output (Open Drain, with internal 5.5kΩ pull-up) with Push-Button/Manual
Reset Detect
Supply Voltage and Input for Reset Threshold Monitor
CC
Ground
SS
6/20
OPERATION
Reset Output
The STM181x asserts a reset signa l to t he M icrocontroller (MCU) whenever V
reset threshold (V
down to V
= 1.0V (0° to 105°C). A microcontrol-
CC
), and is guaranteed valid
RST
ler’s (MCU) reset input starts the MCU in a known
state. The STM1810 - STM1813/ STM1815 STM1818 Low Power Reset circuits assert reset to
prevent code-execution errors during power-up,
power-down, and brownout conditions (Figure
8., page 7).
During power-up, once V
threshold an internal timer keeps RST
reset time-out period, t
. After this interval, RST
rec
returns high.
If V
drops below the reset threshold, RST goes
CC
low. Each time RST
is asserted, it stays low for at
least the reset time-out period. Any time V
below the reset threshold, the internal timer clears.
The reset timer starts when V
reset threshold. Reset t
rec
externally initiated rising edge on the RST
(STM1813/STM1818), following a low signal of
1.5µs minimum duration.
Push-Button Detect Reset (STM1813/1818)
Many systems require push-button re set capabil ity
(Figure 9., page 8), allowing the user or external
logic circuitry to initiate reset. On the STM1813/
STM1818, a logic low on RST
1.5µs asserts a reset. RST
100ms minimum reset time-out delay (t
manual reset input shorter than 1.5µs may release
without the 1 00ms minimum reset time-out
RST
delay. To fac ilitate us e with mechanic al s witche s,
the STM1813/STM1818 contain internal debounce circuitry. A debounced waveform is shown
in Fi gur e 10. ,page 8 The RST
nal 5.5kΩ pull-up resistor.
Interfacing to Bidirectional Microcontrollers
(MCU’s)
As the RST
output on the STM1811/STM1816 is
open drain, these devices interface easily with
MCU’s that have bidirectional reset pins. Connect-
goes below the
CC
exceeds the reset
CC
low for the
goes
CC
returns above the
CC
is also triggered by an
pin
held for greater than
deasserts following a
). A
rec
output has an inter-
STM1810/1811/1812/1813/1815/1816/1817/1818
ing the µP supervisor’s reset (RST
to the microcontroller’s reset (RST
ther device to asse rt reset (Figure 11., page 8). No
externa l pull-up resistor is require d, as it is w ithin
the STM1811/STM1816.
Negative Go in g V
Transients
CC
The STM181x are relatively immune to negativegoing V
sus reset comparator overdrive (for which the
STM181x will NOT generate a reset pulse). The
graph was gene rated using a negative pul se applied to V
starting at 0.5V above the actual re-
CC,
set threshold and ending below it by the
magnitude indicated (comparator ov erdrive). The
graph indicates the maximum pulse width a negative V
transient can ha ve without cau sing a re-
CC
set pulse. As the magnitude of the transient
increases (further below the thres hold), the maximum allowable pulse width decreases . Any combination of duration and overdrive which lies under
the curve will NOT generate a reset signal. Typically, a V
transient that goes 100mV below the
CC
reset threshold and lasts 20µs or less will not
cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possibl e to the V
vides additional transient immunity.
Valid R ST
When V
Output Down to VCC = 0V
falls below 1V, the RST output no long-
CC
er sinks current, but becomes an open circuit. In
most systems this is not a problem, as most MCUs
do not operate below 1V. However, in applications
where RST
output must be valid down to 0V, a
pull-down resistor may be added t o hold the RST
output low (see Figure 12., page 9). This resi stor
must be large enough to not load the RST
and still be small enough to pull the output to
ground. A 100kΩ res istor is recommended .
Note: The same situation applies for the activehigh RST of the STM1810/1812. A 100kΩ pul l-up
resistor to V
valid for V
should be used if RST must remain
CC
< 1.0V .
CC
) output directly
) pin allows ei-
pin pro-
CC
output,
Figure 8. Reset Timing Diagram
V
CC
V
RST
(1)
RST
Note: 1. RST for STM1812 and S TM1817
CC
(min)
V
RST
t
t
rec
rec
AI09653
7/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 9. Push-Button Manual Reset with MR Detect (STM1813/1818)
Figure 11. Interfacing MCUs with Bi-Directional Reset Pins (RST
V
CC
tPBRST
, Open Drain, STM1811/1816)
AI09655
STM1811
STM1816
V
CC
5.5kΩ
RST
V
SS
RST
Input
V
CC
MCU
V
SS
AI09656
8/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 12. Va lid R eset (RST) Output Down to VCC = 0V (Push-pull)
V
CC
STM1810
V
CC
V
STM1815
MCU
RST
V
SS
RST
Input
(1)
R
P
V
Note: 1. ~100 kΩ re sistor reco m m ended.
Figure 13. Vali d Re set (RST) Outp ut Down to VCC = 0V (Push-pull)
V
CC
STM1812
STM1817
V
CC
(1)
R
P
V
MCU
RST
RST
Input
V
SS
V
CC
SS
AI09657
CC
SS
Note: 1. ~100 kΩ re sistor reco m m ended.
AI09658
9/20
STM1810/1811/1812/1813/1815/1816/1817/1818
TYPICAL OPERATING CHARACTERISTICS
Note: Typical values are at TA = 25°C .
Figure 14. Supply Current vs. Temperature (no load )
5
4
3
2
Supply Current (µA)
1
VCC = 1.8V
VCC = 3V
VCC = 5V
0
–40–20020406080100
Temperature (˚C)
Figure 15. Normalized Re set Time- o ut Period (t
1.07
1.05
)
rec
1.03
Period (t
1.01
Normalized Reset Time-out
0.99
–40–20020406080100
Temperature (°C)
) vs. Temperature - VOD = VTH – VCC
rec
AI10403
AI10402
10/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 16. VCC-to-Reset Output Delay vs. Temperature - VOD = VTH – VCC
3.0
2.5
2.0
1.5
1.0
-to-Reset Output Delay (µs)
CC
V
0.5
0.0
–40–20020406080100
Temperature (°C)
AI10404
Figure 17. Voltage Output Low vs. I
0.10
0.08
0.06
(V)
OUT
V
0.04
0.02
0.00
0123456
SINK
I
SINK
(mA)
VCC = 3V
AI10406
11/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 18. Voltage Output High vs. I
1.20
1.00
0.80
SOURCE
CC
/ V
0.60
OUT
V
0.40
0.20
0.00
0.01.02.03.04.05.06.0
I
SOURCE
(mA)
Figure 19. Nor m a liz ed R es et Threshol d vs . Tem perature
1.010
VCC = 3V
AI10407
1.005
1.000
0.995
Normalized Reset Threshold Voltage
0.990
–40–20020406080100
Temperature (°C)
AI10405
12/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 20. Max Transient Duration NOT Causing Reset Pulse vs. Reset Threshold Overdrive
30
25
20
15
10
Transient Duration (µs)
5
0
101001000
Reset Threshold Overdrive (mV)
Note: Reset occurs above the li ne.
AI10408
13/20
STM1810/1811/1812/1813/1815/1816/1817/1818
MAXIMUM RA T ING
Stressing the device above the rating l isted in the
Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress
ratings only and operation of the device at t hese or
any other conditions ab ove those i ndicated in t he
Operating sections of this specificat ion is not im-
Table 7. Absolute Maximum Ratings
SymbolParameterValueUnit
plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevan t quality documents.
T
STG
(1)
T
SLD
V
IO
V
CC
I
O
P
D
Note: 1. Reflow at peak temperature of 2 55°C to 260° C f or < 30 seconds (total thermal budg et not to exce ed 180°C for between 90 t o 150
seconds).
Storage Temperature (VCC Off)
Lead Solder Temperature for 10 seconds260°C
Input or Output Voltage
Supply Voltage–0.3 to 7.0V
Output Current20mA
Power Dissipation320mW
–55 to 150°C
–0.3 to V
CC
+0.3
V
DC AND AC PARAMETERS
This section summarizes t he operating m easurement conditions, and the DC and AC characteristics of the device. The parameters in the D C and
AC characteristics Tables that follow, are derived
from tests performed under the Measurement
Table 8. Operating and AC Measurement Conditions
ParameterSTM1810 - 1818Unit
V
Supply Voltage
CC
Ambient Operating Temperature (T
Input Rise and Fall Times≤ 5ns
Input Pulse Voltages
Input and Output Timing Ref. Voltages
)
A
Conditions summarized in Table 8, Operating and
AC Measurement Conditions. Designers should
check that the operating cond itions in their circuit
match the operating conditions when relying on
the quoted parameters.
1.0 to 5.5V
–40 to 105°C
0.2 to 0.8V
0.3 to 0.7V
CC
CC
V
V
Figure 21. AC Testing Input/Output Waveforms
0.8V
0.2V
14/20
CC
CC
0.7V
0.3V
AI02568
CC
CC
STM1810/1811/1812/1813/1815/1816/1817/1818
Table 9. DC and AC Characteristics
Sym
V
V
Alter-
native
CC
I
CC
V
IH
V
IL
OH
Operating Voltage
VCC Supply Current
Input High VoltageSTM1813/1818 only
Input Low VoltageSTM1813/1818 only
Output High Voltage0 < IOH < 500µA
RST Output Source Current
I
OH
RST Output Source Current
Description
Test Condition
T
= 0 to +105°C
A
= –40 to +105°C
T
A
= 3.6V, No load
V
CC
= 5.5V, No load
V
CC
≥ V
V
CC
(max), Reset not
RST
asserted (STM1810/STM1815)
V
≤ V
CC
(min), Reset asserted
RST
(STM1812/STM1817)
VCC ≥ 2.7V, Reset asserted,
C
I
OL
OUT
RST Output Sink Current
RST Output Sink Current
Output Capacitance
(2)
V
= 0.4V (STM1810/1811/
OUT
1813/1815/1816/1818)
V
≥ 2.7V, Reset not asserted,
CC
V
= 0.4V, (STM1812/1817)
OUT
Reset Thresholds
STM181xL
STM181xM
V
RST
Reset Threshold
STM181xT
STM181xS
STM181xR
V
= (VTH + 100mV) falling to
t
RD
t
rec
VCC to RST Delay
RST Pulse Width
CC
(VTH – 200mV)
V
CC
Rising
Push-Button Reset Detect (STM1813, STM1818)
t
PB
t
PBRST
Note: 1. Valid for A m bi ent Operat in g T em perature: TA = –40 to 105°C; VCC = 1.2V to 5.5V (except where noted).
2. T he STM1811/1813/1816/1818 have an internal pul l -up resist or which may si nk 1mA of current.
Push-button Detect to RSTSTM1813/18181.5µs
Push-button RST Time-outFrom Rising Edge
Internal Pull-up Resistance
STM1811/18163.55.57.5kΩ
STM1813/18183.15.57.5kΩ
(1)
MinTypMaxUnit
1.05.5V
1.25.5V
0.7V
CC
V
–
CC
0.5
10mA
10mA
25°C4.62V
–40 to 105°C4.504.75V
25°C4.37V
–40 to 105°C4.254.49V
25°C3.06V
–40 to 105°C2.983.15V
25°C2.88V
–40 to 105°C2.802.97V
25°C2.55V
–40 to 105°C2.472.64V
100150200ms
100150200
410µA
916µA
V
0.4
VCC
– 0.1
V
V
350µA
350µA
10pF
25µs
ms
15/20
STM1810/1811/1812/1813/1815/1816/1817/1818
PACKAG E MECHANICAL
Figure 22. SOT23-3 – 3-lead Small Outline Transistor Package Outline
E
E1
B
1
e1
0.15
e
M
D
CAB
A1
0.20C A B
3X b
C
M
A
θ
C
L1
3X
0.10 C
C
A2
L
SOT23-3
Note: Drawing is not to scale.
Table 10. SOT23-3 – 3-lead Small Outline Transistor Package Mechanical Data
Information furnished is believed to be accurate and reliable. However, STMicroelectronics a ssumes no responsibility fo r the c onsequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authori zed for use as crit i cal compon ents in life support devic es or systems w i thout express written approval of STMicroele ct ronics.
The ST logo is a registered trademark o f STM i croelectronics.
All other nam es are the pro perty of their respective owners