STA8088FG
Fully Integrated GPS/Galileo/Glonass/QZSS Receiver
with embedded RF and in-package Flash
Features
■STMicroelectronics® 3rd generation positioning receiver with 32 Tracking channels and 2 fast acquisition channels compatible with GPS, Galileo and Glonass systems
■Embedded RF Front-End with separate GPS/Galieo/QZSS and Glonass IF outputs
■Embedded low noise amplifier
■-162 dBm indoor sensitivity (tracking mode)
■Fast TTFF < 1 s in Hot start and 35 s in Cold Start
■High performance ARM946 MCU (up to 208 MHz)
■256 Kbyte embedded SRAM
■In-Package SQI Flash Memory (16 Mbits)
■Real Time Clock (RTC) circuit
■32-bit Watch-dog timer
■3 UARTs
■1 I2C master/slave interface
■1 Synchronous Serial Port (SSP, Motorola-SPI supported) or 1 External SQI Flash interface
■USB2.0 dual-role full speed (12 MHz) with integrated physical layer transceiver
■2 Controller Area Network (CAN)
■2 channels ADC (10 bits)
■3 Embedded 1.8 V voltage regulators
■I/O level selectable 1.8 V or 3.3 V
■Operating Condition:
–VDD12: 1.2 V ±10%
–VDD18/RF18: 1.8 V ±5%
–VLPVR 1.62 V to 3.6 V
–VddIO: 1.8 V ±5%; 3.3 V ±10%
Data brief − preliminary data
VFQFPN56
(7x7x0.85mm)
■Package:
–VFQFPN56 (7 x 7 x 0.85 mm) 0.4 mm pitch
■Ambient temperature range: -40/+85°C
Description
STA8088FG is a single die standalone positioning receiver IC working on multiple constellations (GPS/Galileo/Glonass/QZSS).
The minimum BOM make STA8088FG the ideal solution for low-cost and small footprint products such handheld computers, cameras, data loggers, and sports accessories.
The device is offered with a complete GNSS firmware which performs all GNSS operations including tracking, acquisition, navigation and data output with no need of external memories
March 2012 |
Doc ID 022731 Rev 2 |
1/17 |
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to |
www.st.com |
change without notice. For further information contact your local STMicroelectronics sales office. |
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Contents |
STA8088FG |
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Contents
1 |
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 5 |
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2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 6 |
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2.1 |
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
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2.2 |
VFQFPN56 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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2.3 |
Power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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2.4 |
Main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9 |
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2.5 |
Test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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2.6 |
RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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2.7 |
Port 0 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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2.8 |
Port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11 |
3 |
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
13 |
3.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 VFQFPN56 7 x 7 x 0.85 mm package information . . . . . . . . . . . . . . . . . . 13
4 |
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
15 |
5 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
16 |
2/17 |
Doc ID 022666 Rev 2 |
STA8088FG |
List of tables |
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List of tables
Table 1. Power supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 2. Main function pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3. Test/emulated dedicated pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 4. RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Port 0 pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 6. Port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 7. VFQFPN56 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Doc ID 022666 Rev 2 |
3/17 |
List of figures |
STA8088FG |
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List of figures
Figure 1. STA8088FG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. VFQFPN56 connection diagram - with CAN (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. VFQFPN56 connection diagram - no CAN (bottom view). . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. VFQFPN56 7 x 7 x 0.85 mm package dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 5. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4/17 |
Doc ID 022666 Rev 2 |
STA8088FG |
Overview |
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STA8088FG is a highly integrated System-On-Chip device designed for positioning systems applications.
The low power consumption and minimum BOM make STA8088FG the ideal solution for low-cost and battery-operated portable products such handheld, computers, cameras, data loggers and sports accessories, as well as automotive application.
It combines a high performance ARM946 microprocessor with embedded enhanced peripherals and I/O capabilities with ST next generation triple-constellation positioning engine. The RF front-end and base band processor are able to support GPS/Galileo and Glonass navigation systems. The device is offered with a complete firmware which performs all positioning operations including tracking, acquisition, navigation and data output with no need of external memories.
It also provides clock generation via PLL, backup logic with real time clock and it supports USB2.0 standard at full speed, (12 Mbps) with on-chip PHY.
STA8088FG is software compatible with the ARM processor family. The device is power supplied with 1.8V and uses three on-chip voltage regulators to internally supply the RF front-end, core logic and the backup logic. In order to reduce the power consumption the chip can be directly powered with 1.2 V bypassing the embedded voltage regulators which will be put in power down mode.
I/O lines are compatible with 1.8 V and 3.3 V.
The chip, using STMicroelectronics CMOSRF Technology, is housed in a VFQFPN-56 (7 x 7 x 0.85 mm) package with stacked 16 Mbit Flash memory.
Doc ID 022666 Rev 2 |
5/17 |
Pin description |
STA8088FG |
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TCM WITCHABLES I/D x16KB8
CLOCK_GEN
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G3RF IP |
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G3 Base Band |
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ADC |
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LNA |
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OSCI |
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CKX2 |
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Acq |
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32 Trk |
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26MHz |
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GALGPS IF |
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GALGPS |
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Section |
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RAMs |
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Channels |
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M |
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1.8V 1.2V |
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PLL |
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DCREG |
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APB |
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2 Fast Acq |
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xu |
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ADC |
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RF |
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PG_650x |
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Bridge |
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Channel |
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Glonass IF |
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GLONASS |
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Section |
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SPI IF |
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FRC_DPLL |
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AHB |
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RIOSC47 |
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SQI |
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USB |
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IF |
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IF |
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IOs |
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CAN0 |
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CAN1 |
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UART |
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UART1 |
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UART2 |
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SSP |
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I2C |
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Rx-Tx |
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Rx - Tx |
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Rx - Tx |
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ROM |
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JTAG |
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APB |
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APB |
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16KB |
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Bridge2 |
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THSENS |
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WD |
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EFT |
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GPIO |
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MTU |
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ADC |
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REGMAP |
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VIC |
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BK_domain |
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SARADC |
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Test controller |
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64KHIGH SPEED D – TCM 8 |
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RAM 8KB |
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SYS CTRL |
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PWR, RST & CLK |
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AD10SA1M_18 |
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I-Cache |
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CTRL |
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DC_LN_1V8TO1V2 |
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ARM 946 |
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16KB |
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APB |
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D-Cache |
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Bridge1 |
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APB |
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HPREG |
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LPREG |
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8KB |
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OSCI32 |
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ISO |
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DCREG |
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HIGH SPEED I - TCM |
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RTC |
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OSCI32_LJ_1V8 |
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CELL |
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OSCI32 |
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BKREG |
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64KB |
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GAPGCFT00542
6/17 |
Doc ID 022666 Rev 2 |