ST STA515W User Manual
40-volt, 3-amp, quad power half bridge
Features
Multipower BCD technology
Low input/output pulse width distortion
200 mΩ R
stage
CMOS-compatible logic inputs
Thermal protection
Thermal warning output
Undervoltage protection
Short-circuit protection
Description
The STA515W is a monolithic quad half-bridge
stage in Multipower BCD Technology. The device
can be used as a dual bridge or reconfigured, by
connecting pin CONFIG to pins VDD, as a single
bridge with double-current capability.
The device is designed, particularly, to be the
output stage of a stereo all-digital high-efficiency
amplifier. It is capable of delivering 10 W x
Table 1. Device summary
complementary DMOS output
dsON
STA515W
PowerSSO36 package
with exposed pad down
4 channels into 4-Ω loads with 10% THD at
V
= 18 V in single-ended configuration.
CC
It can also deliver 20 W + 20 W into 8-Ω loads
with 10% THD at V
or, in single parallel BTL configuration, 40 W into
a 8-Ω load with 10% THD at V
The input pins have a threshold proportional to
the voltage on pin VL.
The STA515W comes in a 36-pin PowerSSO
package with exposed pad down (EPD).
= 18 V in BTL configuration
CC
= 26 V.
CC
Order code Ambient temp. range Package Packaging
STA515W 0 to 70 °C PowerSSO36 EPD Tube
STA515W13TR 0 to 70 °C PowerSSO36 EPD Tape and reel
April 2010 Doc ID 11079 Rev 2 1/14
www.st.com
14
Introduction STA515W
1 Introduction
Figure 1. STA515W circuit for quad single-ended amplifiers
+3.3V
TH_WARN
C58
100nF
VCC1A
29
IN1A
IN1A
23
VL
24
CONFIG
25
PWRDNPWR_DN
R57
R59
100nF
C60
C58
100nF
10K
C53
IN1B
IN2A
IN2B
FAULT
TRISTATE
THWARN
IN1B
VDD
VDD
VSS
VSS
VCCSIG
VCCSIG
IN2A
GNDREG
GNDCLEAN
IN2B
GNDSUB
10K
100nF
27
26
28
30
21
22
33
34
35
36
31
20
19
32
1
PROTECTION
&
LOGIC
REGULATORS
M3
M2
M5
M4
M17
M15
M16
M14
15
17
16
14
12
11
10
13
7
8
9
6
4
3
2
5
D03AU1474bc
OUT1A
OUT1A
GND1A
VCC1B
OUT1B
OUT1B
GND1B
VCC2A
OUT2A
OUT2A
GND2A
VCC2B
OUT2B
OUT2B
GND2B
C81
100nF
C82
100nF
C83
100nF
C84
100nF
R61
5K
C31 820µF
C91
1µF
R62
5K
R63
C32 820µF
5K
C92
1µF
R64
5K
R65
C33 820µF
5K
C93
1µF
R66
5K
R67
C34 820µF
5K
C94
1µF
R68
5K
1µF
L11 22µH
C71
R41
100nF
20
C41
330pF
C51
C61
1µF
100nF
C42
330pF
C43
330pF
C52
C62
1µF
100nF
C44
330pF
R51
6
L12 22µH
C72
R42
100nF
20
R52
6
1µF
L13 22µH
C73
R43
100nF
20
R53
6
L14 22µH
C74
R44
100nF
20
R54
6
+V
CC
C21
2200µF
4Ω
4Ω
4Ω
4Ω
2/14 Doc ID 11079 Rev 2
STA515W Pin description
2 Pin description
Figure 2. Pin out
VCCSIG
VCCSIG
VSS
VSS
IN2B
IN2A
IN1B
IN1A
THWARN
FAU LT
TRISTATE
PWRDN
CONFIG
VL
VDD
VDD
GNDREG
GNDCLEAN
Table 2. Pin list
GNDSUB
OUT2B
OUT2B
VCC2B
GND2B
GND2A
VCC2A
OUT2A
OUT2A
OUT1B
OUT1B
VCC1B
GND1B
GND1A
VCC1A
OUT1A
OUT1A
N.C.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
STA515W
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
Pin Name Type Description
1 GNDSUB PWR Substrate ground
2, 3 OUT2B O Output half bridge 2B
4 VCC2B PWR Positive supply
5 GND2B PWR Negative supply
6 GND2A PWR Negative supply
7 VCC2A PWR Positive supply
8, 9 OUT2A O Output half bridge 2A
10, 11 OUT1B O Output half bridge 1B
12 VCC1B PWR Positive supply
13 GND1B PWR Negative supply
14 GND1A PWR Negative supply
15 VCC1A PWR Positive supply
16, 17 OUT1A O Output half bridge 1A
18 N.C. - No internal connection
19 GNDCLEAN PWR Logical ground
20 GNDREG PWR Ground for regulator V
DD
21, 22 VDD PWR 5-V regulator referred to ground
23 VL PWR High logical state setting voltage, V
Doc ID 11079 Rev 2 3/14
L
Pin description STA515W
Table 2. Pin list
Pin Name Type Description
Configuration pin:
24 CONFIG I
25 PWRDN I
26 TRISTATE I
27 FAULT O
28 THWARN O
29 IN1A I Input of half bridge 1A
30 IN1B I Input of half bridge 1B
0: normal operation
1: bridges in parallel, see Parallel-output and high-current
operation on page 9
Stand-by pin:
0: low-power mode
1: normal operation
Hi-Z pin:
0: all power amplifier outputs in high-impedance state
1: normal operation
Fault pin advisor (open-drain device, needs pull-up resistor):
0: fault detected (short circuit or thermal, for example)
1: normal operation
Thermal-warning advisor (open-drain device, needs pull-up
resistor):
o
0: temperature of the IC >130
C
1: normal operation
31 IN2A I Input of half bridge 2A
32 IN2B I Input of half bridge 2B
33, 34 VSS PWR 5-V regulator referred to +V
35, 36 VCCSIG PWR Signal positive supply
CC
4/14 Doc ID 11079 Rev 2
STA515W Electrical characteristics
3 Electrical characteristics
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
V
max
T
op
P
tot
T
stg
Table 4. Recommended operating conditions
DC supply voltage (Pins 4, 7, 12, 15) 40 V
Maximum voltage on pins 23 to 32 5.5 V
Operating temperature range 0 to 70 °C
Power dissipation (Tcase = 70 °C) 21 W
, TjStorage and junction temperature -40 to 150 °C
Symbol Parameter Min Typ Max Unit
V
CC
V
L
T
amb
Table 5. Thermal data
DC supply voltage (Pins 4, 7, 12, 15) 10 - 36 V
Input logic reference 2.7 3.3 5.0 V
Ambient temperature 0 - 70 °C
Symbol Parameter Min Typ Max Unit
T
T
T
t
hSD
warn
j-case
jSD
Thermal resistance junction to case (thermal pad) - - 1.5 °C/W
Thermal shut-down junction temperature - 150 - °C
Thermal warning temperature - 130 - °C
Thermal shut-down hysteresis - 25 - °C
Unless otherwise stated, the test conditions for Ta bl e 6 below are VL = 3.3 V, VCC = 30 V,
R
=8Ω, fSW = 384 kHz and T
L
Table 6. Electrical characteristics
Symbol Parameter Test conditions Min Typ Max Unit
R
I
g
g
dsON
dss
N
P
Power P-channel/N-channel
MOSFET R
dsON
Power P-channel/N-channel
leakage Idss
Power P-channel R
matching
Power N-channel R
matching
Dt_s Low current dead time (static) see Figure 3 - 1020ns
= 25 °C
amb
= 1 A - 200 270 mΩ
I
dd
V
= 35 V --50µA
CC
dsON
dsON
= 1 A 95--%
I
dd
= 1 A 95--%
I
dd
Doc ID 11079 Rev 2 5/14
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