ST STA510F User Manual

Features

■ Minimum input/output pulse width distortion

■ 150 mΩ R

complementary DMOS output

dsON

stage

■ CMOS compatible logic inputs

■ Thermal protection

■ Thermal warning output

■ Undervoltage protection

■ No power-on, power-off sequence required

Description

The STA510F is a monolithic, quad, half-bridge
stage in multipower BCD technology. The device
can be used as dual-bridge or reconfigured, by
connecting the CONFIG pin to the Vdd pin, as
single-bridge with double current capability, and
as half-bridge (binary mode) with half current
capability.

Table 1. Device summary

STA510F

44-V, 5.5-A, quad power half-bridge

PowerSSO36 with
exposed pad (or slug) up

The device is particularly designed to make the
output stage of a stereo all-digital high-efficiency
(FFX) amplifier capable of delivering 100 W +
100 W output power into 8-Ω loads with
THD = 10% and V
configuration the device can deliver 200 W into a
4-Ω load with THD = 10% and V

The device is fully compatible with the DDX
driver device.

The input pins have a threshold proportional to V
pin voltage.

= 39 V. In single BTL

cc

= 39 V.

cc

®

L

Order code Operating temp. range Package Packing

STA510F 0° to 70° C PowerSSO36 (slug up) Tube

STA510FTR 0° to 70° C PowerSSO36 (slug up) Tape & Reel

Figure 1. Typical application

Output Filter

OUT 1A

PWM Out1_A

PWM Out2_A

PWM Out1_B

PWM Out2_B

Vcc

PSU

GND

IN 1A

IN 2A

IN 1B

IN 2B

Vcc

OUT 1B

STA510FSTA309A

OUT 2A

OUT 2B

September 2011 Doc ID 14268 Rev 3 1/11

IN A

OUT A
OUT B

IN B

Output Filter

IN A

OUT A
OUT B

IN B

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11

Pin description STA510F

1 Pin description

Figure 2. Pin connections (top view)

V

CC

VCCSign

FAULT

TRI-STATE

PWRDN

CONFIG

Table 2. Pin list

Sign

V

SS

V

SS

IN2B

IN1B

IN1A

V

V

DD

V

DD

1027

11

12

1324

14

15

16

17

18

1

2

3

4

5

6

7

8

9

GND-SUB

OUT2B

OUT2B

2B

V

CC

GND2B

GND2AIN2A

V

2A

CC

OUT2A

OUT2ATH_WAR

OUT1B

OUT1B

V

1B

CC

GND1B

GND1A

V

1A

CC

OUT1A

OUT1AGND-Reg

N.C.GND-Clean

36

35

34

33

32

31

30

29

28

26

25

L

23

22

21

20

19

Pin Name Description

1 GND-SUB Substrate ground

2, 3 OUT2B Output half-bridge 2B

4 Vcc2B Positive supply

5 GND2B Negative supply

6 GND2A Negative supply

7 Vcc2A Positive supply

8, 9 OUT2A Output half-bridge 2A

10, 11 OUT1B Output half-bridge 1B

12 Vcc1B Positive supply

13 GND1B Negative supply

14 GND1A Negative supply

15 Vcc1A Positive supply

16, 17 OUT1A Output half-bridge 1A

2/11 Doc ID 14268 Rev 3

STA510F Pin description

Table 2. Pin list (continued)

Pin Name Description

18 NC Not connected

19 GND-clean Logical ground

20 GND-Reg Ground for regulator Vdd

21, 22 Vdd 5-V regulator referred to ground

23 V

L

High logical state setting voltage

24 CONFIG Configuration

25 PWRDN Standby

26 TRI-STATE Hi-Z

27 FAULT Fault pin advisor

28 TH-WAR Thermal warning advisor

29 IN1A Input of half-bridge 1A

30 IN1B Input of half-bridge 1B

31 IN2A Input of half-bridge 2A

32 IN2B Input of half-bridge 2B

33, 34 Vss 5-V regulator referred to +Vcc

35, 36 VCCSIGN Signal positive supply

Table 3. Pin values

Pin Logical value Device status

FAULT

(1)

0 Fault detected (short-circuit, or thermal)

1 Normal operation

0 All power stages in Hi-Z state

TRI-STATE

1 Normal operation

PWRDN

0 Low-power mode

1 Normal operation

THWAR

(1)

0 Temperature of the IC = 130° C

1 Normal operation

0 Normal operation

CONFIG

1. The pin is open collector. To have the high logic value, it needs a pull-up resistor.

2. CONFIG = 1 means connect pin 24 (CONFIG) to pins 21, 22 (Vdd).

(2)

1

OUT1A = OUT1B, OUT2A = OUT2B
(IF IN1A = IN1B and IN2A = IN2B)

Doc ID 14268 Rev 3 3/11

Electrical specifications STA510F

2 Electrical specifications

2.1 Absolute maximum ratings

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

CC

max

DC supply voltage (pin 4, 7, 12, 15) 44 V

Maximum voltage on pins 23 to 32 5.5 V

ESD Max ESD on pins (HBM) ±1000 V

T

op

, T

T

stg

Operating temperature range 0 to 70 ° C

Storage and junction temperature -40 to 150 ° C

j

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Min Typ Max Unit

T

j-case

T

jSD

T

warn

t

hSD

Thermal resistance junction to case (thermal pad) 1 2.5 °C/W

Thermal shut-down junction temperature 150 ° C

Thermal warning temperature 130 ° C

Thermal shutdown hysteresis 25 ° C

2.3 Electrical specifications

The results in Ta bl e 6 below are given for the conditions: VL= 3.3 V, Vcc = 37 V and
T = 25° C unless otherwise specified.

Table 6. Electrical specifications

Symbol Parameter Condition Min Typ Max Unit

R

dsON

I

dss

g

N

g

P

Dt_s Low current deadtime (static) see test circuit Figure 3 10 20 ns

Dt_d High current deadtime (dynamic)

t

d ON

4/11 Doc ID 14268 Rev 3

Power Pchannel/Nchannel MOSFET
RdsON

Power Pchannel/Nchannel leakage
current

Id = 1 A 150 200 mΩ

100 μA

Power Pchannel RdsON matching Id = 1 A 95 %

Power Nchannel RdsON matching Id = 1 A 95 %

L = 22 μH, C = 470 nF,
RL = 8 Ω, Id = 4.5 A,

50 ns

see test circuit Figure 4

Turn-on delay time Resistive load 100 ns