ST19NA18
Smartcard MCU with MAP, IART, High Speed CPU Clock & 18 KBytes High Density EEPROM
Data Brief
Features summary
ST19NA18 applications include:
■ Pay TV, Banking and Secure applications
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Hardware and dedicated software |
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■ Enhanced 8-bit CPU with extended addressing |
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259a.ai |
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Micromodule |
Wafer |
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modes |
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128 Kbytes User ROM with partitioning |
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AES-128 software library |
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4 Kbytes User RAM with partitioning |
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1088-bit Modular Arithmetic Processor with |
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– Software s lectableProduct(s)operand length up to |
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■ 18 Kbytes User EEPROM with partitioning, |
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library support for asymmetrical algorithms |
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64 Bytes User OTP and 64 Bytes ST OTP |
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– Fast modular multiplication and squaring |
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areas: |
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using Montgomery method |
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– Highly reliable CMOS EEPROM submicron |
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– Software Crypto libraries in separate ST |
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ROM area for efficient algorithm coding |
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technology |
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using a set of advanced functions |
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– Error Correction Code for single bit fail |
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Obsolete |
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3V and 5V supply voltage ranges |
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correction within a byte |
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2176 bi s |
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– 10-year data retention |
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■ ISO 3309 CRC calculation block |
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– 500,000 Erase/Write cycles endurance |
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■ FIPS 140-2 and AIS31 compliant True Random |
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– Erase or Program 1 to 64 Bytes in 1.5 ms |
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Number Generator (TRNG) with two TRNG |
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■ Three 8-bit timers with interrupt capability |
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registers |
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■ Power-saving Standby mode |
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Unique serial number on each die |
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High performance provided using high speed |
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Product(s) |
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■ Serial access I/Os, ISO 7816-3 compatible |
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internal clock frequency (up to 28 MHz) |
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ISO Asynchronous Receiver Transmitter for |
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Cryptographic performances (1) |
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high speed serial data support |
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– RSA 1024-bit signature with CRT(2): 39 ms |
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■ ESD protection greater than 5000 V |
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– RSA 1024-bit signature without CRT(2): 130 ms |
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Security features |
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– RSA 1024-bit verification (e=’$10001’): 2.4 ms |
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– RSA 1024-bit key generation: 1.2 s |
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Obsolete– Built-in DFA countermeasures |
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– RSA 2048-bit signature with CRT(2): 264 ms |
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Very high s |
curity features including: |
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EEPROM Flash programming |
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– RSA 2048-bit verification (e=’$10001’): 42 ms |
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Cl ck management |
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– Triple DES (with enhanced security): 27 µs |
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– User ROM protected area |
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– Single DES (with enhanced security): 20 µs |
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Code signature capability |
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Glitch detector |
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■ Security firewalls for memories, MAP and |
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Enhanced DES accelerator |
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■ Hardware Security Enhanced DES accelerator |
1. Typical values, independent from external clock |
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with library support for symmetrical algorithms: |
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frequency and supply voltage. |
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– DES, 3 DES computations and CBC mode |
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2. CRT: Chinese Remainder Theorem. |
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February 2007 |
DB_19NA18/0702 Rev 3 |
1/4 |
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For further information contact your local STMicroelectronics sales office. |
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www.st.com |
Description |
ST19NA18 |
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The product, member of the ST19N platform, is a serial access microcontroller specially designed for cost-effective secure portable applications.
It is manufactured using an advanced highly reliable ST CMOS EEPROM technology.
It is based on the STMicroelectronics 8-bit CPU already implemented on the ST19X product family and includes on-chip memories: User ROM, User RAM and EEPROM with state-of- the-art security features. ROM, RAM and EEPROM memories can be configured into partitions with customized access rules.
An additional ST ROM contains all ST provided functions and libraries.
Access from any memory area to another are protected by hardware firewalls. Access rules are user-defined and can be selected by mask options.
The chip includes an Enhanced DES accelerator which is accessible via cryptographic software libraries located in ST ROM.
The chip includes a Modular Arithmetic Processor (MAP) based on a 1088-bit processor architecture. It processes modular multiplication, squaring and additional operand calculations up to 2176 bits.
The Internal MAP and Enhanced DES accelerator are designed to speed up cryptographic calculations using Public Key Algorithms and Secret Key Algorithms.
As with the other ST19N products, two serial interfaces compatible with the ISO 7816
standard are available. |
Obsolete |
Product(s)
A CRC calculation block is also available and is directly accessible by the User.
● Smartcard ICs Emulator
- Software development and firmware generation (ROM and options) are supported by a comprehensiveProduct(s)set of development tools, dedicated at development and validation of software:
● ScDevTools environment for WindowsTM NT, 2000, and XP based stations
● Powerful C/C++ compiler and debugger are also available (third-party tools) Obsolete
2/4 |
DB_19NA18/0702 |