ST19NA18
Obsolete Product(s) - Obsolete Product(s)
Smartcard MCU with MAP, IART,
High Speed CPU Clock & 18 KBytes High Density EEPROM
Data Brief
Features summary
ST19NA18 applications include:
■ Pay TV, Banking and Secure applications
Hardware and dedicated software
■ Enhanced 8-bit CPU with extended addressing
modes
■ 128 Kbytes User ROM with partitioning
■ 4 Kbytes User RAM with partitioning
■ 18 Kbytes User EEPROM with partitioning,
64 Bytes User OTP and 64 Bytes ST OTP
areas:
– Highly reliable CMOS EEPROM submicron
technology
– Error Correction Code for single bit fail
correction within a byte
– 10-year data retention
– 500,000 Erase/Write cycles endurance
– Erase or Program 1 to 64 Bytes in 1.5 ms
■ Three 8-bit timers with interrupt capability
■ 3V and 5V supply voltage ranges
■ Power-saving Standby mode
■ Serial access I/Os, ISO 7816-3 compatible
■ ISO Asynchronous Receiver Transmitter for
high speed serial data support
■ ESD protection greater than 5000 V
Security features
■ Very high security features including:
– EEPROM Flash programming
– Clock management
– User ROM protected area
■ AES-128 software library
■ 1088-bit Modular Arithmetic Processor with
■ ISO 3309 CRC calculation block
■ FIPS 140-2 and AIS31 compliant True Random
■ Unique serial number on each die
■ High performance provided using high speed
■ Cryptographic performances
Micromodule Wafer
library support for asymmetrical algorithms
– Fast modular multiplication and squaring
using Montgomery method
– Software Crypto libraries in separate ST
ROM area for efficient algorithm coding
using a set of advanced functions
– Software selectable operand length up to
2176 bits
Number Generator (TRNG) with two TRNG
registers
internal clock frequency (up to 28 MHz)
(1)
– RSA 1024-bit signature with CRT
– RSA 1024-bit signature without CRT
– RSA 1024-bit verification (e=’$10001’): 2.4 ms
– RSA 1024-bit key generation: 1.2 s
– RSA 2048-bit signature with CRT
– RSA 2048-bit verification (e=’$10001’): 42 ms
– Triple DES (with enhanced security): 27 µs
– Single DES (with enhanced security): 20 µs
– Code signature capability
– Built-in DFA countermeasures
– Glitch detector
■ Security firewalls for memories, MAP and
Enhanced DES accelerator
■ Hardware Security Enhanced DES accelerator
with library support for symmetrical algorithms:
– DES, 3 DES computations and CBC mode
1. Typical values, independent from external clock
frequency and supply voltage.
2. CRT: Chinese Remainder Theorem.
259a.ai
(2)
: 39 ms
(2)
: 130 ms
(2)
: 264 ms
February 2007 DB_19NA18/0702 Rev 3 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Obsolete Product(s) - Obsolete Product(s)
Description ST19NA18
1 Description
The product, member of the ST19N platform, is a serial access microcontroller specially
designed for cost-effective secure portable applications.
It is manufactured using an advanced highly reliable ST CMOS EEPROM technology.
It is based on the STMicroelectronics 8-bit CPU already implemented on the ST19X product
family and includes on-chip memories: User ROM, User RAM and EEPROM with state-ofthe-art security features. ROM, RAM and EEPROM memories can be configured into
partitions with customized access rules.
An additional ST ROM contains all ST provided functions and libraries.
Access from any memory area to another are protected by hardware firewalls. Access rules
are user-defined and can be selected by mask options.
The chip includes an Enhanced DES accelerator which is accessible via cryptographic
software libraries located in ST ROM.
The chip includes a Modular Arithmetic Processor (MAP) based on a 1088-bit processor
architecture. It processes modular multiplication, squaring and additional operand
calculations up to 2176 bits.
The Internal MAP and Enhanced DES accelerator are designed to speed up cryptographic
calculations using Public Key Algorithms and Secret Key Algorithms.
As with the other ST19N products, two serial interfaces compatible with the ISO 7816
standard are available.
A CRC calculation block is also available and is directly accessible by the User.
1.1 Software development
Software development and firmware generation (ROM and options) are supported by a
comprehensive set of development tools, dedicated at development and validation of
software:
● Smartcard ICs Emulator
● ScDevTools environment for Windows
● Powerful C/C++ compiler and debugger are also available (third-party tools)
TM
NT, 2000, and XP based stations
2/4 DB_19NA18/0702
Obsolete Product(s) - Obsolete Product(s)
ST19NA18 Revision history
Figure 1. Block diagram
RAM
CRC
Module
EEPROM
Memory Access Firewall
Clock
Generator
Module
CLK
3 X
8-bit
Timers
User ROM
Security
Admin-
istration
RESET
Internal Bus
Random
Number
Generator
ST ROM
and Crypto
Library
Tr u e
Vcc
EDES
Accelerator
ST and User ROM, MAP
and DES Firewall
8-bit
CPU
GND
2 Serial
I/O
Interfaces
I/O0
I/O1
MAP
IART
558
2 Revision history
Table 1. Summary of modifications
Date Reference Description of modifications
14-Nov-2005 1 Initial release.
31-Jan-2006 2 Disclaimer updated.
23-Feb-2007 3 Reformatted document.
DB_19NA18/0702 3/4
Obsolete Product(s) - Obsolete Product(s)
ST19NA18
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