ST ST19NA18 User Manual

ST ST19NA18 User Manual

ST19NA18

Smartcard MCU with MAP, IART, High Speed CPU Clock & 18 KBytes High Density EEPROM

Data Brief

Features summary

ST19NA18 applications include:

Pay TV, Banking and Secure applications

 

Hardware and dedicated software

 

 

 

 

 

 

 

Enhanced 8-bit CPU with extended addressing

 

 

 

259a.ai

 

 

Micromodule

Wafer

 

 

modes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

128 Kbytes User ROM with partitioning

 

 

AES-128 software library

 

 

 

4 Kbytes User RAM with partitioning

 

 

1088-bit Modular Arithmetic Processor with

 

 

 

 

 

 

 

 

– Software s lectableProduct(s)operand length up to

 

18 Kbytes User EEPROM with partitioning,

 

 

library support for asymmetrical algorithms

 

 

64 Bytes User OTP and 64 Bytes ST OTP

 

 

 

– Fast modular multiplication and squaring

 

 

areas:

 

 

 

 

using Montgomery method

 

 

– Highly reliable CMOS EEPROM submicron

 

– Software Crypto libraries in separate ST

 

 

 

ROM area for efficient algorithm coding

 

 

 

technology

 

 

 

 

 

 

 

 

 

using a set of advanced functions

 

 

– Error Correction Code for single bit fail

 

 

 

 

 

Obsolete

 

 

 

3V and 5V supply voltage ranges

 

 

 

 

 

 

correction within a byte

 

 

 

2176 bi s

 

 

 

 

– 10-year data retention

 

 

ISO 3309 CRC calculation block

 

 

– 500,000 Erase/Write cycles endurance

 

 

FIPS 140-2 and AIS31 compliant True Random

 

 

– Erase or Program 1 to 64 Bytes in 1.5 ms

 

 

 

 

 

Number Generator (TRNG) with two TRNG

 

Three 8-bit timers with interrupt capability

 

 

 

 

 

 

 

registers

 

 

 

 

 

 

 

-

 

 

 

 

Power-saving Standby mode

Unique serial number on each die

 

 

 

 

 

 

 

High performance provided using high speed

 

 

 

 

Product(s)

 

 

Serial access I/Os, ISO 7816-3 compatible

 

 

internal clock frequency (up to 28 MHz)

 

ISO Asynchronous Receiver Transmitter for

 

Cryptographic performances (1)

 

 

high speed serial data support

 

 

 

– RSA 1024-bit signature with CRT(2): 39 ms

 

ESD protection greater than 5000 V

 

 

 

– RSA 1024-bit signature without CRT(2): 130 ms

 

Security features

 

 

 

– RSA 1024-bit verification (e=’$10001’): 2.4 ms

 

 

 

 

– RSA 1024-bit key generation: 1.2 s

Obsolete– Built-in DFA countermeasures

 

 

 

 

 

 

– RSA 2048-bit signature with CRT(2): 264 ms

 

Very high s

curity features including:

 

 

 

 

 

EEPROM Flash programming

 

 

 

– RSA 2048-bit verification (e=’$10001’): 42 ms

 

 

Cl ck management

 

 

 

– Triple DES (with enhanced security): 27 µs

 

 

– User ROM protected area

 

 

 

– Single DES (with enhanced security): 20 µs

 

 

Code signature capability

 

 

 

 

 

 

 

 

Glitch detector

 

 

 

 

 

 

 

Security firewalls for memories, MAP and

 

 

 

 

 

 

 

 

Enhanced DES accelerator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Hardware Security Enhanced DES accelerator

1. Typical values, independent from external clock

 

 

with library support for symmetrical algorithms:

 

 

 

frequency and supply voltage.

 

 

 

 

– DES, 3 DES computations and CBC mode

 

 

 

 

 

 

 

2. CRT: Chinese Remainder Theorem.

 

 

 

 

 

 

 

 

February 2007

DB_19NA18/0702 Rev 3

1/4

 

 

 

 

 

 

 

For further information contact your local STMicroelectronics sales office.

 

 

 

www.st.com

Description

ST19NA18

 

 

1 Description

The product, member of the ST19N platform, is a serial access microcontroller specially designed for cost-effective secure portable applications.

It is manufactured using an advanced highly reliable ST CMOS EEPROM technology.

It is based on the STMicroelectronics 8-bit CPU already implemented on the ST19X product family and includes on-chip memories: User ROM, User RAM and EEPROM with state-of- the-art security features. ROM, RAM and EEPROM memories can be configured into partitions with customized access rules.

An additional ST ROM contains all ST provided functions and libraries.

Access from any memory area to another are protected by hardware firewalls. Access rules are user-defined and can be selected by mask options.

The chip includes an Enhanced DES accelerator which is accessible via cryptographic software libraries located in ST ROM.

The chip includes a Modular Arithmetic Processor (MAP) based on a 1088-bit processor architecture. It processes modular multiplication, squaring and additional operand calculations up to 2176 bits.

The Internal MAP and Enhanced DES accelerator are designed to speed up cryptographic calculations using Public Key Algorithms and Secret Key Algorithms.

As with the other ST19N products, two serial interfaces compatible with the ISO 7816

standard are available.

Obsolete

Product(s)

A CRC calculation block is also available and is directly accessible by the User.

1.1Software development

Smartcard ICs Emulator

- Software development and firmware generation (ROM and options) are supported by a comprehensiveProduct(s)set of development tools, dedicated at development and validation of software:

ScDevTools environment for WindowsTM NT, 2000, and XP based stations

● Powerful C/C++ compiler and debugger are also available (third-party tools) Obsolete

2/4

DB_19NA18/0702

Loading...
+ 2 hidden pages