ST M28F201 User Manual

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2 Mb (256K x 8, Chip Erase) FLASH MEMORY

5V ± 10% SUPPLYVOLTAGE
12V PROGRAMMINGVOLTAGE
FASTACCESSTIME: 70ns
BYTEPROGRAMMINGTIME: 10µs typical
ELECTRICALCHIP ERASEin 1s RANGE

LOW POWERCONSUMPTION
– ActiveCurrent: 15mAtypical
– Stand-byCurrent: 10µAtypical
10,000PROGRAM/ERASE CYCLES
INTEGRATED ERASE/PROGRAM-STOP

TIMER
OTPCOMPATIBLE PACKAGESand PINOUTS
ELECTRONIC SIGNATURE
– ManufacturerCode: 20h
– DeviceCode: F4h

M28F201

PLCC32 (K) TSOP32 (N)

8 x 20 mm

Figure 1. Logic Diagram

DESCRIPTION

The M28F201 FLASH Memory product is a non­volatilememorieswhich may be erasedelectrically
at the chip level and programmed byte-by-byte. It
is organised as 256K bytes. It uses a command
registerarchitectureto select theoperating modes
and thus provide a simple microprocessor inter­face. The M28F201 FLASH Memory product is
suitablefor applicationswhere the memoryhas to
be reprogrammed in the equipment. The access
time of 70ns makes the device suitable for use in
high speed microprocessorsystems.

Table 1. Signal Names

A0-A17 Address Inputs

DQ0-DQ7 Data Inputs / Outputs

E Chip Enable

G Output Enable

W Write Enable

V

PP

V

CC

V

SS

Program Supply
SupplyVoltage
Ground

A0-A17

W

CC

M28F201

V

SS

V

PP

8

DQ0-DQ7

AI00637C

V

18

E

G

April 1997 1/21

M28F201

Figure2A. LCCPin Connections

CC

VPPV

32

DQ3

DQ4

W

DQ5

A7
A6
A5
A4
A3
A2
A1
A0

DQ0

A16

A12

A15

1

9

DQ1

DQ2

M28F201

17

SS

V

A17

25

DQ6

A14
A13
A8
A9
A11
G
A10
E
DQ7

AI00638C

Figure 2B. TSOPPin Connections

A11 G

A13
A14
A17

V

CC

V

PP

A16
A15
A12

1
A9
A8

W

M28F201

8

(Normal)

9

A7
A6
A5
A4 A3

16 17

32

25
24

AI00639C

A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
V

SS

DQ2
DQ1
DQ0
A0
A1
A2

Figure2C. TSOPReverse Pin Connections

A11G

321

2/21

A10

DQ7
DQ6
DQ5
DQ4
DQ3
V

SS

DQ2
DQ1
DQ0

A0
A1
A2

E

M28F201

8

(Reverse)

9

16 17

AI00640D

25
24

A9
A8
A13
A14
A17
W
V

CC

V

PP

A16
A15
A12
A7
A6
A5
A4A3

DEVICEOPERATION

TheM28F201 FLASHMemory product employsa
technologysimilar to a 2 Megabit EPROM but add
to the device functionality by providing electrical
erasure and programming. These functions are
managed by a command register. The functions
that are addressed via the command register de­pend on the voltage applied to the V
voltage, input. When V

is less than or equal to

PP

, program

PP

6.5V, the command register is disabled and the
M28F201functionsas a readonly memoryprovid­ing operating modessimilar to anEPROM (Read,
Output Disable, Electronic Signature Read and
Standby).WhenV

israisedto 12Vthecommand

PP

register is enabled and this provides, in addition,
Eraseand Program operations.

READONLYMODES, V

PP

≤ 6.5V

For all Read Only Modes, except StandbyMode,
the Write Enable input W should be High. In the
StandbyMode this input is ’don’tcare’.

ReadMode. TheM28F201has twoenableinputs,
E and G, both of which must be Low in order to
outputdata from thememory. TheChipEnable(E)
isthe powercontroland shouldbe usedfor device
selection. Output Enable (G) is the output control
and should be used to gatedata on to the output,
independantof the deviceselection.

Table 2. AbsoluteMaximumRatings

Symbol Parameter Value Unit

M28F201

T

A

T

STG

V

IO

V

CC

V

A9

V

PP

Note: Except for therating ”Operating Temperature Range”, stressesabove those listed in the Table”AbsoluteMaximum Ratings” may
cause permanent damage tothe device. These are stress ratings onlyand operation of the device at these or any other conditions above
those indicated in the Operating sections of this specificationis notimplied. Exposure to AbsoluteMaximum Ratingconditions for extended
periods may affect device reliability.Refer also to the SGS-THOMSON SURE Program and otherrelevant quality documents.

Table 3. Operations

ReadOnly V

Read/Write

Notes: 1. X = VILor VIH.

(2)

2. Refer also to the Command table.

Ambient Operating Temperature –40 to125 °C
Storage Temperature –65 to150 °C
Input or Output Voltages –0.6 to 7 V
Supply Voltage –0.6 to 7 V
A9 Voltage –0.6 to 13.5 V
Program Supply Voltage, during Erase

or Programming

(1)

V

PP

Operation E G W A9 DQ0 - DQ7

Read V

PPL

Output Disable V

Standby V

Electronic Signature V

Read V

V

PPH

Write V

Output Disable V

Standby V

IL

IL

IH

IL

IL

IL

IL

IH

V

IL

V

IH

X X X Hi-Z

V

IL

V

IL

V

IH

V

IH

X X X Hi-Z

–0.6 to 14 V

V

IH

V

IH

V

IH

V

IH

A9 Data Output

X Hi-Z

V

ID

A9 Data Output

VILPulse A9 Data Input

V

IH

X Hi-Z

Codes

Table 4. Electronic Signature

Identifier A0 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 Hex Data

Manufacturer’s Code V
Device Code V

IL

IH

00100000 20h
11110100 F4h

3/21

M28F201

Table 5. Commands

Command Cycles

Read 1 Write X 00h
Electronic

Signature

Setup Erase/
Erase Write X 20h
Erase Verify 2 Write A0-A17 A0h Read X Data Output
Setup Program/
Program Write A0-A17 Data Input
Program Verify 2 Write X C0h Read X Data Output
Reset 2 Write X FFh Write X FFh

Notes: 1. X = VILor VIH.

(2)

2. Refer also to the Electronic Signaturetable.

Standby Mode. In the Standby Mode the maxi­mum supply current is reduced. The device is
placed in the Standby Mode by applying a High
level to the Chip Enable (E) input. When in the
StandbyModetheoutputsare ina highimpedance
state, independantof theOutput Enable (G)input.

Output Disable Mode. When the Output Enable
(G) is High the outputs are in a high impedance
state.

ElectronicSignatureMode.Thismodeallowsthe
readout of two binary codesfromthe device which
identify the manufacturer and device type. This
mode is intended for use by programming equip­ment to automaticallyselect the correct eraseand
programmingalgorithms.The ElectronicSignature
Mode is activewhen a highvoltage (11.5Vto 13V)
isapplied toaddresslineA9withEandG Low.With
A0 Low the output data is the manufacturercode,
when A0 isHigh the output is thedevice code. All
other address lines should be maintained Low
while reading the codes. The electronicsignature
canalso be accessed in Read/Writemodes.

READ/WRITE MODES, 11.4V≤ V

When V

is High both read and write operations

PP

may be performed. These are defined by thecon­tents ofan internalcommand register.Commands
may be written to this register to set-up and exe­cute,Erase,EraseVerify,Program,Program Verify
and Reset modes. Each of these modes needs 2
cycles. Each mode starts with a write operationto
set-upthe command,thisis followedby eitherread
or write operations. The device expects the first
cycle to be a write operation and doesnot corrupt

(1)

1st Cycle 2nd Cycle

Operation A0-A17 DQ0-DQ7 Operation A0-A17 DQ0-DQ7

2 Write X 80h or 90h

2

2

Write X 20h

Write X 40h

Read 00000h 20h
Read 00001h F4h

data at any location in the memory.Read modeis
set-upwith one cycle onlyand maybe followedby
any number of read operations to output data.
ElectronicSignatureRead modeis set-upwithone
cycle and followed by a read cycle to output the
manufactureror device codes.

Awriteto thecommandregisterismadebybringing
WLowwhileEisLow.ThefallingedgeofWlatches
Addresses, while the rising edge latches Data,
which are used for those commands that require
address inputs, command input or provide data
output. The supply voltage V
voltageV

canbe applied in any order. Whenthe

PP

CC

device is powered up or when V
contentsof thecommand register defaultsto 00h,
thus automatically setting-up Read operations. In
addition a specific command may be used to set
the commandregisterto 00h for readingthe mem­ory. The system designer may chose to provide a
constanthigh V

anduse the registercommands

PP

for all operations,or to switch the V
high only when needing to erase or program the
memory. All command registeraccess is inhibited

≤12.6V

PP

whenV
age (V

fallsbelowthe Erase/WriteLockoutVolt-

CC

) of 2.5V.

LKO

If the device is deselected during Erasure, Pro­gramming or verifying it will draw active supply
currentsuntil the operationsare terminated.

The device is protected against stress caused by
long erase or programtimes.If theend ofErase or
Programming operations are not terminated by a
Verifycycle within a maximumtime permitted, an
internal stop timer automatically stops the opera­tion.The deviceremainsin aninactivestate, ready
to start a Verifyor ResetMode operation.

and the program

is ≤ 6.5V the

PP

from low to

PP

4/21

Table 6. AC Measurement Conditions

SRAM Interface Levels EPROM Interface Levels

Input Rise and Fall Times ≤ 10ns ≤ 10ns
Input PulseVoltages 0 to 3V 0.45V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8Vand 2V

M28F201

Figure3. AC Testing Input Output Waveform

SRAM Interface

3V

1.5V

0V

EPROM Interface

2.4V

0.45V

Table 7. Capacitance

Symbol Parameter TestCondition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

Input Capacitance VIN=0V 6 pF
Output Capacitance V

(1)

(TA=25°C, f = 1 MHz )

2.0V

0.8V

AI01275

Figure4. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE
UNDER

TEST

CL= 30pF or 100pF

CL= 30pF for SRAM Interface
CL= 100pF for EPROM Interface
CLincludes JIG capacitance

=0V 12 pF

OUT

OUT

AI01276

Read Mode. The Read Mode is the default at
power up or may be set-up by writing 00h to the
command register. Subsequent read operations
outputdatafromthememory.Thememoryremains
in the Read Mode until a new command is written
to the commandregister.

ElectronicSignatureMode. Inorder to select the
correcterase and programmingalgorithmsfor on­board programming,the manufacturerand device

codesmay be read directly. It isnot neccessaryto
apply a high voltage to A9 when using the com­mand register. The Electronic Signature Mode is
set-up by writing 80h or 90h to the command
register. The following read cycles, with address
inputs00000hor 00001h,outputthe manufacturer
or device codes. The command is terminated by
writing another valid command to the command
register(for exampleReset).

5/21

M28F201

Table 8. DC Characteristics

= 0 to 70 °C, –40 to 85 °C or –40to 125 °C; VCC=5V±10%)

(T

A

Symbol Parameter Test Condition Min Max Unit

Input LeakageCurrent 0V ≤ VIN≤ V

LI

Output Leakage Current 0V ≤ V
Supply Current (Read) E = VIL, f = 10MHz 30 mA
Supply Current (Standby) TTL E = V

I
I

I

CC1

I

LO

CC

Supply Current (Standby) CMOS E = V

(1)

I

CC2

I

CC3

I

CC4

I

CC5

I

I

I
I

I

I

PP1

PP2

PP3

PP4

V

V

LPP

PP

Supply Current (Programming) During Programming 10 mA

(1)

Supply Current (Program Verify) During Verify 20 mA

(1)

Supply Current (Erase) During Erasure 20 mA

(1)

Supply Current (Erase Verify) During Erase Verify) 20 mA
Program Leakage Current VPP≤ V

Program Current (Read or
Standby)

(1)

Program Current (Programming) VPP=V
Program Current (Program

(1)

Verify)

(1)

Program Current (Erase) VPP=V

(1)

Program Current (Erase Verify) VPP=V
Input Low Voltage –0.5 0.8 V

IL

Input High VoltageTTL 2 VCC+ 0.5 V

IH

Input High Voltage CMOS 0.7 V

V

V

Output Low Voltage IOL= 5.8mA 0.45 V

OL

Output High Voltage CMOS

OH

Output High VoltageTTL I

V

PPL

V

PPH

V

I

ID

V

LKO

Note: 1. Not 100% tested. Characterisation Data available.

Program Voltage(Read
Operations)

Program Voltage(Read/Write
Operations)

A9 Voltage(Electronic Signature) 11.5 13 V

ID

(1)

A9 Current (Electronic Signature) A9 = V
Supply Voltage,Erase/Program

Lock-out

CC

≤ V

OUT

CC

IH

± 0.2V 100 µA

CC

CC

V

PP>VCC

≤ V

V

PP

CC

, During Programming 30 mA

PPH

V

PP=VPPH

, During Verify 5 mA

, During Erase 30 mA

PPH

, DuringErase Verify 5 mA

PPH

CC

I

= –100µAV

OH

I

= –2.5mA 0.85 V

OH

= –2.5mA 2.4 V

OH

– 0.4 V

CC

CC

0 6.5 V

11.4 12.6 V

ID

2.5 V

±1 µA

±10 µA

1mA

±10 µA
200 µA
±10 µA

VCC+ 0.5 V

200 µA

V

6/21

Table9. Read Only Mode AC Characteristics

((T

= 0 to 70 °C, –40 to 85 °C or –40 to 125 °C)

A

Symbol Alt Parameter Test Condition

t

WHGL

t

AVAV

t

AVQV

(1)

t

ELQX

t

ELQV

(1)

t

GLQX

t

GLQV

(1)

t

EHQZ

(1)

t

GHQZ

t

AXQX

Note: 1. Sampled only,not 100% tested

Write Enable High to
Output EnableLow

t

Read Cycle Time E = VIL,G=VIL70 90 120 150 ns

RC

Address Validto

t

ACC

Output Valid
Chip Enable Low to

t

LZ

Output Transition
Chip Enable Low to

t

CE

Output Valid
Output EnableLow

t

OLZ

to Output Transition
Output EnableLow

t

OE

to Output Valid
Chip Enable High to

Output Hi-Z
Output EnableHigh

t

DF

to Output Hi-Z
Address Transition

t

OH

to Output Transition

E=V

,G=V

IL

G=V

IL

G=V

IL

E=V

IL

E=V

IL

G=V

IL

E=V

IL

E=V

,G=VIL0000ns

IL

M28F201

M28F201

-70 -90 -120 -150
=

V

CC

5V±10%
EPROM

Interface

Min Max Min Max Min Max Min Max

6666µs

IL

70 90 120 150 ns

0000ns

70 90 120 150 ns

0000ns

25 30 35 40 ns

0 25 0 30 0 30 0 35 ns

0 25 0 30 0 30 0 35 ns

VCC=

5V±10%
EPROM

Interface

VCC=

5V±10%
EPROM

Interface

VCC=

5V±10%

EPROM

Interface

Unit

Erase and Erase Verify Modes. The memory is

erased by first Programming all bytes to 00h,the
Erase command then erases them to FFh. The
Erase Verify command is then used to read the
memory byte-by-byte for a content of FFh. The
Erase Mode is set-up by writing 20h to the com­mand register. The write cycle is then repeated to
start the erase operation. Erasure starts on the
rising edge of W duringthis second cycle.Eraseis
followed by an Erase Verify which reads an ad­dressed byte. Erase VerifyMode is set-up bywrit­ing A0h tothe command register and at thesame
time supplying the address of the byte to be veri­fied. The rising edge of W duringthe set-up of the
firstErase VerifyMode stops theEraseoperation.

Thefollowing read cycle is madewith an internally
generated margin voltage applied; reading FFh
indicatesthatallbitsof theaddressedbyte arefully
erased. The whole contents of the memory are
verified by repeating the Erase Verify Operation,
first writing the set-up code A0h with the address
of thebyte to be verified and thenreadingthe byte
contentsin a secondread cycle.

As the Erasealgorithm flow chart shows,when the
data read during Erase Verify is not FFh, another
Eraseoperation is performedand verificationcon­tinuesfromtheaddressofthelast verifiedbyte.The
command is terminated by writing another valid
command to the command register (for example
Programor Reset).

7/21