ST M27W512 User Manual
查询M27W512-100B6TR供应商查询M27W512-100B6TR供应商
M27W512
512 Kbit (64Kb x8) Low Voltage UV EPROM and OTP EPROM
■ 2.7V to 3.6V SUPPLY VOLTAGE in READ
OPERATION
■ ACCESS TIME:
–70nsatVCC= 3.0V to 3.6V
–80nsatVCC= 2.7V to 3.6V
■ PIN COMPATIBLE with M27C512
■ LOW POWER CONSUMPTION:
–15µA max Standby Current
– 15mA max Active Current at 5MHz
■ PROGRAMMING TIME 100
■ HIGH RELIABILITY CMOS TECHNOLOGY
s/byte
µ
– 2,000V ESD Protection
– 200mA Latchup Protection Immunity
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 3Dh
DESCRIPTION
The M27W512 is a low voltage 512 Kbit EPROM
offered in the two range UV (ultraviolet erase)and
OTP (one time programmable). It is ideally suited
for microprocessor systems and is organized as
65,536 by 8bits.
The M27W512 operates in the read mode with a
supply voltageas low as 2.7V at –40 to 85°C temperature range. The decrease in operating power
allows either a reduction of the size of the battery
or an increase in the time between battery recharges.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chipto ultraviolet lighttoerase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications wherethe content is programmed
only one time and erasure is not required, the
M27W512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
28
1
FDIP28W (F) PDIP28 (B)
PLCC32 (K) TSOP28 (N)
Figure 1. Logic Diagram
16
A0-A15
E
GV
PP
28
V
CC
M27W512
V
SS
1
8 x 13.4 mm
8
Q0-Q7
AI01584
1/16March 2000
M27W512
Figure 2A. DIP Connections
A15 V
1
A12
2
A7
3
A6
4
A5
5
A4
6
A3
7
A2
A1
A0
Q0
Q2
SS
M27W512
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI02679
CC
A14
A13
A8
A9
A11
GV
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
PP
Figure 2B. LCC Connections
A15
A6
A5
A4
A3
A2
A1
A0
NC
Q0
A7
9
Q1
DU
A12
1
32
M27W512
17
Q2
SS
DU
V
V
Q3
CC
A14
Q4
A13
25
Q5
A8
A9
A11
NC
GV
A10
E
Q7
Q6
AI01585
PP
Figure 2C. TSOP Connections
GV
A11
A13
A14
V
A15
A12
PP
A9
A8
CC
A7
A6
A5
A4
A3
22
28
M27W512
1
78
21
15
14
AI01586
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
Table 1. Signal Names
A0-A15 Address Inputs
Q0-Q7 Data Outputs
E Chip Enable
GV
V
V
NC
DU
PP
CC
SS
Output Enable / Program Supply
Supply Voltage
Ground
Not Connected Internally
Don’t Use
2/16
M27W512
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of thedevice at these or anyother conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program andother relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read
Output Disable V
Program
V
Program Inhibit V
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
Pulse V
IL
IH
V
IH
V
IL
GV
V
PP
V
IL
V
IH
PP
PP
A9 Q7-Q0
X Data Out
X Hi-Z
XDataIn
X Hi-Z
X X Hi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
00100000 20h
00111101 3Dh
3/16
M27W512
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input Capacitance
Output Capacitance
(1)
(TA=25°C, f = 1 MHz)
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
V
V
IN
OUT
=0V
=0V
6pF
12 pF
OUT
AI01823B
DEVICE OPERATION
The modes of operationsof the M27W512 are listed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPPand 12V on A9 for
Electronic Signature.
Read Mode
The M27W512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time
4/16
(t
) is equal to the delay from E to output
AVQV
(t
). Data is available at the output aftera delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses have been stable for at least t
AVQV-tGLQV
.
Standby Mode
The M27W512 has a standby mode which reduces the supply current from 15mA to 15µA with low
voltage operation VCC≤ 3.6V, see Read ModeDC
Characteristics table for details. The M27W512 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the GVPPinput.
M27W512
Table 7. Read Mode DC Characteristics
(1)
(TA= –40 to 85°C; VCC= 2.7V to 3.6V; VPP=VCC)
Symbol Parameter Test Condition Min Max Unit
I
I
I
CC
I
CC1
I
CC2
I
V
V
IH
V
V
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, Eshould be decoded and used as the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system controlbus. This ensures that all deselected memory devicesare in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Input Leakage Current
LI
Output Leakage Current
LO
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
PP
Input Low Voltage –0.6
IL
(2)
Input High Voltage
Output Low Voltage
OL
Output High Voltage TTL
OH
2. Maximum DC voltage on Output is V
CC
+0.5V.
I
OUT
0V ≤ V
0V ≤ V
E=V
E>V
≤ V
IN
CC
≤ V
OUT
IL
= 0mA, f = 5MHz
V
CC
E=V
CC
V
CC
V
PP=VCC
I
= 2.1mA
OL
I
= –1mA
OH
CC
,G=VIL,
≤ 3.6V
IH
– 0.2V,
≤ 3.6V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between V
and VSS. This should be a high frequency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be
±10 µA
±10 µA
15 mA
1mA
15 µA
10 µA
0.2 V
CC
0.7 V
2.4 V
CC
VCC+ 0.5
0.4 V
used between VCCand VSSfor every eight devices. The bulkcapacitor should be located near the
power supply connection point.Thepurpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
V
V
CC
5/16
Loading...