ST M27V512 User Manual
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M27V512
512 Kbit (64Kb x8) Low Voltage UV EPROM and OTP EPROM
■ LOW VOLTAGE READ OPERATION:
3V to 3.6V
■ FAST ACCESS TIME: 100ns
■ LOW POWER CONSUMPTION:
– Active Current 10mA at 5MHz
– Standby Current 10µA
■ PROGRAMMING VOLTAGE: 12.75V ± 0.25V
■ PROGRAMMING TIME: 100µs/byte (typical)
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 3Dh
28
1
FDIP28W (F) PDIP28 (B)
28
1
DESCRIPTION
The M27V512 is a low voltage 512 Kbit EPROM
offered in the two ranges UV (ultra viloet erase)
and OTP (one time programmable). It is ideally
suited for microprocessor systems and is organized as 65,536 by 8 bits.
The M27V512 operates in the read mode with a
supply voltage as low as 3V. The decrease in operating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chiptoultraviolet light to erase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27V512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
Table 1. Signal Names
A0-A15 Address Inputs
Q0-Q7 Data Outputs
E Chip Enable
GV
PP
Output Enable
PLCC32 (K) TSOP28 (N)
Figure 1. Logic Diagram
V
CC
16
A0-A15
GV
E
PP
M27V512
V
SS
8 x 13.4mm
8
Q0-Q7
AI00732B
V
CC
V
SS
Supply Voltage
Ground
1/16May 1998
M27V512
Figure 2A. DIP Pin Connections
A15 V
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q2
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
M27V512
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI01907
CC
A14
A13
A8
A9
A11
GV
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
PP
Figure 2B. LCC Pin Connections
CC
A13
DU
32
DU
V
Q3
A14
Q4
25
Q5
A8
A9
A11
NC
GV
A10
E
Q7
Q6
AI00733B
A15
A7
A12
A6
A5
A4
A3
A2
9
A1
A0
NC
Q0
Q1
Warning: NC = Not Connected, DU = Don’t Use
1
M27V512
17
Q2
SS
V
PP
Figure 2C. TSOP Pin Connections
GV
A11
A13
A14
V
A15
A12
PP
A9
A8
CC
A7
A6
A5
A4
A3
22
28
M27V512
1
78
21
15
14
AI00734B
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
DEVICE OPERATION
The operating modes of the M27V512 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GVPPand 12V on A9 for Electronic Signature.
Read Mode
The M27V512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
(t
). Datais availableatthe output afteradelay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses have been stable for at least t
AVQV-tGLQV
.
Standby Mode
The M27V512 has a standby mode which reduces
the supply current from 10mA to 10µA with low
voltage operation VCC≤ 3.6V, see Read Mode DC
Characteristics table for details.The M27V512 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the GVPPinput.
2/16
M27V512
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer alsoto the STMicroelectronics SUREProgram and other relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read
Output Disable V
Program
V
Program Inhibit V
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
Pulse V
IL
IH
V
IH
V
IL
GV
V
PP
V
IL
V
IH
PP
PP
A9 Q0-Q7
X Data Out
X Hi-Z
XDataIn
X Hi-Z
X X Hi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
00100000 20h
00111101 3Dh
For the most efficient use of these two control
lines, Eshouldbedecoded and used astheprimary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselected memory devices are intheir lowpower standby
mode and that the output pins are only active
when data is required from a particular memory
device.
3/16
M27V512
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Figure 3. Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input Capacitance
Output Capacitance
(1)
(TA=25°C, f = 1 MHz)
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for HighSpeed
CL= 100pF for Standard
CLincludes JIG capacitance
V
V
IN
OUT
=0V
=0V
6pF
12 pF
OUT
AI01823B
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edgesof E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
4/16
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between V
CC
and VSS. This should be a high frequency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be
used between VCCand VSSfor every eight devices. The bulk capacitor should be located near the
power supplyconnection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
M27V512
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to 70 °C or –40 to 85 °C; VCC= 3.3V ± 10%; VPP=VCC)
Symbol Parameter Test Condition Min Max Unit
I
I
I
CC
I
CC1
I
CC2
I
V
V
IH
V
V
V
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Table 8A. Read Mode AC Characteristics
Input Leakage Current
LI
Output Leakage Current
LO
Supply Current
E=V
IL
f = 5MHz, V
0V ≤ V
0V ≤ V
,G=VIL,I
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
PP
Input Low Voltage –0.3 0.8 V
IL
(2)
Input High Voltage 2
Output Low Voltage
OL
Output High Voltage TTL
OH
Output High Voltage CMOS
OH
2. Maximum DC voltage on Output is V
CC
+0.5V.
(1)
E>V
CC
I
I
OH
OH
≤ V
IN
CC
≤ V
OUT
E=V
CC
IH
CC
OUT
≤ 3.6V
= 0mA,
– 0.2V,VCC≤ 3.6V
V
PP=VCC
I
= 2.1mA
OL
= –400µA
= –100µAV
2.4 V
– 0.7V
CC
±10 µA
±10 µA
10 mA
1mA
10 µA
10 µA
V
+1
CC
0.4 V
(TA= 0 to 70 °C or –40 to 85 °C; VCC= 3.3V ± 10%; VPP=VCC)
M27V512
Symbol Alt Parameter Test Condition
(3)
-100
Min Max Min Max
-120
V
V
Unit
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
(2)
(2)
t
Address Valid to Output Valid E = VIL,G=V
ACC
t
Chip Enable Low to Output Valid
CE
t
Output Enable Low to Output Valid
OE
t
Chip Enable High to Output Hi-Z G = V
DF
t
Output Enable High to Output Hi-Z
DF
Address Transition to Output
t
OH
Transition
E=V
G=V
E=V
E=V
,G=V
IL
IL
IL
IL
IL
IL
IL
0 30 0 35 ns
0 30 0 35 ns
00ns
100 120 ns
100 120 ns
45 45 ns
5/16
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