Automotive 16-Kbit, 8-Kbit, 4-Kbit and 2-Kbit
SO8 (MN)
150 mils width
TSSOP8 (DW)
169 mils width
Features
■ Compatible with I²C bus modes:
– 400 kHz Fast mode
– 100 kHz Standard mode
■ Memory array:
– 2 Kb, 4 Kb, 8 Kb, 16 Kb of EEPROM
– Page size: 16 bytes
■ Write
– Byte Write within 5 ms
– Page Write within 5 ms
■ Single supply voltage:
– 2.5 V to 5.5 V
■ Operating temperature range: -40°C up to
+125°C
■ Random and sequential Read modes
■ Automatic address incrementing
■ Write protect of the whole memory array
■ Enhanced ESD/Latch-Up protection
■ More than 1 million Write cycles
■ More than 40-year data retention
■ Packages
– RoHS-compliant and halogen-free
(ECOPACK2®)
M24C16-125 M24C08-125
M24C04-125 M24C02-125
serial I²C bus EEPROM
Datasheet − production data
March 2012 Doc ID 022564 Rev 1 1/30
This is information on a product in full production.
www.st.com
1
Contents M24C16-125 M24C08-125 M24C04-125 M24C02-125
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Chip Enable (E0, E1, E2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3.1 Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Supply voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.1 Operating supply voltage V
CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.2 Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.3 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.4 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.5 Memory addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6 Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6.1 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.6.2 Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.6.3 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . 16
3.7 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.7.1 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.7.2 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.7.3 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.7.4 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/30 Doc ID 022564 Rev 1
M24C16-125 M24C08-125 M24C04-125 M24C02-125 Contents
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 022564 Rev 1 3/30
List of tables M24C16-125 M24C08-125 M24C04-125 M24C02-125
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3. Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 5. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 6. AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 7. Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 8. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 9. AC characteristics at 400 kHz (I
Table 10. AC characteristics at 100 kHz (I
Table 11. SO8 narrow – 8 lead plastic small outline, 150 mils body width,
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 12. TSSOP8 – 8 lead thin shrink small outline, package mechanical data. . . . . . . . . . . . . . . . 27
Table 13. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 14. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2
C Fast mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
C Standard mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4/30 Doc ID 022564 Rev 1
M24C16-125 M24C08-125 M24C04-125 M24C02-125 List of figures
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. 8-pin package connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. I
Figure 5. I²C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Write mode sequences with WC
Figure 7. Write mode sequences with WC
Figure 8. Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11. AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 12. SO8 narrow – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . 26
Figure 13. TSSOP8 – 8 lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 27
2
C Fast mode (fC = 400 kHz): maximum Rbus value versus bus parasitic
capacitance (C
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
bus
= 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 13
= 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 15
Doc ID 022564 Rev 1 5/30
Description M24C16-125 M24C08-125 M24C04-125 M24C02-125
AI02033
3
E0-E2 SDA
V
CC
M24Cxx
WC
SCL
V
SS
-36
3$! 6
33
3#,
7#
6
##
-#XX
+B +B +B +B
.# .# .# %
.# .# % %
.# % % %
1 Description
The devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as
as 2048x8 bits, 1024x8 bits, 512x8 bits, 256x8 bits (M24C16, M24C08, M24C04 and
M24C02).
The devices are compatible with all I²C modes up to 400 kHz and can operate with a supply
voltage range from 2.5 V up to 5.5 V. The devices are guaranteed over the -40°C/+125°C
temperature range and are compliant with the Automotive standard AEC-Q100 Grade 1.
Figure 1. Logic diagram
Table 1. Signal names
Signal name Function Direction
E0, E1, E2 Chip Enable Input
SDA Serial Data Input/output
SCL Serial Clock Input
WC
V
CC
V
SS
Figure 2. 8-pin package connections (top view)
1. NC = Not connected
2. See Section 7: Package mechanical data for package dimensions, and how to identify pin-1.
6/30 Doc ID 022564 Rev 1
Write Control Input
Supply voltage
Ground
M24C16-125 M24C08-125 M24C04-125 M24C02-125 Signal description
Ai11650
V
CC
M24Cxx
V
SS
E
i
V
CC
M24Cxx
V
SS
E
i
2 Signal description
2.1 Serial Clock (SCL)
This input signal is used to strobe all data in and out of the device. In applications where this
signal is used by slave devices to synchronize the bus to a slower clock, the bus master
must have an open drain output, and a pull-up resistor can be connected from Serial Clock
(SCL) to V
most applications, though, this method of synchronization is not employed, and so the pull-
up resistor is not necessary, provided that the bus master has a push-pull (rather than open
drain) output.
2.2 Serial Data (SDA)
This bidirectional signal is used to transfer data in or out of the device. It is an open drain
output that may be wire-ORed with other open drain or open collector signals on the bus. A
pull up resistor must be connected from Serial Data (SDA) to V
the value of the pull-up resistor can be calculated).
. (Figure 4 indicates how the value of the pull-up resistor can be calculated). In
CC
. (Figure 4 indicates how
CC
2.3 Chip Enable (E0, E1, E2)
These input signals are used to set the value that is to be looked for on the least significant
bits of the 7-bit device select code. These inputs must be tied to V
device select code as shown in Figure 3 . When not connected (left floating), Ei inputs are
read as low (0).
Figure 3. Device select code
2.3.1 Write Control (WC)
This input signal is useful for protecting the entire contents of the memory from inadvertent
write operations. Write operations are disabled to the entire memory array when Write
Control (WC
Write operations are allowed.
When Write Control (WC
acknowledged, data bytes are not acknowledged.
) is driven High. When unconnected, the signal is internally read as VIL, and
or VSS, to establish the
CC
) is driven High, device select and address bytes are
Doc ID 022564 Rev 1 7/30
Signal description M24C16-125 M24C08-125 M24C04-125 M24C02-125
2.4 Supply voltage (VCC)
2.4.1 Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage
within the specified [V
(min), VCC(max)] range must be applied (see Operating conditions
CC
in Section 6: DC and AC parameters ). In order to secure a stable DC supply voltage, it is
recommended to decouple the V
nF to 100 nF) close to the V
CC
CC/VSS
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
2.4.2 Power-up conditions
The VCC voltage has to rise continuously from 0 V up to the minimum VCC operating voltage
defined in Operating conditions in Section 6: DC and AC parameters and the rise time must
not vary faster than 1 V/µs.
2.4.3 Device reset
In order to prevent inadvertent write operations during power-up, a power-on-reset (POR)
circuit is included. At power-up (continuous rise of V
instruction until V
than the minimum V
and AC parameters). When V
enters the Standby Power mode. The device, however, must not be accessed until V
reaches a valid and stable V
In a similar way, during power-down (continuous decrease in V
below the power-on-reset threshold voltage, the device stops responding to any instruction
sent to it.
reaches the power-on-reset threshold voltage (this threshold is lower
CC
operating voltage defined in Operating conditions in Section 6: DC
CC
passes over the POR threshold, the device is reset and
CC
voltage within the specified [VCC(min), VCC(max)] range.
CC
CC
line with a suitable capacitor (usually of the order of 10
package pins.
).
W
), the device does not respond to any
CC
CC
), as soon as VCC drops
CC
2.4.4 Power-down conditions
During power-down (continuous decrease in VCC), the device must be in the Standby Power
mode (mode reached after decoding a Stop condition, assuming that there is no internal
write cycle in progress).
8/30 Doc ID 022564 Rev 1
M24C16-125 M24C08-125 M24C04-125 M24C02-125 Signal description
AIB
"USLINECAPACITORP&
"USLINEPULLUPRESISTOR
K
)£#BUS
MASTER
-XXX
2
BUS
6
##
#
BUS
3#,
3$!
2
BUS
§
#
BUS
NS
(ERE2
BUS
§#
BUS
NS
K½
P&
4HE2X#TIMECONSTANT
MUSTBEBELOWTHENS
TIMECONSTANTLINEREPRESENTED
ONTHELEFT
BUS
BUS
SCL
SDA
SCL
SDA
SDA
Start
condition
SDA
Input
SDA
Change
AI00792c
Stop
condition
1 23 7 89
MSB
ACK
Start
condition
SCL
1 23 7 89
MSB ACK
Stop
condition
Figure 4. I2C Fast mode (fC = 400 kHz): maximum Rbus value versus bus parasitic
capacitance (C
bus
)
Figure 5. I²C bus protocol
Doc ID 022564 Rev 1 9/30