LD49300XX08 LD49300XX10, LD49300XX12
3 A very low drop-out voltage regulator
Features
■Input voltage range:
–VI = 1.4 V to 5.5 V
–VBIAS = 3 V to 6 V
■Stable with ceramic capacitor
■±1.5 % initial tolerance
■Maximum dropout voltage (VI - VO) of 400 mV over temperature
■Adjustable output voltage down to 0.8 V
■Ultra fast transient response (up to 10 MHz bandwidth)
■Excellent line and load regulation specifications
■Logic controlled shutdown option
■Thermal shutdown and current limit protection
■Junction temperature range: - 25 °C to 125 °C
Applications
■Graphics processors
■PC add-in cards
■Microprocessor core voltage supply
■Low voltage digital ICs
■High efficiency linear power supplies
■SMPS post regulators
PPAK
Description
The LD49300xx is a high-bandwidth, low dropout, 3.0 A voltage regulator, ideal for powering core voltages of low-power microprocessors. The LD49300xx implements a dual supply configuration allowing for very low output impedance and very fast transient response. The LD49300xx requires a bias input supply and a main input supply, allowing for ultra-low input voltages on the main supply rail. The input supply operates from 1.4 V to 5.5 V and the bias supply requires between 3 V and 6 V for proper operation. The LD49300xx offers fixed output voltages from 0.8 V to 1.8 V and adjustable output voltages down to 0.8 V. The LD49300xx requires a minimum output capacitance for stability, and works optimally with small ceramic capacitors.
Table 1. |
Device summary |
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Order codes |
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Packaging |
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LD49300PT08R (1) |
PPAK (Tape and reel) |
2500 parts per reel |
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LD49300PT10R |
PPAK (Tape and reel) |
2500 parts per reel |
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LD49300PT12R |
PPAK (Tape and reel) |
2500 parts per reel |
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1. Adjustable version. |
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June 2010 |
Doc ID 12861 Rev 3 |
1/20 |
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www.st.com
Contents |
LD49300XX08, LD49300XX10, LD49300XX12 |
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Contents
1 |
Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2 |
Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4 |
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7 |
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8 |
Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.1 |
Input supply voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.2 |
Bias supply voltage (VBIAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.3 |
External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.4 |
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.5 |
Minimum load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.6 |
Power sequencing recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.7 |
Power dissipation/heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.8 |
Heatsinking PPAK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.9 |
Adjustable regulator design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.10 |
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
19 |
2/20 |
Doc ID 12861 Rev 3 |
LD49300XX08, LD49300XX10, LD49300XX12 |
Typical application circuits |
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Doc ID 12861 Rev 3 |
3/20 |
Alternative application circuits |
LD49300XX08, LD49300XX10, LD49300XX12 |
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4/20 |
Doc ID 12861 Rev 3 |
LD49300XX08, LD49300XX10, LD49300XX12 |
Pin configuration |
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Figure 5. Pin connections (top view)
Table 2. |
Pin description |
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Pin n° |
Symbol |
Note |
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1 |
EN |
Enable (Input): Logic High = Enable, Logic Low = Shutdown. |
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ADJ |
Adjustable regulator feedback input. Connect to resistor voltage divider. |
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2 |
VIN |
Input voltage which supplies current to the output power device. |
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3 |
GND |
Ground (TAB is connected to ground). |
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4 |
VOUT |
Regulator output. |
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5 |
VBIAS |
Input bias voltage for powering all circuitry on the regulator with the exception of the output |
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power device. |
Doc ID 12861 Rev 3 |
5/20 |
Diagram |
LD49300XX08, LD49300XX10, LD49300XX12 |
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6/20 |
Doc ID 12861 Rev 3 |