ST LD49300PT08R, LD49300PT10R, LD49300PT12R User Manual
LD49300XX10, LD49300XX12
3 A very low drop-out voltage regulator
Features
■ Input voltage range:
–V
= 1.4 V to 5.5 V
I
–V
■ Stable with ceramic capacitor
■ ±1.5 % initial tolerance
■ Maximum dropout voltage (V
over temperature
■ Adjustable output voltage down to 0.8 V
■ Ultra fast transient response (up to 10 MHz
bandwidth)
■ Excellent line and load regulation
specifications
■ Logic controlled shutdown option
■ Thermal shutdown and current limit protection
■ Junction temperature range: - 25 °C to 125 °C
Applications
■ Graphics processors
■ PC add-in cards
■ Microprocessor core voltage supply
■ Low voltage digital ICs
■ High efficiency linear power supplies
■ SMPS post regulators
= 3 V to 6 V
BIAS
- VO) of 400 mV
I
LD49300XX08
PPAK
Description
The LD49300xx is a high-bandwidth, low dropout, 3.0 A voltage regulator, ideal for powering
core voltages of low-power microprocessors. The
LD49300xx implements a dual supply
configuration allowing for very low output
impedance and very fast transient response. The
LD49300xx requires a bias input supply and a
main input supply, allowing for ultra-low input
voltages on the main supply rail. The input supply
operates from 1.4 V to 5.5 V and the bias supply
requires between 3 V and 6 V for proper
operation. The LD49300xx offers fixed output
voltages from 0.8 V to 1.8 V and adjustable output
voltages down to 0.8 V. The LD49300xx requires a
minimum output capacitance for stability, and
works optimally with small ceramic capacitors.
Table 1. Device summary
Order codes Package Packaging
LD49300PT08R
LD49300PT10R PPAK (Tape and reel) 2500 parts per reel
LD49300PT12R PPAK (Tape and reel) 2500 parts per reel
1. Adjustable version.
June 2010 Doc ID 12861 Rev 3 1/20
(1)
PPAK (Tape and reel) 2500 parts per reel
www.st.com
20
Contents LD49300XX08, LD49300XX10, LD49300XX12
Contents
1 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.1 Input supply voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.2 Bias supply voltage (V
8.3 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.4 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.5 Minimum load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.6 Power sequencing recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.7 Power dissipation/heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.8 Heatsinking PPAK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.9 Adjustable regulator design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.10 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
BIAS
9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20 Doc ID 12861 Rev 3
LD49300XX08, LD49300XX10, LD49300XX12 Typical application circuits
1 Typical application circuits
Figure 1. Adjustable version
Figure 2. Fixed version with enable
Doc ID 12861 Rev 3 3/20
Alternative application circuits LD49300XX08, LD49300XX10, LD49300XX12
2 Alternative application circuits
Figure 3. Single supply voltage solution
Figure 4. LD49300xx plus DC-DC pre-regulator to reduce power dissipation
4/20 Doc ID 12861 Rev 3
LD49300XX08, LD49300XX10, LD49300XX12 Pin configuration
3 Pin configuration
Figure 5. Pin connections (top view)
Table 2. Pin description
Pin n° Symbol Note
1
EN Enable (Input): Logic High = Enable, Logic Low = Shutdown.
ADJ Adjustable regulator feedback input. Connect to resistor voltage divider.
2V
IN
Input voltage which supplies current to the output power device.
3 GND Ground (TAB is connected to ground).
4V
5V
OUT
BIAS
Regulator output.
Input bias voltage for powering all circuitry on the regulator with the exception of the output
power device.
Doc ID 12861 Rev 3 5/20
Diagram LD49300XX08, LD49300XX10, LD49300XX12
4 Diagram
Figure 6. Block diagram
6/20 Doc ID 12861 Rev 3
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