ST LD39115J08R, LD39115J10R User Manual

LD39115Jxx

150 mA low quiescent current low noise voltage regulator

Features

■Input voltage from 1.5 to 5.5 V

■Ultra low dropout voltage (80 mV typ. at 100 mA load)

■Very low quiescent current (20 µA typ. at no load, 35 µA typ. at 150 mA load, 1 µA max in off mode)

■Very low noise (33 µVRMS from 1 kHz to 100 kHz at VOUT = 1.8 V)

■Output voltage tolerance: ± 2.0 % @ 25 °C

■150 mA guaranteed output current

■Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step

■Logic-controlled electronic shutdown

■Compatible with ceramic capacitor COUT = 1 µF

■Internal current and thermal limit

■Flip-chip 4 bumps 0.8 x 0.8 mm. pitch

■Temperature range: -40 °C to 125 °C

Applications

■Mobile phones

■Personal digital assistants (PDAs)

■Cordless phones and similar battery-powered systems

Flip-chip 4

Description

The LD39115Jxx provides 150 mA maximum current from an input voltage ranging from 1.5 V to 5.5 V with a typical dropout voltage of 80 mV. It is stabilized with a ceramic capacitor. The ultra low drop voltage, low quiescent current and low noise features make it suitable for low power battery-powered applications. Power supply rejection is 65 dB at low frequencies and starts to roll off at 10 kHz. An enable logic control function puts the LD39115Jxx in shutdown mode allowing a total current consumption lower than 1 µA. The device also includes a short-circuit constant current limiting and thermal protection.

Table 1.	Device summary
	Part numbers	Order codes	Output voltages
	LD39115JXX12	LD39115J12R	1.2 V
	LD39115JXX15	LD39115J15R	1.5 V
	LD39115JXX18	LD39115J18R	1.8 V
	LD39115JXX25	LD39115J25R	2.5 V
	LD39115JXX28	LD39115J28R	2.8 V
	LD39115JXX30	LD39115J30R	3.0 V
	LD39115JXX33	LD39115J33R	3.3 V
December 2011		Doc ID 15527 Rev 5	1/23
			www.st.com

Contents	LD39115Jxx

Contents

1	Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 3
2	Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 4
3	Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
4	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
5	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	7
6	Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
7	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
8	Different output voltage versions of the LD39115Jxx
	available on request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
9	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22

2/23	Doc ID 15527 Rev 5

LD39115Jxx	Diagram

1 Diagram

Figure 1. Block diagram

IN	OUT
	BandGap
	1.22 V
	R1
	Trimming
	Thermal
	R2
	Protection
	Enable
EN
	GND

Pin configuration	LD39115Jxx

2 Pin configuration

Figure 2. Pin connection (top view)

Table 2.	Pin description
Pin n°		Symbol	Function
A2		EN	Enable pin logic input: Low = shutdown, High = active
A1		GND	Common ground
B2		IN	Input voltage of the LDO
B1		OUT	Output voltage

4/23	Doc ID 15527 Rev 5

LD39115Jxx	Typical application

3 Typical application

Figure 3. Typical application circuit

VIN	IN	OUT		VOUT
1 µF			1 µF	Load

VEN

EN

GND

Doc ID 15527 Rev 5

5/23

Maximum ratings					LD39115Jxx
4	Maximum ratings
Table 3.	Absolute maximum ratings
Symbol		Parameter		Value			Unit
VIN		DC input voltage		- 0.3 to 6			V
VOUT		DC output voltage		- 0.3 to VI + 0.3			V
VEN		Enable input voltage		- 0.3 to VI + 0.3			V
IOUT		Output current		Internally limited			mA
PD		Power dissipation		Internally limited			mW
TSTG		Storage temperature range		- 65 to 150			°C
TOP		Operating junction temperature range		- 40 to 125			°C
Note:	Absolute maximum ratings are those values beyond which damage to the device may occur.
	Functional operation under these conditions is not implied. All values are referred to GND.
Table 4.	Thermal data
Symbol		Parameter		Value			Unit
RthJA		Thermal resistance junction-ambient		180			°C/W

6/23	Doc ID 15527 Rev 5

LD39115Jxx	Electrical characteristics

5 Electrical characteristics

TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 1 mA, VEN = VIN, unless otherwise specified.

Table 5.	Electrical characteristics for LD39115Jxx (1)
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
VIN	Operating input voltage		1.5		5.5	V
VUVLO	Turn-on threshold			1.45	1.48	V
	Turn-off threshold		1.30	1.35		mV
		VOUT>1.5V, IOUT=1mA, TJ=25°C	-2.0		2.0	%
		VOUT>1.5V, IOUT=1mA,	-3.0		3.0	%
VOUT	VOUT accuracy	-40°C<TJ<125°C
		VOUT ≤ 1.5V, IOUT=1mA		±10		mV
		VOUT ≤ 1.5V, IOUT=1mA,		±30		mV
		-40°C<TJ<125°C
VOUT	Static line regulation	VOUT +1V ≤ VIN ≤ 5.5V, IOUT=1mA		0.01		%/V
VOUT	Transient line regulation	VIN=+500mV, IOUT=1mA,		10		mVpp
	(2)	TR=TF=5µs
VOUT	Static load regulation	IOUT=1mA to 150mA		0.002		%/mA
VOUT	Transient load	IOUT=1mA to 150mA, tR=tF=5µs		40		mVpp
	regulation (2)
VDROP	Dropout voltage (3)	IOUT=100mA, VOUT>1.5V		80	110	mV
		-40°C<TJ<125°C
eN	Output noise voltage	10Hz to 100kHz, IOUT=10mA		30		µVRMS/V
		VIN=VOUTNOM+1V+/-VRIPPLE
		VRIPPLE=0.1V Freq.=1kHz		74
SVR	Supply voltage rejection	IOUT = 10mA				dB
	VOUT = 1.5V	VIN=VOUTNOM+0.5V+/-VRIPPLE
		VRIPPLE=0.1V Freq.=10kHz		67
		IOUT=10mA
		IOUT=0mA		20
		IOUT=0mA, -40°C<TJ<125°C			50
IQ	Quiescent current	IOUT=0 to 150mA		35		µA
		IOUT=0 to 150mA, -40°C<TJ<125°C			70
		VIN input current in OFF MODE:		0.001	1
		VEN=GND
ISC	Short circuit current	RL=0	200			mA
VEN	Enable input logic low	VIN=1.5V to5.5V, -40°C<TJ<125°C			0.4	V
	Enable input logic high	VIN=1.5V to 5.5V, -40°C<TJ<125°C	0.9
IEN	Enable pin input current	VSHDN=VIN		0.1	100	nA
T	Turn on time (4)			30		µs
ON
		Doc ID 15527 Rev 5				7/23